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-rw-r--r--arch/powerpc/boot/dts/prpmc2800.dts315
1 files changed, 315 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/prpmc2800.dts b/arch/powerpc/boot/dts/prpmc2800.dts
new file mode 100644
index 000000000000..568965a022b9
--- /dev/null
+++ b/arch/powerpc/boot/dts/prpmc2800.dts
@@ -0,0 +1,315 @@
1/* Device Tree Source for Motorola PrPMC2800
2 *
3 * Author: Mark A. Greer <mgreer@mvista.com>
4 *
5 * 2007 (c) MontaVista, Software, Inc. This file is licensed under
6 * the terms of the GNU General Public License version 2. This program
7 * is licensed "as is" without any warranty of any kind, whether express
8 * or implied.
9 *
10 * Property values that are labeled as "Default" will be updated by bootwrapper
11 * if it can determine the exact PrPMC type.
12 *
13 * To build:
14 * dtc -I dts -O asm -o prpmc2800.S -b 0 prpmc2800.dts
15 * dtc -I dts -O dtb -o prpmc2800.dtb -b 0 prpmc2800.dts
16 */
17
18/ {
19 #address-cells = <1>;
20 #size-cells = <1>;
21 model = "PrPMC280/PrPMC2800"; /* Default */
22 compatible = "motorola,PrPMC2800";
23 coherency-off;
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 PowerPC,7447 {
30 device_type = "cpu";
31 reg = <0>;
32 clock-frequency = <2bb0b140>; /* Default (733 MHz) */
33 bus-frequency = <7f28155>; /* 133.333333 MHz */
34 timebase-frequency = <1fca055>; /* 33.333333 MHz */
35 i-cache-line-size = <20>;
36 d-cache-line-size = <20>;
37 i-cache-size = <8000>;
38 d-cache-size = <8000>;
39 };
40 };
41
42 memory {
43 device_type = "memory";
44 reg = <00000000 20000000>; /* Default (512MB) */
45 };
46
47 mv64x60@f1000000 { /* Marvell Discovery */
48 #address-cells = <1>;
49 #size-cells = <1>;
50 #interrupt-cells = <1>;
51 model = "mv64360"; /* Default */
52 compatible = "marvell,mv64x60";
53 clock-frequency = <7f28155>; /* 133.333333 MHz */
54 reg = <f1000000 00010000>;
55 virtual-reg = <f1000000>;
56 ranges = <88000000 88000000 01000000 /* PCI 0 I/O Space */
57 80000000 80000000 08000000 /* PCI 0 MEM Space */
58 a0000000 a0000000 04000000 /* User FLASH */
59 00000000 f1000000 00010000 /* Bridge's regs */
60 f2000000 f2000000 00040000>; /* Integrated SRAM */
61
62 flash@a0000000 {
63 device_type = "rom";
64 compatible = "direct-mapped";
65 reg = <a0000000 4000000>; /* Default (64MB) */
66 probe-type = "CFI";
67 bank-width = <4>;
68 partitions = <00000000 00100000 /* RO */
69 00100000 00040001 /* RW */
70 00140000 00400000 /* RO */
71 00540000 039c0000 /* RO */
72 03f00000 00100000>; /* RO */
73 partition-names = "FW Image A", "FW Config Data", "Kernel Image", "Filesystem", "FW Image B";
74 };
75
76 mdio {
77 #address-cells = <1>;
78 #size-cells = <0>;
79 device_type = "mdio";
80 compatible = "marvell,mv64x60-mdio";
81 ethernet-phy@1 {
82 device_type = "ethernet-phy";
83 compatible = "broadcom,bcm5421";
84 interrupts = <4c>; /* GPP 12 */
85 interrupt-parent = <&/mv64x60/pic>;
86 reg = <1>;
87 };
88 ethernet-phy@3 {
89 device_type = "ethernet-phy";
90 compatible = "broadcom,bcm5421";
91 interrupts = <4c>; /* GPP 12 */
92 interrupt-parent = <&/mv64x60/pic>;
93 reg = <3>;
94 };
95 };
96
97 ethernet@2000 {
98 reg = <2000 2000>;
99 eth0 {
100 device_type = "network";
101 compatible = "marvell,mv64x60-eth";
102 block-index = <0>;
103 interrupts = <20>;
104 interrupt-parent = <&/mv64x60/pic>;
105 phy = <&/mv64x60/mdio/ethernet-phy@1>;
106 local-mac-address = [ 00 00 00 00 00 00 ];
107 };
108 eth1 {
109 device_type = "network";
110 compatible = "marvell,mv64x60-eth";
111 block-index = <1>;
112 interrupts = <21>;
113 interrupt-parent = <&/mv64x60/pic>;
114 phy = <&/mv64x60/mdio/ethernet-phy@3>;
115 local-mac-address = [ 00 00 00 00 00 00 ];
116 };
117 };
118
119 sdma@4000 {
120 device_type = "dma";
121 compatible = "marvell,mv64x60-sdma";
122 reg = <4000 c18>;
123 virtual-reg = <f1004000>;
124 interrupt-base = <0>;
125 interrupts = <24>;
126 interrupt-parent = <&/mv64x60/pic>;
127 };
128
129 sdma@6000 {
130 device_type = "dma";
131 compatible = "marvell,mv64x60-sdma";
132 reg = <6000 c18>;
133 virtual-reg = <f1006000>;
134 interrupt-base = <0>;
135 interrupts = <26>;
136 interrupt-parent = <&/mv64x60/pic>;
137 };
138
139 brg@b200 {
140 compatible = "marvell,mv64x60-brg";
141 reg = <b200 8>;
142 clock-src = <8>;
143 clock-frequency = <7ed6b40>;
144 current-speed = <2580>;
145 bcr = <0>;
146 };
147
148 brg@b208 {
149 compatible = "marvell,mv64x60-brg";
150 reg = <b208 8>;
151 clock-src = <8>;
152 clock-frequency = <7ed6b40>;
153 current-speed = <2580>;
154 bcr = <0>;
155 };
156
157 cunit@f200 {
158 reg = <f200 200>;
159 };
160
161 mpscrouting@b400 {
162 reg = <b400 c>;
163 };
164
165 mpscintr@b800 {
166 reg = <b800 100>;
167 virtual-reg = <f100b800>;
168 };
169
170 mpsc@8000 {
171 device_type = "serial";
172 compatible = "marvell,mpsc";
173 reg = <8000 38>;
174 virtual-reg = <f1008000>;
175 sdma = <&/mv64x60/sdma@4000>;
176 brg = <&/mv64x60/brg@b200>;
177 cunit = <&/mv64x60/cunit@f200>;
178 mpscrouting = <&/mv64x60/mpscrouting@b400>;
179 mpscintr = <&/mv64x60/mpscintr@b800>;
180 block-index = <0>;
181 max_idle = <28>;
182 chr_1 = <0>;
183 chr_2 = <0>;
184 chr_10 = <3>;
185 mpcr = <0>;
186 interrupts = <28>;
187 interrupt-parent = <&/mv64x60/pic>;
188 };
189
190 mpsc@9000 {
191 device_type = "serial";
192 compatible = "marvell,mpsc";
193 reg = <9000 38>;
194 virtual-reg = <f1009000>;
195 sdma = <&/mv64x60/sdma@6000>;
196 brg = <&/mv64x60/brg@b208>;
197 cunit = <&/mv64x60/cunit@f200>;
198 mpscrouting = <&/mv64x60/mpscrouting@b400>;
199 mpscintr = <&/mv64x60/mpscintr@b800>;
200 block-index = <1>;
201 max_idle = <28>;
202 chr_1 = <0>;
203 chr_2 = <0>;
204 chr_10 = <3>;
205 mpcr = <0>;
206 interrupts = <2a>;
207 interrupt-parent = <&/mv64x60/pic>;
208 };
209
210 i2c@c000 {
211 device_type = "i2c";
212 compatible = "marvell,mv64x60-i2c";
213 reg = <c000 20>;
214 virtual-reg = <f100c000>;
215 freq_m = <8>;
216 freq_n = <3>;
217 timeout = <3e8>; /* 1000 = 1 second */
218 retries = <1>;
219 interrupts = <25>;
220 interrupt-parent = <&/mv64x60/pic>;
221 };
222
223 pic {
224 #interrupt-cells = <1>;
225 #address-cells = <0>;
226 compatible = "marvell,mv64x60-pic";
227 reg = <0000 88>;
228 interrupt-controller;
229 };
230
231 mpp@f000 {
232 compatible = "marvell,mv64x60-mpp";
233 reg = <f000 10>;
234 };
235
236 gpp@f100 {
237 compatible = "marvell,mv64x60-gpp";
238 reg = <f100 20>;
239 };
240
241 pci@80000000 {
242 #address-cells = <3>;
243 #size-cells = <2>;
244 #interrupt-cells = <1>;
245 device_type = "pci";
246 compatible = "marvell,mv64x60-pci";
247 reg = <0cf8 8>;
248 ranges = <01000000 0 0 88000000 0 01000000
249 02000000 0 80000000 80000000 0 08000000>;
250 bus-range = <0 ff>;
251 clock-frequency = <3EF1480>;
252 interrupt-pci-iack = <0c34>;
253 interrupt-parent = <&/mv64x60/pic>;
254 interrupt-map-mask = <f800 0 0 7>;
255 interrupt-map = <
256 /* IDSEL 0x0a */
257 5000 0 0 1 &/mv64x60/pic 50
258 5000 0 0 2 &/mv64x60/pic 51
259 5000 0 0 3 &/mv64x60/pic 5b
260 5000 0 0 4 &/mv64x60/pic 5d
261
262 /* IDSEL 0x0b */
263 5800 0 0 1 &/mv64x60/pic 5b
264 5800 0 0 2 &/mv64x60/pic 5d
265 5800 0 0 3 &/mv64x60/pic 50
266 5800 0 0 4 &/mv64x60/pic 51
267
268 /* IDSEL 0x0c */
269 6000 0 0 1 &/mv64x60/pic 5b
270 6000 0 0 2 &/mv64x60/pic 5d
271 6000 0 0 3 &/mv64x60/pic 50
272 6000 0 0 4 &/mv64x60/pic 51
273
274 /* IDSEL 0x0d */
275 6800 0 0 1 &/mv64x60/pic 5d
276 6800 0 0 2 &/mv64x60/pic 50
277 6800 0 0 3 &/mv64x60/pic 51
278 6800 0 0 4 &/mv64x60/pic 5b
279 >;
280 };
281
282 cpu-error@0070 {
283 compatible = "marvell,mv64x60-cpu-error";
284 reg = <0070 10 0128 28>;
285 interrupts = <03>;
286 interrupt-parent = <&/mv64x60/pic>;
287 };
288
289 sram-ctrl@0380 {
290 compatible = "marvell,mv64x60-sram-ctrl";
291 reg = <0380 80>;
292 interrupts = <0d>;
293 interrupt-parent = <&/mv64x60/pic>;
294 };
295
296 pci-error@1d40 {
297 compatible = "marvell,mv64x60-pci-error";
298 reg = <1d40 40 0c28 4>;
299 interrupts = <0c>;
300 interrupt-parent = <&/mv64x60/pic>;
301 };
302
303 mem-ctrl@1400 {
304 compatible = "marvell,mv64x60-mem-ctrl";
305 reg = <1400 60>;
306 interrupts = <11>;
307 interrupt-parent = <&/mv64x60/pic>;
308 };
309 };
310
311 chosen {
312 bootargs = "ip=on console=ttyMM0";
313 linux,stdout-path = "/mv64x60@f1000000/mpsc@8000";
314 };
315};
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 20:42:17 -0500