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-rw-r--r--arch/powerpc/boot/dts/pq2fads.dts126
1 files changed, 64 insertions, 62 deletions
diff --git a/arch/powerpc/boot/dts/pq2fads.dts b/arch/powerpc/boot/dts/pq2fads.dts
index 2d564921897a..b2d61091b36d 100644
--- a/arch/powerpc/boot/dts/pq2fads.dts
+++ b/arch/powerpc/boot/dts/pq2fads.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip. 2 * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
3 * 3 *
4 * Copyright 2007 Freescale Semiconductor Inc. 4 * Copyright 2007,2008 Freescale Semiconductor Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
@@ -9,6 +9,8 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/dts-v1/;
13
12/ { 14/ {
13 model = "pq2fads"; 15 model = "pq2fads";
14 compatible = "fsl,pq2fads"; 16 compatible = "fsl,pq2fads";
@@ -21,11 +23,11 @@
21 23
22 cpu@0 { 24 cpu@0 {
23 device_type = "cpu"; 25 device_type = "cpu";
24 reg = <0>; 26 reg = <0x0>;
25 d-cache-line-size = <d#32>; 27 d-cache-line-size = <32>;
26 i-cache-line-size = <d#32>; 28 i-cache-line-size = <32>;
27 d-cache-size = <d#16384>; 29 d-cache-size = <16384>;
28 i-cache-size = <d#16384>; 30 i-cache-size = <16384>;
29 timebase-frequency = <0>; 31 timebase-frequency = <0>;
30 clock-frequency = <0>; 32 clock-frequency = <0>;
31 }; 33 };
@@ -33,7 +35,7 @@
33 35
34 memory { 36 memory {
35 device_type = "memory"; 37 device_type = "memory";
36 reg = <0 0>; 38 reg = <0x0 0x0>;
37 }; 39 };
38 40
39 localbus@f0010100 { 41 localbus@f0010100 {
@@ -41,67 +43,67 @@
41 "fsl,pq2-localbus"; 43 "fsl,pq2-localbus";
42 #address-cells = <2>; 44 #address-cells = <2>;
43 #size-cells = <1>; 45 #size-cells = <1>;
44 reg = <f0010100 60>; 46 reg = <0xf0010100 0x60>;
45 47
46 ranges = <0 0 fe000000 00800000 48 ranges = <0x0 0x0 0xfe000000 0x800000
47 1 0 f4500000 00008000 49 0x1 0x0 0xf4500000 0x8000
48 8 0 f8200000 00008000>; 50 0x8 0x0 0xf8200000 0x8000>;
49 51
50 flash@0,0 { 52 flash@0,0 {
51 compatible = "jedec-flash"; 53 compatible = "jedec-flash";
52 reg = <0 0 800000>; 54 reg = <0x0 0x0 0x800000>;
53 bank-width = <4>; 55 bank-width = <4>;
54 device-width = <1>; 56 device-width = <1>;
55 }; 57 };
56 58
57 bcsr@1,0 { 59 bcsr@1,0 {
58 reg = <1 0 20>; 60 reg = <0x1 0x0 0x20>;
59 compatible = "fsl,pq2fads-bcsr"; 61 compatible = "fsl,pq2fads-bcsr";
60 }; 62 };
61 63
62 PCI_PIC: pic@8,0 { 64 PCI_PIC: pic@8,0 {
63 #interrupt-cells = <1>; 65 #interrupt-cells = <1>;
64 interrupt-controller; 66 interrupt-controller;
65 reg = <8 0 8>; 67 reg = <0x8 0x0 0x8>;
66 compatible = "fsl,pq2ads-pci-pic"; 68 compatible = "fsl,pq2ads-pci-pic";
67 interrupt-parent = <&PIC>; 69 interrupt-parent = <&PIC>;
68 interrupts = <18 8>; 70 interrupts = <24 8>;
69 }; 71 };
70 }; 72 };
71 73
72 pci@f0010800 { 74 pci@f0010800 {
73 device_type = "pci"; 75 device_type = "pci";
74 reg = <f0010800 10c f00101ac 8 f00101c4 8>; 76 reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
75 compatible = "fsl,mpc8280-pci", "fsl,pq2-pci"; 77 compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
76 #interrupt-cells = <1>; 78 #interrupt-cells = <1>;
77 #size-cells = <2>; 79 #size-cells = <2>;
78 #address-cells = <3>; 80 #address-cells = <3>;
79 clock-frequency = <d#66000000>; 81 clock-frequency = <66000000>;
80 interrupt-map-mask = <f800 0 0 7>; 82 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
81 interrupt-map = < 83 interrupt-map = <
82 /* IDSEL 0x16 */ 84 /* IDSEL 0x16 */
83 b000 0 0 1 &PCI_PIC 0 85 0xb000 0x0 0x0 0x1 &PCI_PIC 0
84 b000 0 0 2 &PCI_PIC 1 86 0xb000 0x0 0x0 0x2 &PCI_PIC 1
85 b000 0 0 3 &PCI_PIC 2 87 0xb000 0x0 0x0 0x3 &PCI_PIC 2
86 b000 0 0 4 &PCI_PIC 3 88 0xb000 0x0 0x0 0x4 &PCI_PIC 3
87 89
88 /* IDSEL 0x17 */ 90 /* IDSEL 0x17 */
89 b800 0 0 1 &PCI_PIC 4 91 0xb800 0x0 0x0 0x1 &PCI_PIC 4
90 b800 0 0 2 &PCI_PIC 5 92 0xb800 0x0 0x0 0x2 &PCI_PIC 5
91 b800 0 0 3 &PCI_PIC 6 93 0xb800 0x0 0x0 0x3 &PCI_PIC 6
92 b800 0 0 4 &PCI_PIC 7 94 0xb800 0x0 0x0 0x4 &PCI_PIC 7
93 95
94 /* IDSEL 0x18 */ 96 /* IDSEL 0x18 */
95 c000 0 0 1 &PCI_PIC 8 97 0xc000 0x0 0x0 0x1 &PCI_PIC 8
96 c000 0 0 2 &PCI_PIC 9 98 0xc000 0x0 0x0 0x2 &PCI_PIC 9
97 c000 0 0 3 &PCI_PIC a 99 0xc000 0x0 0x0 0x3 &PCI_PIC 10
98 c000 0 0 4 &PCI_PIC b>; 100 0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
99 101
100 interrupt-parent = <&PIC>; 102 interrupt-parent = <&PIC>;
101 interrupts = <12 8>; 103 interrupts = <18 8>;
102 ranges = <42000000 0 80000000 80000000 0 20000000 104 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
103 02000000 0 a0000000 a0000000 0 20000000 105 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
104 01000000 0 00000000 f6000000 0 02000000>; 106 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
105 }; 107 };
106 108
107 soc@f0000000 { 109 soc@f0000000 {
@@ -109,27 +111,27 @@
109 #size-cells = <1>; 111 #size-cells = <1>;
110 device_type = "soc"; 112 device_type = "soc";
111 compatible = "fsl,mpc8280", "fsl,pq2-soc"; 113 compatible = "fsl,mpc8280", "fsl,pq2-soc";
112 ranges = <00000000 f0000000 00053000>; 114 ranges = <0x0 0xf0000000 0x53000>;
113 115
114 // Temporary -- will go away once kernel uses ranges for get_immrbase(). 116 // Temporary -- will go away once kernel uses ranges for get_immrbase().
115 reg = <f0000000 00053000>; 117 reg = <0xf0000000 0x53000>;
116 118
117 cpm@119c0 { 119 cpm@119c0 {
118 #address-cells = <1>; 120 #address-cells = <1>;
119 #size-cells = <1>; 121 #size-cells = <1>;
120 #interrupt-cells = <2>; 122 #interrupt-cells = <2>;
121 compatible = "fsl,mpc8280-cpm", "fsl,cpm2"; 123 compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
122 reg = <119c0 30>; 124 reg = <0x119c0 0x30>;
123 ranges; 125 ranges;
124 126
125 muram@0 { 127 muram@0 {
126 #address-cells = <1>; 128 #address-cells = <1>;
127 #size-cells = <1>; 129 #size-cells = <1>;
128 ranges = <0 0 10000>; 130 ranges = <0x0 0x0 0x10000>;
129 131
130 data@0 { 132 data@0 {
131 compatible = "fsl,cpm-muram-data"; 133 compatible = "fsl,cpm-muram-data";
132 reg = <0 2000 9800 800>; 134 reg = <0x0 0x2000 0x9800 0x800>;
133 }; 135 };
134 }; 136 };
135 137
@@ -137,53 +139,53 @@
137 compatible = "fsl,mpc8280-brg", 139 compatible = "fsl,mpc8280-brg",
138 "fsl,cpm2-brg", 140 "fsl,cpm2-brg",
139 "fsl,cpm-brg"; 141 "fsl,cpm-brg";
140 reg = <119f0 10 115f0 10>; 142 reg = <0x119f0 0x10 0x115f0 0x10>;
141 }; 143 };
142 144
143 serial@11a00 { 145 serial@11a00 {
144 device_type = "serial"; 146 device_type = "serial";
145 compatible = "fsl,mpc8280-scc-uart", 147 compatible = "fsl,mpc8280-scc-uart",
146 "fsl,cpm2-scc-uart"; 148 "fsl,cpm2-scc-uart";
147 reg = <11a00 20 8000 100>; 149 reg = <0x11a00 0x20 0x8000 0x100>;
148 interrupts = <28 8>; 150 interrupts = <40 8>;
149 interrupt-parent = <&PIC>; 151 interrupt-parent = <&PIC>;
150 fsl,cpm-brg = <1>; 152 fsl,cpm-brg = <1>;
151 fsl,cpm-command = <00800000>; 153 fsl,cpm-command = <0x800000>;
152 }; 154 };
153 155
154 serial@11a20 { 156 serial@11a20 {
155 device_type = "serial"; 157 device_type = "serial";
156 compatible = "fsl,mpc8280-scc-uart", 158 compatible = "fsl,mpc8280-scc-uart",
157 "fsl,cpm2-scc-uart"; 159 "fsl,cpm2-scc-uart";
158 reg = <11a20 20 8100 100>; 160 reg = <0x11a20 0x20 0x8100 0x100>;
159 interrupts = <29 8>; 161 interrupts = <41 8>;
160 interrupt-parent = <&PIC>; 162 interrupt-parent = <&PIC>;
161 fsl,cpm-brg = <2>; 163 fsl,cpm-brg = <2>;
162 fsl,cpm-command = <04a00000>; 164 fsl,cpm-command = <0x4a00000>;
163 }; 165 };
164 166
165 ethernet@11320 { 167 ethernet@11320 {
166 device_type = "network"; 168 device_type = "network";
167 compatible = "fsl,mpc8280-fcc-enet", 169 compatible = "fsl,mpc8280-fcc-enet",
168 "fsl,cpm2-fcc-enet"; 170 "fsl,cpm2-fcc-enet";
169 reg = <11320 20 8500 100 113b0 1>; 171 reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
170 interrupts = <21 8>; 172 interrupts = <33 8>;
171 interrupt-parent = <&PIC>; 173 interrupt-parent = <&PIC>;
172 phy-handle = <&PHY0>; 174 phy-handle = <&PHY0>;
173 linux,network-index = <0>; 175 linux,network-index = <0>;
174 fsl,cpm-command = <16200300>; 176 fsl,cpm-command = <0x16200300>;
175 }; 177 };
176 178
177 ethernet@11340 { 179 ethernet@11340 {
178 device_type = "network"; 180 device_type = "network";
179 compatible = "fsl,mpc8280-fcc-enet", 181 compatible = "fsl,mpc8280-fcc-enet",
180 "fsl,cpm2-fcc-enet"; 182 "fsl,cpm2-fcc-enet";
181 reg = <11340 20 8600 100 113d0 1>; 183 reg = <0x11340 0x20 0x8600 0x100 0x113d0 0x1>;
182 interrupts = <22 8>; 184 interrupts = <34 8>;
183 interrupt-parent = <&PIC>; 185 interrupt-parent = <&PIC>;
184 phy-handle = <&PHY1>; 186 phy-handle = <&PHY1>;
185 linux,network-index = <1>; 187 linux,network-index = <1>;
186 fsl,cpm-command = <1a400300>; 188 fsl,cpm-command = <0x1a400300>;
187 local-mac-address = [00 e0 0c 00 79 01]; 189 local-mac-address = [00 e0 0c 00 79 01];
188 }; 190 };
189 191
@@ -194,21 +196,21 @@
194 "fsl,cpm2-mdio-bitbang"; 196 "fsl,cpm2-mdio-bitbang";
195 #address-cells = <1>; 197 #address-cells = <1>;
196 #size-cells = <0>; 198 #size-cells = <0>;
197 reg = <10d40 14>; 199 reg = <0x10d40 0x14>;
198 fsl,mdio-pin = <9>; 200 fsl,mdio-pin = <9>;
199 fsl,mdc-pin = <a>; 201 fsl,mdc-pin = <10>;
200 202
201 PHY0: ethernet-phy@0 { 203 PHY0: ethernet-phy@0 {
202 interrupt-parent = <&PIC>; 204 interrupt-parent = <&PIC>;
203 interrupts = <19 2>; 205 interrupts = <25 2>;
204 reg = <0>; 206 reg = <0x0>;
205 device_type = "ethernet-phy"; 207 device_type = "ethernet-phy";
206 }; 208 };
207 209
208 PHY1: ethernet-phy@1 { 210 PHY1: ethernet-phy@1 {
209 interrupt-parent = <&PIC>; 211 interrupt-parent = <&PIC>;
210 interrupts = <19 2>; 212 interrupts = <25 2>;
211 reg = <3>; 213 reg = <0x3>;
212 device_type = "ethernet-phy"; 214 device_type = "ethernet-phy";
213 }; 215 };
214 }; 216 };
@@ -218,17 +220,17 @@
218 #size-cells = <0>; 220 #size-cells = <0>;
219 compatible = "fsl,mpc8280-usb", 221 compatible = "fsl,mpc8280-usb",
220 "fsl,cpm2-usb"; 222 "fsl,cpm2-usb";
221 reg = <11b60 18 8b00 100>; 223 reg = <0x11b60 0x18 0x8b00 0x100>;
222 interrupt-parent = <&PIC>; 224 interrupt-parent = <&PIC>;
223 interrupts = <b 8>; 225 interrupts = <11 8>;
224 fsl,cpm-command = <2e600000>; 226 fsl,cpm-command = <0x2e600000>;
225 }; 227 };
226 }; 228 };
227 229
228 PIC: interrupt-controller@10c00 { 230 PIC: interrupt-controller@10c00 {
229 #interrupt-cells = <2>; 231 #interrupt-cells = <2>;
230 interrupt-controller; 232 interrupt-controller;
231 reg = <10c00 80>; 233 reg = <0x10c00 0x80>;
232 compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic"; 234 compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic";
233 }; 235 };
234 236
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-22 16:12:44 -0500