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-rw-r--r--arch/powerpc/boot/dts/p4080ds.dts95
1 files changed, 94 insertions, 1 deletions
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
index 5b7fc29dd6cf..c78e80155019 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P4080DS Device Tree Source 2 * P4080DS Device Tree Source
3 * 3 *
4 * Copyright 2009 Freescale Semiconductor Inc. 4 * Copyright 2009-2011 Freescale Semiconductor Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
@@ -33,6 +33,17 @@
33 dma1 = &dma1; 33 dma1 = &dma1;
34 sdhc = &sdhc; 34 sdhc = &sdhc;
35 35
36 crypto = &crypto;
37 sec_jr0 = &sec_jr0;
38 sec_jr1 = &sec_jr1;
39 sec_jr2 = &sec_jr2;
40 sec_jr3 = &sec_jr3;
41 rtic_a = &rtic_a;
42 rtic_b = &rtic_b;
43 rtic_c = &rtic_c;
44 rtic_d = &rtic_d;
45 sec_mon = &sec_mon;
46
36 rio0 = &rapidio0; 47 rio0 = &rapidio0;
37 }; 48 };
38 49
@@ -410,6 +421,88 @@
410 dr_mode = "host"; 421 dr_mode = "host";
411 phy_type = "ulpi"; 422 phy_type = "ulpi";
412 }; 423 };
424
425 crypto: crypto@300000 {
426 compatible = "fsl,p4080-sec4.0", "fsl,sec4.0";
427 #address-cells = <1>;
428 #size-cells = <1>;
429 reg = <0x300000 0x10000>;
430 ranges = <0 0x300000 0x10000>;
431 interrupt-parent = <&mpic>;
432 interrupts = <92 2>;
433
434 sec_jr0: jr@1000 {
435 compatible = "fsl,p4080-sec4.0-job-ring",
436 "fsl,sec4.0-job-ring";
437 reg = <0x1000 0x1000>;
438 interrupt-parent = <&mpic>;
439 interrupts = <88 2>;
440 };
441
442 sec_jr1: jr@2000 {
443 compatible = "fsl,p4080-sec4.0-job-ring",
444 "fsl,sec4.0-job-ring";
445 reg = <0x2000 0x1000>;
446 interrupt-parent = <&mpic>;
447 interrupts = <89 2>;
448 };
449
450 sec_jr2: jr@3000 {
451 compatible = "fsl,p4080-sec4.0-job-ring",
452 "fsl,sec4.0-job-ring";
453 reg = <0x3000 0x1000>;
454 interrupt-parent = <&mpic>;
455 interrupts = <90 2>;
456 };
457
458 sec_jr3: jr@4000 {
459 compatible = "fsl,p4080-sec4.0-job-ring",
460 "fsl,sec4.0-job-ring";
461 reg = <0x4000 0x1000>;
462 interrupt-parent = <&mpic>;
463 interrupts = <91 2>;
464 };
465
466 rtic@6000 {
467 compatible = "fsl,p4080-sec4.0-rtic",
468 "fsl,sec4.0-rtic";
469 #address-cells = <1>;
470 #size-cells = <1>;
471 reg = <0x6000 0x100>;
472 ranges = <0x0 0x6100 0xe00>;
473
474 rtic_a: rtic-a@0 {
475 compatible = "fsl,p4080-sec4.0-rtic-memory",
476 "fsl,sec4.0-rtic-memory";
477 reg = <0x00 0x20 0x100 0x80>;
478 };
479
480 rtic_b: rtic-b@20 {
481 compatible = "fsl,p4080-sec4.0-rtic-memory",
482 "fsl,sec4.0-rtic-memory";
483 reg = <0x20 0x20 0x200 0x80>;
484 };
485
486 rtic_c: rtic-c@40 {
487 compatible = "fsl,p4080-sec4.0-rtic-memory",
488 "fsl,sec4.0-rtic-memory";
489 reg = <0x40 0x20 0x300 0x80>;
490 };
491
492 rtic_d: rtic-d@60 {
493 compatible = "fsl,p4080-sec4.0-rtic-memory",
494 "fsl,sec4.0-rtic-memory";
495 reg = <0x60 0x20 0x500 0x80>;
496 };
497 };
498 };
499
500 sec_mon: sec_mon@314000 {
501 compatible = "fsl,p4080-sec4.0-mon", "fsl,sec4.0-mon";
502 reg = <0x314000 0x1000>;
503 interrupt-parent = <&mpic>;
504 interrupts = <93 2>;
505 };
413 }; 506 };
414 507
415 rapidio0: rapidio@ffe0c0000 { 508 rapidio0: rapidio@ffe0c0000 {