1 files changed, 19 insertions, 5 deletions

diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
index c7916dc28014..6d60e54e50a0 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "p4080si.dtsi"
+/include/ "fsl/p4080si-pre.dtsi"
 
 / {
         model = "fsl,P4080DS";
@@ -50,6 +50,9 @@
         };
 
         soc: soc@ffe000000 {
+                ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+                reg = <0xf 0xfe000000 0 0x00001000>;
+
                 spi@110000 {
                         flash@0 {
                                 #address-cells = <1>;
@@ -105,12 +108,18 @@
                 };
         };
 
-        rapidio0: rapidio@ffe0c0000 {
-                reg = <0xf 0xfe0c0000 0 0x20000>;
-                ranges = <0 0 0xc 0x20000000 0 0x01000000>;
+        rio: rapidio@ffe0c0000 {
+                reg = <0xf 0xfe0c0000 0 0x11000>;
+
+                port1 {
+                        ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+                };
+                port2 {
+                        ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+                };
         };
 
-        localbus@ffe124000 {
+        lbc: localbus@ffe124000 {
                 reg = <0xf 0xfe124000 0 0x1000>;
                 ranges = <0 0 0xf 0xe8000000 0x08000000
                           3 0 0xf 0xffdf0000 0x00008000>;
@@ -132,6 +141,7 @@
                 reg = <0xf 0xfe200000 0 0x1000>;
                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
+                fsl,msi = <&msi0>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -147,6 +157,7 @@
                 reg = <0xf 0xfe201000 0 0x1000>;
                 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
                           0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
+                fsl,msi = <&msi1>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -162,6 +173,7 @@
                 reg = <0xf 0xfe202000 0 0x1000>;
                 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
                           0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
+                fsl,msi = <&msi2>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -174,3 +186,5 @@
         };
 
 };
+
+/include/ "fsl/p4080si-post.dtsi"