1 files changed, 234 insertions, 0 deletions

diff --git a/arch/powerpc/boot/dts/p1022ds.dtsi b/arch/powerpc/boot/dts/p1022ds.dtsi
new file mode 100644
index 000000000000..7cdb505036bb
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1022ds.dtsi
@@ -0,0 +1,234 @@
+/*
+ * P1022 DS Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&board_lbc {
+        /*
+         * This node is used to access the pixis via "indirect" mode,
+         * which is done by writing the pixis register index to chip
+         * select 0 and the value to/from chip select 1.  Indirect
+         * mode is the only way to access the pixis when DIU video
+         * is enabled.  Note that this assumes that the first column
+         * of the 'ranges' property above is the chip select number.
+         */
+        board-control@0,0 {
+                compatible = "fsl,p1022ds-indirect-pixis";
+                reg = <0x0 0x0 1        /* CS0 */
+                       0x1 0x0 1>;      /* CS1 */
+                interrupt-parent = <&mpic>;
+                interrupts = <8 0 0 0>;
+        };
+
+        nor@0,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "cfi-flash";
+                reg = <0x0 0x0 0x8000000>;
+                bank-width = <2>;
+                device-width = <1>;
+
+                partition@0 {
+                        reg = <0x0 0x03000000>;
+                        label = "ramdisk-nor";
+                        read-only;
+                };
+
+                partition@3000000 {
+                        reg = <0x03000000 0x00e00000>;
+                        label = "diagnostic-nor";
+                        read-only;
+                };
+
+                partition@3e00000 {
+                        reg = <0x03e00000 0x00200000>;
+                        label = "dink-nor";
+                        read-only;
+                };
+
+                partition@4000000 {
+                        reg = <0x04000000 0x00400000>;
+                        label = "kernel-nor";
+                        read-only;
+                };
+
+                partition@4400000 {
+                        reg = <0x04400000 0x03b00000>;
+                        label = "jffs2-nor";
+                };
+
+                partition@7f00000 {
+                        reg = <0x07f00000 0x00080000>;
+                        label = "dtb-nor";
+                        read-only;
+                };
+
+                partition@7f80000 {
+                        reg = <0x07f80000 0x00080000>;
+                        label = "u-boot-nor";
+                        read-only;
+                };
+        };
+
+        nand@2,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,elbc-fcm-nand";
+                reg = <0x2 0x0 0x40000>;
+
+                partition@0 {
+                        reg = <0x0 0x02000000>;
+                        label = "u-boot-nand";
+                        read-only;
+                };
+
+                partition@2000000 {
+                        reg = <0x02000000 0x10000000>;
+                        label = "jffs2-nand";
+                };
+
+                partition@12000000 {
+                        reg = <0x12000000 0x10000000>;
+                        label = "ramdisk-nand";
+                        read-only;
+                };
+
+                partition@22000000 {
+                        reg = <0x22000000 0x04000000>;
+                        label = "kernel-nand";
+                };
+
+                partition@26000000 {
+                        reg = <0x26000000 0x01000000>;
+                        label = "dtb-nand";
+                        read-only;
+                };
+
+                partition@27000000 {
+                        reg = <0x27000000 0x19000000>;
+                        label = "reserved-nand";
+                };
+        };
+
+        board-control@3,0 {
+                compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
+                reg = <3 0 0x30>;
+                interrupt-parent = <&mpic>;
+                /*
+                 * IRQ8 is generated if the "EVENT" switch is pressed
+                 * and PX_CTL[EVESEL] is set to 00.
+                 */
+                interrupts = <8 0 0 0>;
+        };
+};
+
+&board_soc {
+        i2c@3100 {
+                wm8776:codec@1a {
+                        compatible = "wlf,wm8776";
+                        reg = <0x1a>;
+                        /*
+                         * clock-frequency will be set by U-Boot if
+                         * the clock is enabled.
+                         */
+                };
+        };
+
+        spi@7000 {
+                flash@0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "spansion,s25sl12801";
+                        reg = <0>;
+                        spi-max-frequency = <40000000>; /* input clock */
+
+                        partition@0 {
+                                label = "u-boot-spi";
+                                reg = <0x00000000 0x00100000>;
+                                read-only;
+                        };
+                        partition@100000 {
+                                label = "kernel-spi";
+                                reg = <0x00100000 0x00500000>;
+                                read-only;
+                        };
+                        partition@600000 {
+                                label = "dtb-spi";
+                                reg = <0x00600000 0x00100000>;
+                                read-only;
+                        };
+                        partition@700000 {
+                                label = "file system-spi";
+                                reg = <0x00700000 0x00900000>;
+                        };
+                };
+        };
+
+        ssi@15000 {
+                fsl,mode = "i2s-slave";
+                codec-handle = <&wm8776>;
+                fsl,ssi-asynchronous;
+        };
+
+        usb@22000 {
+                phy_type = "ulpi";
+        };
+
+        usb@23000 {
+                status = "disabled";
+        };
+
+        mdio@24000 {
+                phy0: ethernet-phy@0 {
+                        interrupts = <3 1 0 0>;
+                        reg = <0x1>;
+                };
+                phy1: ethernet-phy@1 {
+                        interrupts = <9 1 0 0>;
+                        reg = <0x2>;
+                };
+                tbi-phy@2 {
+                        device_type = "tbi-phy";
+                        reg = <0x2>;
+                };
+        };
+
+        ethernet@b0000 {
+                phy-handle = <&phy0>;
+                phy-connection-type = "rgmii-id";
+        };
+
+        ethernet@b1000 {
+                phy-handle = <&phy1>;
+                phy-connection-type = "rgmii-id";
+        };
+};