1 files changed, 24 insertions, 15 deletions

diff --git a/arch/powerpc/boot/dts/mpc8572ds_36b.dts b/arch/powerpc/boot/dts/mpc8572ds_36b.dts
index dbd81a764742..f6365db3b97d 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_36b.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_36b.dts
@@ -182,9 +182,21 @@
                 device_type = "soc";
                 compatible = "simple-bus";
                 ranges = <0x0 0xf 0xffe00000 0x100000>;
-                reg = <0xf 0xffe00000 0 0x1000>;        // CCSRBAR & soc regs, remove once parse code for immrbase fixed
                 bus-frequency = <0>;            // Filled out by uboot.
 
+                ecm-law@0 {
+                        compatible = "fsl,ecm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <12>;
+                };
+
+                ecm@1000 {
+                        compatible = "fsl,mpc8572-ecm", "fsl,ecm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <17 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
                 memory-controller@2000 {
                         compatible = "fsl,mpc8572-memory-controller";
                         reg = <0x2000 0x1000>;
@@ -514,7 +526,6 @@
         };
 
         pci0: pcie@fffe08000 {
-                cell-index = <0>;
                 compatible = "fsl,mpc8548-pcie";
                 device_type = "pci";
                 #interrupt-cells = <1>;
@@ -522,7 +533,7 @@
                 #address-cells = <3>;
                 reg = <0xf 0xffe08000 0 0x1000>;
                 bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xc0000000 0xc 0x00000000 0x0 0x20000000
+                ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000>;
                 clock-frequency = <33333333>;
                 interrupt-parent = <&mpic>;
@@ -649,8 +660,8 @@
                         #size-cells = <2>;
                         #address-cells = <3>;
                         device_type = "pci";
-                        ranges = <0x2000000 0x0 0xc0000000
-                                  0x2000000 0x0 0xc0000000
+                        ranges = <0x2000000 0x0 0xe0000000
+                                  0x2000000 0x0 0xe0000000
                                   0x0 0x20000000
 
                                   0x1000000 0x0 0x0
@@ -660,8 +671,8 @@
                                 reg = <0x0 0x0 0x0 0x0 0x0>;
                                 #size-cells = <2>;
                                 #address-cells = <3>;
-                                ranges = <0x2000000 0x0 0xc0000000
-                                          0x2000000 0x0 0xc0000000
+                                ranges = <0x2000000 0x0 0xe0000000
+                                          0x2000000 0x0 0xe0000000
                                           0x0 0x20000000
 
                                           0x1000000 0x0 0x0
@@ -724,7 +735,6 @@
         };
 
         pci1: pcie@fffe09000 {
-                cell-index = <1>;
                 compatible = "fsl,mpc8548-pcie";
                 device_type = "pci";
                 #interrupt-cells = <1>;
@@ -732,7 +742,7 @@
                 #address-cells = <3>;
                 reg = <0xf 0xffe09000 0 0x1000>;
                 bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
+                ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x00010000>;
                 clock-frequency = <33333333>;
                 interrupt-parent = <&mpic>;
@@ -750,8 +760,8 @@
                         #size-cells = <2>;
                         #address-cells = <3>;
                         device_type = "pci";
-                        ranges = <0x2000000 0x0 0xc0000000
-                                  0x2000000 0x0 0xc0000000
+                        ranges = <0x2000000 0x0 0xe0000000
+                                  0x2000000 0x0 0xe0000000
                                   0x0 0x20000000
 
                                   0x1000000 0x0 0x0
@@ -761,7 +771,6 @@
         };
 
         pci2: pcie@fffe0a000 {
-                cell-index = <2>;
                 compatible = "fsl,mpc8548-pcie";
                 device_type = "pci";
                 #interrupt-cells = <1>;
@@ -769,7 +778,7 @@
                 #address-cells = <3>;
                 reg = <0xf 0xffe0a000 0 0x1000>;
                 bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xc0000000 0xc 0x40000000 0x0 0x20000000
+                ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x00010000>;
                 clock-frequency = <33333333>;
                 interrupt-parent = <&mpic>;
@@ -787,8 +796,8 @@
                         #size-cells = <2>;
                         #address-cells = <3>;
                         device_type = "pci";
-                        ranges = <0x2000000 0x0 0xc0000000
-                                  0x2000000 0x0 0xc0000000
+                        ranges = <0x2000000 0x0 0xe0000000
+                                  0x2000000 0x0 0xe0000000
                                   0x0 0x20000000
 
                                   0x1000000 0x0 0x0