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Diffstat (limited to 'arch/powerpc/boot/dts/mpc8572ds.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds.dts27
1 files changed, 13 insertions, 14 deletions
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index e124dd18fb5a..cadd4652a695 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -13,8 +13,8 @@
13/ { 13/ {
14 model = "fsl,MPC8572DS"; 14 model = "fsl,MPC8572DS";
15 compatible = "fsl,MPC8572DS"; 15 compatible = "fsl,MPC8572DS";
16 #address-cells = <1>; 16 #address-cells = <2>;
17 #size-cells = <1>; 17 #size-cells = <2>;
18 18
19 aliases { 19 aliases {
20 ethernet0 = &enet0; 20 ethernet0 = &enet0;
@@ -61,7 +61,6 @@
61 61
62 memory { 62 memory {
63 device_type = "memory"; 63 device_type = "memory";
64 reg = <0x0 0x0>; // Filled by U-Boot
65 }; 64 };
66 65
67 soc8572@ffe00000 { 66 soc8572@ffe00000 {
@@ -69,8 +68,8 @@
69 #size-cells = <1>; 68 #size-cells = <1>;
70 device_type = "soc"; 69 device_type = "soc";
71 compatible = "simple-bus"; 70 compatible = "simple-bus";
72 ranges = <0x0 0xffe00000 0x100000>; 71 ranges = <0x0 0 0xffe00000 0x100000>;
73 reg = <0xffe00000 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed 72 reg = <0 0xffe00000 0 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed
74 bus-frequency = <0>; // Filled out by uboot. 73 bus-frequency = <0>; // Filled out by uboot.
75 74
76 memory-controller@2000 { 75 memory-controller@2000 {
@@ -351,10 +350,10 @@
351 #interrupt-cells = <1>; 350 #interrupt-cells = <1>;
352 #size-cells = <2>; 351 #size-cells = <2>;
353 #address-cells = <3>; 352 #address-cells = <3>;
354 reg = <0xffe08000 0x1000>; 353 reg = <0 0xffe08000 0 0x1000>;
355 bus-range = <0 255>; 354 bus-range = <0 255>;
356 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 355 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
357 0x1000000 0x0 0x0 0xffc00000 0x0 0x10000>; 356 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>;
358 clock-frequency = <33333333>; 357 clock-frequency = <33333333>;
359 interrupt-parent = <&mpic>; 358 interrupt-parent = <&mpic>;
360 interrupts = <24 2>; 359 interrupts = <24 2>;
@@ -561,10 +560,10 @@
561 #interrupt-cells = <1>; 560 #interrupt-cells = <1>;
562 #size-cells = <2>; 561 #size-cells = <2>;
563 #address-cells = <3>; 562 #address-cells = <3>;
564 reg = <0xffe09000 0x1000>; 563 reg = <0 0xffe09000 0 0x1000>;
565 bus-range = <0 255>; 564 bus-range = <0 255>;
566 ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 565 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
567 0x1000000 0x0 0x0 0xffc10000 0x0 0x10000>; 566 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>;
568 clock-frequency = <33333333>; 567 clock-frequency = <33333333>;
569 interrupt-parent = <&mpic>; 568 interrupt-parent = <&mpic>;
570 interrupts = <26 2>; 569 interrupts = <26 2>;
@@ -598,10 +597,10 @@
598 #interrupt-cells = <1>; 597 #interrupt-cells = <1>;
599 #size-cells = <2>; 598 #size-cells = <2>;
600 #address-cells = <3>; 599 #address-cells = <3>;
601 reg = <0xffe0a000 0x1000>; 600 reg = <0 0xffe0a000 0 0x1000>;
602 bus-range = <0 255>; 601 bus-range = <0 255>;
603 ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000 602 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
604 0x1000000 0x0 0x0 0xffc20000 0x0 0x10000>; 603 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>;
605 clock-frequency = <33333333>; 604 clock-frequency = <33333333>;
606 interrupt-parent = <&mpic>; 605 interrupt-parent = <&mpic>;
607 interrupts = <27 2>; 606 interrupts = <27 2>;