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-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dts5
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 3e79bf0a3159..88082ac6f2cd 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -30,7 +30,6 @@
30 timebase-frequency = <0>; 30 timebase-frequency = <0>;
31 bus-frequency = <0>; 31 bus-frequency = <0>;
32 clock-frequency = <0>; 32 clock-frequency = <0>;
33 32-bit;
34 }; 33 };
35 }; 34 };
36 35
@@ -42,7 +41,6 @@
42 soc8544@e0000000 { 41 soc8544@e0000000 {
43 #address-cells = <1>; 42 #address-cells = <1>;
44 #size-cells = <1>; 43 #size-cells = <1>;
45 #interrupt-cells = <2>;
46 device_type = "soc"; 44 device_type = "soc";
47 45
48 46
@@ -295,12 +293,10 @@
295 reg = <1 20 2 293 reg = <1 20 2
296 1 a0 2 294 1 a0 2
297 1 4d0 2>; 295 1 4d0 2>;
298 clock-frequency = <0>;
299 interrupt-controller; 296 interrupt-controller;
300 device_type = "interrupt-controller"; 297 device_type = "interrupt-controller";
301 #address-cells = <0>; 298 #address-cells = <0>;
302 #interrupt-cells = <2>; 299 #interrupt-cells = <2>;
303 built-in;
304 compatible = "chrp,iic"; 300 compatible = "chrp,iic";
305 interrupts = <9 2>; 301 interrupts = <9 2>;
306 interrupt-parent = <&mpic>; 302 interrupt-parent = <&mpic>;
@@ -350,7 +346,6 @@
350 #address-cells = <0>; 346 #address-cells = <0>;
351 #interrupt-cells = <2>; 347 #interrupt-cells = <2>;
352 reg = <40000 40000>; 348 reg = <40000 40000>;
353 built-in;
354 compatible = "chrp,open-pic"; 349 compatible = "chrp,open-pic";
355 device_type = "open-pic"; 350 device_type = "open-pic";
356 big-endian; 351 big-endian;