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-rw-r--r--arch/powerpc/boot/dts/mpc8541cds.dts108
1 files changed, 49 insertions, 59 deletions
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 7be0bc659e1c..2a1ae760ab3a 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -12,16 +12,14 @@
12 12
13/ { 13/ {
14 model = "MPC8541CDS"; 14 model = "MPC8541CDS";
15 compatible = "MPC85xxCDS"; 15 compatible = "MPC8541CDS", "MPC85xxCDS";
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <1>; 17 #size-cells = <1>;
18 linux,phandle = <100>;
19 18
20 cpus { 19 cpus {
21 #cpus = <1>; 20 #cpus = <1>;
22 #address-cells = <1>; 21 #address-cells = <1>;
23 #size-cells = <0>; 22 #size-cells = <0>;
24 linux,phandle = <200>;
25 23
26 PowerPC,8541@0 { 24 PowerPC,8541@0 {
27 device_type = "cpu"; 25 device_type = "cpu";
@@ -34,13 +32,11 @@
34 bus-frequency = <0>; // 166 MHz 32 bus-frequency = <0>; // 166 MHz
35 clock-frequency = <0>; // 825 MHz, from uboot 33 clock-frequency = <0>; // 825 MHz, from uboot
36 32-bit; 34 32-bit;
37 linux,phandle = <201>;
38 }; 35 };
39 }; 36 };
40 37
41 memory { 38 memory {
42 device_type = "memory"; 39 device_type = "memory";
43 linux,phandle = <300>;
44 reg = <00000000 08000000>; // 128M at 0x0 40 reg = <00000000 08000000>; // 128M at 0x0
45 }; 41 };
46 42
@@ -58,7 +54,7 @@
58 compatible = "fsl-i2c"; 54 compatible = "fsl-i2c";
59 reg = <3000 100>; 55 reg = <3000 100>;
60 interrupts = <1b 2>; 56 interrupts = <1b 2>;
61 interrupt-parent = <40000>; 57 interrupt-parent = <&mpic>;
62 dfsrr; 58 dfsrr;
63 }; 59 };
64 60
@@ -68,17 +64,14 @@
68 device_type = "mdio"; 64 device_type = "mdio";
69 compatible = "gianfar"; 65 compatible = "gianfar";
70 reg = <24520 20>; 66 reg = <24520 20>;
71 linux,phandle = <24520>; 67 phy0: ethernet-phy@0 {
72 ethernet-phy@0 { 68 interrupt-parent = <&mpic>;
73 linux,phandle = <2452000>;
74 interrupt-parent = <40000>;
75 interrupts = <35 0>; 69 interrupts = <35 0>;
76 reg = <0>; 70 reg = <0>;
77 device_type = "ethernet-phy"; 71 device_type = "ethernet-phy";
78 }; 72 };
79 ethernet-phy@1 { 73 phy1: ethernet-phy@1 {
80 linux,phandle = <2452001>; 74 interrupt-parent = <&mpic>;
81 interrupt-parent = <40000>;
82 interrupts = <35 0>; 75 interrupts = <35 0>;
83 reg = <1>; 76 reg = <1>;
84 device_type = "ethernet-phy"; 77 device_type = "ethernet-phy";
@@ -94,8 +87,8 @@
94 reg = <24000 1000>; 87 reg = <24000 1000>;
95 local-mac-address = [ 00 E0 0C 00 73 00 ]; 88 local-mac-address = [ 00 E0 0C 00 73 00 ];
96 interrupts = <d 2 e 2 12 2>; 89 interrupts = <d 2 e 2 12 2>;
97 interrupt-parent = <40000>; 90 interrupt-parent = <&mpic>;
98 phy-handle = <2452000>; 91 phy-handle = <&phy0>;
99 }; 92 };
100 93
101 ethernet@25000 { 94 ethernet@25000 {
@@ -107,8 +100,8 @@
107 reg = <25000 1000>; 100 reg = <25000 1000>;
108 local-mac-address = [ 00 E0 0C 00 73 01 ]; 101 local-mac-address = [ 00 E0 0C 00 73 01 ];
109 interrupts = <13 2 14 2 18 2>; 102 interrupts = <13 2 14 2 18 2>;
110 interrupt-parent = <40000>; 103 interrupt-parent = <&mpic>;
111 phy-handle = <2452001>; 104 phy-handle = <&phy1>;
112 }; 105 };
113 106
114 serial@4500 { 107 serial@4500 {
@@ -117,7 +110,7 @@
117 reg = <4500 100>; // reg base, size 110 reg = <4500 100>; // reg base, size
118 clock-frequency = <0>; // should we fill in in uboot? 111 clock-frequency = <0>; // should we fill in in uboot?
119 interrupts = <1a 2>; 112 interrupts = <1a 2>;
120 interrupt-parent = <40000>; 113 interrupt-parent = <&mpic>;
121 }; 114 };
122 115
123 serial@4600 { 116 serial@4600 {
@@ -126,57 +119,56 @@
126 reg = <4600 100>; // reg base, size 119 reg = <4600 100>; // reg base, size
127 clock-frequency = <0>; // should we fill in in uboot? 120 clock-frequency = <0>; // should we fill in in uboot?
128 interrupts = <1a 2>; 121 interrupts = <1a 2>;
129 interrupt-parent = <40000>; 122 interrupt-parent = <&mpic>;
130 }; 123 };
131 124
132 pci@8000 { 125 pci1: pci@8000 {
133 linux,phandle = <8000>;
134 interrupt-map-mask = <1f800 0 0 7>; 126 interrupt-map-mask = <1f800 0 0 7>;
135 interrupt-map = < 127 interrupt-map = <
136 128
137 /* IDSEL 0x10 */ 129 /* IDSEL 0x10 */
138 08000 0 0 1 40000 30 1 130 08000 0 0 1 &mpic 30 1
139 08000 0 0 2 40000 31 1 131 08000 0 0 2 &mpic 31 1
140 08000 0 0 3 40000 32 1 132 08000 0 0 3 &mpic 32 1
141 08000 0 0 4 40000 33 1 133 08000 0 0 4 &mpic 33 1
142 134
143 /* IDSEL 0x11 */ 135 /* IDSEL 0x11 */
144 08800 0 0 1 40000 30 1 136 08800 0 0 1 &mpic 30 1
145 08800 0 0 2 40000 31 1 137 08800 0 0 2 &mpic 31 1
146 08800 0 0 3 40000 32 1 138 08800 0 0 3 &mpic 32 1
147 08800 0 0 4 40000 33 1 139 08800 0 0 4 &mpic 33 1
148 140
149 /* IDSEL 0x12 (Slot 1) */ 141 /* IDSEL 0x12 (Slot 1) */
150 09000 0 0 1 40000 30 1 142 09000 0 0 1 &mpic 30 1
151 09000 0 0 2 40000 31 1 143 09000 0 0 2 &mpic 31 1
152 09000 0 0 3 40000 32 1 144 09000 0 0 3 &mpic 32 1
153 09000 0 0 4 40000 33 1 145 09000 0 0 4 &mpic 33 1
154 146
155 /* IDSEL 0x13 (Slot 2) */ 147 /* IDSEL 0x13 (Slot 2) */
156 09800 0 0 1 40000 31 1 148 09800 0 0 1 &mpic 31 1
157 09800 0 0 2 40000 32 1 149 09800 0 0 2 &mpic 32 1
158 09800 0 0 3 40000 33 1 150 09800 0 0 3 &mpic 33 1
159 09800 0 0 4 40000 30 1 151 09800 0 0 4 &mpic 30 1
160 152
161 /* IDSEL 0x14 (Slot 3) */ 153 /* IDSEL 0x14 (Slot 3) */
162 0a000 0 0 1 40000 32 1 154 0a000 0 0 1 &mpic 32 1
163 0a000 0 0 2 40000 33 1 155 0a000 0 0 2 &mpic 33 1
164 0a000 0 0 3 40000 30 1 156 0a000 0 0 3 &mpic 30 1
165 0a000 0 0 4 40000 31 1 157 0a000 0 0 4 &mpic 31 1
166 158
167 /* IDSEL 0x15 (Slot 4) */ 159 /* IDSEL 0x15 (Slot 4) */
168 0a800 0 0 1 40000 33 1 160 0a800 0 0 1 &mpic 33 1
169 0a800 0 0 2 40000 30 1 161 0a800 0 0 2 &mpic 30 1
170 0a800 0 0 3 40000 31 1 162 0a800 0 0 3 &mpic 31 1
171 0a800 0 0 4 40000 32 1 163 0a800 0 0 4 &mpic 32 1
172 164
173 /* Bus 1 (Tundra Bridge) */ 165 /* Bus 1 (Tundra Bridge) */
174 /* IDSEL 0x12 (ISA bridge) */ 166 /* IDSEL 0x12 (ISA bridge) */
175 19000 0 0 1 40000 30 1 167 19000 0 0 1 &mpic 30 1
176 19000 0 0 2 40000 31 1 168 19000 0 0 2 &mpic 31 1
177 19000 0 0 3 40000 32 1 169 19000 0 0 3 &mpic 32 1
178 19000 0 0 4 40000 33 1>; 170 19000 0 0 4 &mpic 33 1>;
179 interrupt-parent = <40000>; 171 interrupt-parent = <&mpic>;
180 interrupts = <08 2>; 172 interrupts = <08 2>;
181 bus-range = <0 0>; 173 bus-range = <0 0>;
182 ranges = <02000000 0 80000000 80000000 0 20000000 174 ranges = <02000000 0 80000000 80000000 0 20000000
@@ -200,21 +192,20 @@
200 compatible = "chrp,iic"; 192 compatible = "chrp,iic";
201 big-endian; 193 big-endian;
202 interrupts = <1>; 194 interrupts = <1>;
203 interrupt-parent = <8000>; 195 interrupt-parent = <&pci1>;
204 }; 196 };
205 }; 197 };
206 198
207 pci@9000 { 199 pci@9000 {
208 linux,phandle = <9000>;
209 interrupt-map-mask = <f800 0 0 7>; 200 interrupt-map-mask = <f800 0 0 7>;
210 interrupt-map = < 201 interrupt-map = <
211 202
212 /* IDSEL 0x15 */ 203 /* IDSEL 0x15 */
213 a800 0 0 1 40000 3b 1 204 a800 0 0 1 &mpic 3b 1
214 a800 0 0 2 40000 3b 1 205 a800 0 0 2 &mpic 3b 1
215 a800 0 0 3 40000 3b 1 206 a800 0 0 3 &mpic 3b 1
216 a800 0 0 4 40000 3b 1>; 207 a800 0 0 4 &mpic 3b 1>;
217 interrupt-parent = <40000>; 208 interrupt-parent = <&mpic>;
218 interrupts = <09 2>; 209 interrupts = <09 2>;
219 bus-range = <0 0>; 210 bus-range = <0 0>;
220 ranges = <02000000 0 a0000000 a0000000 0 20000000 211 ranges = <02000000 0 a0000000 a0000000 0 20000000
@@ -228,8 +219,7 @@
228 device_type = "pci"; 219 device_type = "pci";
229 }; 220 };
230 221
231 pic@40000 { 222 mpic: pic@40000 {
232 linux,phandle = <40000>;
233 clock-frequency = <0>; 223 clock-frequency = <0>;
234 interrupt-controller; 224 interrupt-controller;
235 #address-cells = <0>; 225 #address-cells = <0>;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-30 16:20:21 -0500