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Diffstat (limited to 'arch/powerpc/boot/dts/mpc8540ads.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8540ads.dts172
1 files changed, 86 insertions, 86 deletions
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index e038c04b4220..6442a717ec3b 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -171,104 +171,104 @@
171 interrupts = <2a 2>; 171 interrupts = <2a 2>;
172 interrupt-parent = <&mpic>; 172 interrupt-parent = <&mpic>;
173 }; 173 };
174 pci@8000 { 174 mpic: pic@40000 {
175 interrupt-map-mask = <f800 0 0 7>; 175 clock-frequency = <0>;
176 interrupt-map = < 176 interrupt-controller;
177 #address-cells = <0>;
178 #interrupt-cells = <2>;
179 reg = <40000 40000>;
180 compatible = "chrp,open-pic";
181 device_type = "open-pic";
182 big-endian;
183 };
184 };
177 185
178 /* IDSEL 0x02 */ 186 pci@e0008000 {
179 1000 0 0 1 &mpic 1 1 187 interrupt-map-mask = <f800 0 0 7>;
180 1000 0 0 2 &mpic 2 1 188 interrupt-map = <
181 1000 0 0 3 &mpic 3 1
182 1000 0 0 4 &mpic 4 1
183 189
184 /* IDSEL 0x03 */ 190 /* IDSEL 0x02 */
185 1800 0 0 1 &mpic 4 1 191 1000 0 0 1 &mpic 1 1
186 1800 0 0 2 &mpic 1 1 192 1000 0 0 2 &mpic 2 1
187 1800 0 0 3 &mpic 2 1 193 1000 0 0 3 &mpic 3 1
188 1800 0 0 4 &mpic 3 1 194 1000 0 0 4 &mpic 4 1
189 195
190 /* IDSEL 0x04 */ 196 /* IDSEL 0x03 */
191 2000 0 0 1 &mpic 3 1 197 1800 0 0 1 &mpic 4 1
192 2000 0 0 2 &mpic 4 1 198 1800 0 0 2 &mpic 1 1
193 2000 0 0 3 &mpic 1 1 199 1800 0 0 3 &mpic 2 1
194 2000 0 0 4 &mpic 2 1 200 1800 0 0 4 &mpic 3 1
195 201
196 /* IDSEL 0x05 */ 202 /* IDSEL 0x04 */
197 2800 0 0 1 &mpic 2 1 203 2000 0 0 1 &mpic 3 1
198 2800 0 0 2 &mpic 3 1 204 2000 0 0 2 &mpic 4 1
199 2800 0 0 3 &mpic 4 1 205 2000 0 0 3 &mpic 1 1
200 2800 0 0 4 &mpic 1 1 206 2000 0 0 4 &mpic 2 1
201 207
202 /* IDSEL 0x0c */ 208 /* IDSEL 0x05 */
203 6000 0 0 1 &mpic 1 1 209 2800 0 0 1 &mpic 2 1
204 6000 0 0 2 &mpic 2 1 210 2800 0 0 2 &mpic 3 1
205 6000 0 0 3 &mpic 3 1 211 2800 0 0 3 &mpic 4 1
206 6000 0 0 4 &mpic 4 1 212 2800 0 0 4 &mpic 1 1
207 213
208 /* IDSEL 0x0d */ 214 /* IDSEL 0x0c */
209 6800 0 0 1 &mpic 4 1 215 6000 0 0 1 &mpic 1 1
210 6800 0 0 2 &mpic 1 1 216 6000 0 0 2 &mpic 2 1
211 6800 0 0 3 &mpic 2 1 217 6000 0 0 3 &mpic 3 1
212 6800 0 0 4 &mpic 3 1 218 6000 0 0 4 &mpic 4 1
213 219
214 /* IDSEL 0x0e */ 220 /* IDSEL 0x0d */
215 7000 0 0 1 &mpic 3 1 221 6800 0 0 1 &mpic 4 1
216 7000 0 0 2 &mpic 4 1 222 6800 0 0 2 &mpic 1 1
217 7000 0 0 3 &mpic 1 1 223 6800 0 0 3 &mpic 2 1
218 7000 0 0 4 &mpic 2 1 224 6800 0 0 4 &mpic 3 1
219 225
220 /* IDSEL 0x0f */ 226 /* IDSEL 0x0e */
221 7800 0 0 1 &mpic 2 1 227 7000 0 0 1 &mpic 3 1
222 7800 0 0 2 &mpic 3 1 228 7000 0 0 2 &mpic 4 1
223 7800 0 0 3 &mpic 4 1 229 7000 0 0 3 &mpic 1 1
224 7800 0 0 4 &mpic 1 1 230 7000 0 0 4 &mpic 2 1
225 231
226 /* IDSEL 0x12 */ 232 /* IDSEL 0x0f */
227 9000 0 0 1 &mpic 1 1 233 7800 0 0 1 &mpic 2 1
228 9000 0 0 2 &mpic 2 1 234 7800 0 0 2 &mpic 3 1
229 9000 0 0 3 &mpic 3 1 235 7800 0 0 3 &mpic 4 1
230 9000 0 0 4 &mpic 4 1 236 7800 0 0 4 &mpic 1 1
231 237
232 /* IDSEL 0x13 */ 238 /* IDSEL 0x12 */
233 9800 0 0 1 &mpic 4 1 239 9000 0 0 1 &mpic 1 1
234 9800 0 0 2 &mpic 1 1 240 9000 0 0 2 &mpic 2 1
235 9800 0 0 3 &mpic 2 1 241 9000 0 0 3 &mpic 3 1
236 9800 0 0 4 &mpic 3 1 242 9000 0 0 4 &mpic 4 1
237 243
238 /* IDSEL 0x14 */ 244 /* IDSEL 0x13 */
239 a000 0 0 1 &mpic 3 1 245 9800 0 0 1 &mpic 4 1
240 a000 0 0 2 &mpic 4 1 246 9800 0 0 2 &mpic 1 1
241 a000 0 0 3 &mpic 1 1 247 9800 0 0 3 &mpic 2 1
242 a000 0 0 4 &mpic 2 1 248 9800 0 0 4 &mpic 3 1
243 249
244 /* IDSEL 0x15 */ 250 /* IDSEL 0x14 */
245 a800 0 0 1 &mpic 2 1 251 a000 0 0 1 &mpic 3 1
246 a800 0 0 2 &mpic 3 1 252 a000 0 0 2 &mpic 4 1
247 a800 0 0 3 &mpic 4 1 253 a000 0 0 3 &mpic 1 1
248 a800 0 0 4 &mpic 1 1>; 254 a000 0 0 4 &mpic 2 1
249 interrupt-parent = <&mpic>;
250 interrupts = <18 2>;
251 bus-range = <0 0>;
252 ranges = <02000000 0 80000000 80000000 0 20000000
253 01000000 0 00000000 e2000000 0 00100000>;
254 clock-frequency = <3f940aa>;
255 #interrupt-cells = <1>;
256 #size-cells = <2>;
257 #address-cells = <3>;
258 reg = <8000 1000>;
259 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
260 device_type = "pci";
261 };
262 255
263 mpic: pic@40000 { 256 /* IDSEL 0x15 */
264 clock-frequency = <0>; 257 a800 0 0 1 &mpic 2 1
265 interrupt-controller; 258 a800 0 0 2 &mpic 3 1
266 #address-cells = <0>; 259 a800 0 0 3 &mpic 4 1
267 #interrupt-cells = <2>; 260 a800 0 0 4 &mpic 1 1>;
268 reg = <40000 40000>; 261 interrupt-parent = <&mpic>;
269 compatible = "chrp,open-pic"; 262 interrupts = <18 2>;
270 device_type = "open-pic"; 263 bus-range = <0 0>;
271 big-endian; 264 ranges = <02000000 0 80000000 80000000 0 20000000
272 }; 265 01000000 0 00000000 e2000000 0 00100000>;
266 clock-frequency = <3f940aa>;
267 #interrupt-cells = <1>;
268 #size-cells = <2>;
269 #address-cells = <3>;
270 reg = <e0008000 1000>;
271 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
272 device_type = "pci";
273 }; 273 };
274}; 274};