diff options
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8379_rdb.dts')
-rw-r--r-- | arch/powerpc/boot/dts/mpc8379_rdb.dts | 164 |
1 files changed, 118 insertions, 46 deletions
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts index 72cdc3c4c7e3..98ae95bd18f4 100644 --- a/arch/powerpc/boot/dts/mpc8379_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts | |||
@@ -107,26 +107,72 @@ | |||
107 | reg = <0x200 0x100>; | 107 | reg = <0x200 0x100>; |
108 | }; | 108 | }; |
109 | 109 | ||
110 | i2c@3000 { | 110 | gpio1: gpio-controller@c00 { |
111 | #address-cells = <1>; | 111 | #gpio-cells = <2>; |
112 | #size-cells = <0>; | 112 | compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; |
113 | cell-index = <0>; | 113 | reg = <0xc00 0x100>; |
114 | compatible = "fsl-i2c"; | 114 | interrupts = <74 0x8>; |
115 | reg = <0x3000 0x100>; | ||
116 | interrupts = <14 0x8>; | ||
117 | interrupt-parent = <&ipic>; | 115 | interrupt-parent = <&ipic>; |
118 | dfsrr; | 116 | gpio-controller; |
119 | rtc@68 { | 117 | }; |
120 | compatible = "dallas,ds1339"; | 118 | |
121 | reg = <0x68>; | 119 | gpio2: gpio-controller@d00 { |
120 | #gpio-cells = <2>; | ||
121 | compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; | ||
122 | reg = <0xd00 0x100>; | ||
123 | interrupts = <75 0x8>; | ||
124 | interrupt-parent = <&ipic>; | ||
125 | gpio-controller; | ||
126 | }; | ||
127 | |||
128 | sleep-nexus { | ||
129 | #address-cells = <1>; | ||
130 | #size-cells = <1>; | ||
131 | compatible = "simple-bus"; | ||
132 | sleep = <&pmc 0x0c000000>; | ||
133 | ranges; | ||
134 | |||
135 | i2c@3000 { | ||
136 | #address-cells = <1>; | ||
137 | #size-cells = <0>; | ||
138 | cell-index = <0>; | ||
139 | compatible = "fsl-i2c"; | ||
140 | reg = <0x3000 0x100>; | ||
141 | interrupts = <14 0x8>; | ||
142 | interrupt-parent = <&ipic>; | ||
143 | dfsrr; | ||
144 | |||
145 | dtt@48 { | ||
146 | compatible = "national,lm75"; | ||
147 | reg = <0x48>; | ||
148 | }; | ||
149 | |||
150 | at24@50 { | ||
151 | compatible = "at24,24c256"; | ||
152 | reg = <0x50>; | ||
153 | }; | ||
154 | |||
155 | rtc@68 { | ||
156 | compatible = "dallas,ds1339"; | ||
157 | reg = <0x68>; | ||
158 | }; | ||
159 | |||
160 | mcu_pio: mcu@a { | ||
161 | #gpio-cells = <2>; | ||
162 | compatible = "fsl,mc9s08qg8-mpc8379erdb", | ||
163 | "fsl,mcu-mpc8349emitx"; | ||
164 | reg = <0x0a>; | ||
165 | gpio-controller; | ||
166 | }; | ||
122 | }; | 167 | }; |
123 | 168 | ||
124 | mcu_pio: mcu@a { | 169 | sdhci@2e000 { |
125 | #gpio-cells = <2>; | 170 | compatible = "fsl,mpc8379-esdhc"; |
126 | compatible = "fsl,mc9s08qg8-mpc8379erdb", | 171 | reg = <0x2e000 0x1000>; |
127 | "fsl,mcu-mpc8349emitx"; | 172 | interrupts = <42 0x8>; |
128 | reg = <0x0a>; | 173 | interrupt-parent = <&ipic>; |
129 | gpio-controller; | 174 | /* Filled in by U-Boot */ |
175 | clock-frequency = <0>; | ||
130 | }; | 176 | }; |
131 | }; | 177 | }; |
132 | 178 | ||
@@ -197,63 +243,76 @@ | |||
197 | interrupt-parent = <&ipic>; | 243 | interrupt-parent = <&ipic>; |
198 | interrupts = <38 0x8>; | 244 | interrupts = <38 0x8>; |
199 | phy_type = "ulpi"; | 245 | phy_type = "ulpi"; |
200 | }; | 246 | sleep = <&pmc 0x00c00000>; |
201 | |||
202 | mdio@24520 { | ||
203 | #address-cells = <1>; | ||
204 | #size-cells = <0>; | ||
205 | compatible = "fsl,gianfar-mdio"; | ||
206 | reg = <0x24520 0x20>; | ||
207 | phy2: ethernet-phy@2 { | ||
208 | interrupt-parent = <&ipic>; | ||
209 | interrupts = <17 0x8>; | ||
210 | reg = <0x2>; | ||
211 | device_type = "ethernet-phy"; | ||
212 | }; | ||
213 | tbi0: tbi-phy@11 { | ||
214 | reg = <0x11>; | ||
215 | device_type = "tbi-phy"; | ||
216 | }; | ||
217 | }; | ||
218 | |||
219 | mdio@25520 { | ||
220 | #address-cells = <1>; | ||
221 | #size-cells = <0>; | ||
222 | compatible = "fsl,gianfar-tbi"; | ||
223 | reg = <0x25520 0x20>; | ||
224 | |||
225 | tbi1: tbi-phy@11 { | ||
226 | reg = <0x11>; | ||
227 | device_type = "tbi-phy"; | ||
228 | }; | ||
229 | }; | 247 | }; |
230 | 248 | ||
231 | enet0: ethernet@24000 { | 249 | enet0: ethernet@24000 { |
250 | #address-cells = <1>; | ||
251 | #size-cells = <1>; | ||
232 | cell-index = <0>; | 252 | cell-index = <0>; |
233 | device_type = "network"; | 253 | device_type = "network"; |
234 | model = "eTSEC"; | 254 | model = "eTSEC"; |
235 | compatible = "gianfar"; | 255 | compatible = "gianfar"; |
236 | reg = <0x24000 0x1000>; | 256 | reg = <0x24000 0x1000>; |
257 | ranges = <0x0 0x24000 0x1000>; | ||
237 | local-mac-address = [ 00 00 00 00 00 00 ]; | 258 | local-mac-address = [ 00 00 00 00 00 00 ]; |
238 | interrupts = <32 0x8 33 0x8 34 0x8>; | 259 | interrupts = <32 0x8 33 0x8 34 0x8>; |
239 | phy-connection-type = "mii"; | 260 | phy-connection-type = "mii"; |
240 | interrupt-parent = <&ipic>; | 261 | interrupt-parent = <&ipic>; |
241 | tbi-handle = <&tbi0>; | 262 | tbi-handle = <&tbi0>; |
242 | phy-handle = <&phy2>; | 263 | phy-handle = <&phy2>; |
264 | sleep = <&pmc 0xc0000000>; | ||
265 | fsl,magic-packet; | ||
266 | |||
267 | mdio@520 { | ||
268 | #address-cells = <1>; | ||
269 | #size-cells = <0>; | ||
270 | compatible = "fsl,gianfar-mdio"; | ||
271 | reg = <0x520 0x20>; | ||
272 | |||
273 | phy2: ethernet-phy@2 { | ||
274 | interrupt-parent = <&ipic>; | ||
275 | interrupts = <17 0x8>; | ||
276 | reg = <0x2>; | ||
277 | device_type = "ethernet-phy"; | ||
278 | }; | ||
279 | |||
280 | tbi0: tbi-phy@11 { | ||
281 | reg = <0x11>; | ||
282 | device_type = "tbi-phy"; | ||
283 | }; | ||
284 | }; | ||
243 | }; | 285 | }; |
244 | 286 | ||
245 | enet1: ethernet@25000 { | 287 | enet1: ethernet@25000 { |
288 | #address-cells = <1>; | ||
289 | #size-cells = <1>; | ||
246 | cell-index = <1>; | 290 | cell-index = <1>; |
247 | device_type = "network"; | 291 | device_type = "network"; |
248 | model = "eTSEC"; | 292 | model = "eTSEC"; |
249 | compatible = "gianfar"; | 293 | compatible = "gianfar"; |
250 | reg = <0x25000 0x1000>; | 294 | reg = <0x25000 0x1000>; |
295 | ranges = <0x0 0x25000 0x1000>; | ||
251 | local-mac-address = [ 00 00 00 00 00 00 ]; | 296 | local-mac-address = [ 00 00 00 00 00 00 ]; |
252 | interrupts = <35 0x8 36 0x8 37 0x8>; | 297 | interrupts = <35 0x8 36 0x8 37 0x8>; |
253 | phy-connection-type = "mii"; | 298 | phy-connection-type = "mii"; |
254 | interrupt-parent = <&ipic>; | 299 | interrupt-parent = <&ipic>; |
255 | fixed-link = <1 1 1000 0 0>; | 300 | fixed-link = <1 1 1000 0 0>; |
256 | tbi-handle = <&tbi1>; | 301 | tbi-handle = <&tbi1>; |
302 | sleep = <&pmc 0x30000000>; | ||
303 | fsl,magic-packet; | ||
304 | |||
305 | mdio@520 { | ||
306 | #address-cells = <1>; | ||
307 | #size-cells = <0>; | ||
308 | compatible = "fsl,gianfar-tbi"; | ||
309 | reg = <0x520 0x20>; | ||
310 | |||
311 | tbi1: tbi-phy@11 { | ||
312 | reg = <0x11>; | ||
313 | device_type = "tbi-phy"; | ||
314 | }; | ||
315 | }; | ||
257 | }; | 316 | }; |
258 | 317 | ||
259 | serial0: serial@4500 { | 318 | serial0: serial@4500 { |
@@ -286,6 +345,7 @@ | |||
286 | fsl,channel-fifo-len = <24>; | 345 | fsl,channel-fifo-len = <24>; |
287 | fsl,exec-units-mask = <0x9fe>; | 346 | fsl,exec-units-mask = <0x9fe>; |
288 | fsl,descriptor-types-mask = <0x3ab0ebf>; | 347 | fsl,descriptor-types-mask = <0x3ab0ebf>; |
348 | sleep = <&pmc 0x03000000>; | ||
289 | }; | 349 | }; |
290 | 350 | ||
291 | sata@18000 { | 351 | sata@18000 { |
@@ -293,6 +353,7 @@ | |||
293 | reg = <0x18000 0x1000>; | 353 | reg = <0x18000 0x1000>; |
294 | interrupts = <44 0x8>; | 354 | interrupts = <44 0x8>; |
295 | interrupt-parent = <&ipic>; | 355 | interrupt-parent = <&ipic>; |
356 | sleep = <&pmc 0x000000c0>; | ||
296 | }; | 357 | }; |
297 | 358 | ||
298 | sata@19000 { | 359 | sata@19000 { |
@@ -300,6 +361,7 @@ | |||
300 | reg = <0x19000 0x1000>; | 361 | reg = <0x19000 0x1000>; |
301 | interrupts = <45 0x8>; | 362 | interrupts = <45 0x8>; |
302 | interrupt-parent = <&ipic>; | 363 | interrupt-parent = <&ipic>; |
364 | sleep = <&pmc 0x00000030>; | ||
303 | }; | 365 | }; |
304 | 366 | ||
305 | sata@1a000 { | 367 | sata@1a000 { |
@@ -307,6 +369,7 @@ | |||
307 | reg = <0x1a000 0x1000>; | 369 | reg = <0x1a000 0x1000>; |
308 | interrupts = <46 0x8>; | 370 | interrupts = <46 0x8>; |
309 | interrupt-parent = <&ipic>; | 371 | interrupt-parent = <&ipic>; |
372 | sleep = <&pmc 0x0000000c>; | ||
310 | }; | 373 | }; |
311 | 374 | ||
312 | sata@1b000 { | 375 | sata@1b000 { |
@@ -314,6 +377,7 @@ | |||
314 | reg = <0x1b000 0x1000>; | 377 | reg = <0x1b000 0x1000>; |
315 | interrupts = <47 0x8>; | 378 | interrupts = <47 0x8>; |
316 | interrupt-parent = <&ipic>; | 379 | interrupt-parent = <&ipic>; |
380 | sleep = <&pmc 0x00000003>; | ||
317 | }; | 381 | }; |
318 | 382 | ||
319 | /* IPIC | 383 | /* IPIC |
@@ -329,6 +393,13 @@ | |||
329 | #interrupt-cells = <2>; | 393 | #interrupt-cells = <2>; |
330 | reg = <0x700 0x100>; | 394 | reg = <0x700 0x100>; |
331 | }; | 395 | }; |
396 | |||
397 | pmc: power@b00 { | ||
398 | compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc"; | ||
399 | reg = <0xb00 0x100 0xa00 0x100>; | ||
400 | interrupts = <80 0x8>; | ||
401 | interrupt-parent = <&ipic>; | ||
402 | }; | ||
332 | }; | 403 | }; |
333 | 404 | ||
334 | pci0: pci@e0008500 { | 405 | pci0: pci@e0008500 { |
@@ -354,6 +425,7 @@ | |||
354 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 | 425 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 |
355 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 | 426 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 |
356 | 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; | 427 | 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; |
428 | sleep = <&pmc 0x00010000>; | ||
357 | clock-frequency = <66666666>; | 429 | clock-frequency = <66666666>; |
358 | #interrupt-cells = <1>; | 430 | #interrupt-cells = <1>; |
359 | #size-cells = <2>; | 431 | #size-cells = <2>; |