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-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts146
1 files changed, 89 insertions, 57 deletions
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index c3b212cf9025..651ff2f9db2d 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -129,21 +129,38 @@
129 reg = <0x200 0x100>; 129 reg = <0x200 0x100>;
130 }; 130 };
131 131
132 i2c@3000 { 132 sleep-nexus {
133 #address-cells = <1>; 133 #address-cells = <1>;
134 #size-cells = <0>; 134 #size-cells = <1>;
135 cell-index = <0>; 135 compatible = "simple-bus";
136 compatible = "fsl-i2c"; 136 sleep = <&pmc 0x0c000000>;
137 reg = <0x3000 0x100>; 137 ranges;
138 interrupts = <14 0x8>; 138
139 interrupt-parent = <&ipic>; 139 i2c@3000 {
140 dfsrr; 140 #address-cells = <1>;
141 #size-cells = <0>;
142 cell-index = <0>;
143 compatible = "fsl-i2c";
144 reg = <0x3000 0x100>;
145 interrupts = <14 0x8>;
146 interrupt-parent = <&ipic>;
147 dfsrr;
148
149 rtc@68 {
150 compatible = "dallas,ds1374";
151 reg = <0x68>;
152 interrupts = <19 0x8>;
153 interrupt-parent = <&ipic>;
154 };
155 };
141 156
142 rtc@68 { 157 sdhci@2e000 {
143 compatible = "dallas,ds1374"; 158 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
144 reg = <0x68>; 159 reg = <0x2e000 0x1000>;
145 interrupts = <19 0x8>; 160 interrupts = <42 0x8>;
146 interrupt-parent = <&ipic>; 161 interrupt-parent = <&ipic>;
162 /* Filled in by U-Boot */
163 clock-frequency = <0>;
147 }; 164 };
148 }; 165 };
149 166
@@ -215,70 +232,83 @@
215 interrupts = <38 0x8>; 232 interrupts = <38 0x8>;
216 dr_mode = "host"; 233 dr_mode = "host";
217 phy_type = "ulpi"; 234 phy_type = "ulpi";
235 sleep = <&pmc 0x00c00000>;
218 }; 236 };
219 237
220 mdio@24520 {
221 #address-cells = <1>;
222 #size-cells = <0>;
223 compatible = "fsl,gianfar-mdio";
224 reg = <0x24520 0x20>;
225 phy2: ethernet-phy@2 {
226 interrupt-parent = <&ipic>;
227 interrupts = <17 0x8>;
228 reg = <0x2>;
229 device_type = "ethernet-phy";
230 };
231 phy3: ethernet-phy@3 {
232 interrupt-parent = <&ipic>;
233 interrupts = <18 0x8>;
234 reg = <0x3>;
235 device_type = "ethernet-phy";
236 };
237 tbi0: tbi-phy@11 {
238 reg = <0x11>;
239 device_type = "tbi-phy";
240 };
241 };
242
243 mdio@25520 {
244 #address-cells = <1>;
245 #size-cells = <0>;
246 compatible = "fsl,gianfar-tbi";
247 reg = <0x25520 0x20>;
248
249 tbi1: tbi-phy@11 {
250 reg = <0x11>;
251 device_type = "tbi-phy";
252 };
253 };
254
255
256 enet0: ethernet@24000 { 238 enet0: ethernet@24000 {
239 #address-cells = <1>;
240 #size-cells = <1>;
257 cell-index = <0>; 241 cell-index = <0>;
258 device_type = "network"; 242 device_type = "network";
259 model = "eTSEC"; 243 model = "eTSEC";
260 compatible = "gianfar"; 244 compatible = "gianfar";
261 reg = <0x24000 0x1000>; 245 reg = <0x24000 0x1000>;
246 ranges = <0x0 0x24000 0x1000>;
262 local-mac-address = [ 00 00 00 00 00 00 ]; 247 local-mac-address = [ 00 00 00 00 00 00 ];
263 interrupts = <32 0x8 33 0x8 34 0x8>; 248 interrupts = <32 0x8 33 0x8 34 0x8>;
264 phy-connection-type = "mii"; 249 phy-connection-type = "mii";
265 interrupt-parent = <&ipic>; 250 interrupt-parent = <&ipic>;
266 tbi-handle = <&tbi0>; 251 tbi-handle = <&tbi0>;
267 phy-handle = <&phy2>; 252 phy-handle = <&phy2>;
253 sleep = <&pmc 0xc0000000>;
254 fsl,magic-packet;
255
256 mdio@520 {
257 #address-cells = <1>;
258 #size-cells = <0>;
259 compatible = "fsl,gianfar-mdio";
260 reg = <0x520 0x20>;
261
262 phy2: ethernet-phy@2 {
263 interrupt-parent = <&ipic>;
264 interrupts = <17 0x8>;
265 reg = <0x2>;
266 device_type = "ethernet-phy";
267 };
268
269 phy3: ethernet-phy@3 {
270 interrupt-parent = <&ipic>;
271 interrupts = <18 0x8>;
272 reg = <0x3>;
273 device_type = "ethernet-phy";
274 };
275
276 tbi0: tbi-phy@11 {
277 reg = <0x11>;
278 device_type = "tbi-phy";
279 };
280 };
268 }; 281 };
269 282
270 enet1: ethernet@25000 { 283 enet1: ethernet@25000 {
284 #address-cells = <1>;
285 #size-cells = <1>;
271 cell-index = <1>; 286 cell-index = <1>;
272 device_type = "network"; 287 device_type = "network";
273 model = "eTSEC"; 288 model = "eTSEC";
274 compatible = "gianfar"; 289 compatible = "gianfar";
275 reg = <0x25000 0x1000>; 290 reg = <0x25000 0x1000>;
291 ranges = <0x0 0x25000 0x1000>;
276 local-mac-address = [ 00 00 00 00 00 00 ]; 292 local-mac-address = [ 00 00 00 00 00 00 ];
277 interrupts = <35 0x8 36 0x8 37 0x8>; 293 interrupts = <35 0x8 36 0x8 37 0x8>;
278 phy-connection-type = "mii"; 294 phy-connection-type = "mii";
279 interrupt-parent = <&ipic>; 295 interrupt-parent = <&ipic>;
280 tbi-handle = <&tbi1>; 296 tbi-handle = <&tbi1>;
281 phy-handle = <&phy3>; 297 phy-handle = <&phy3>;
298 sleep = <&pmc 0x30000000>;
299 fsl,magic-packet;
300
301 mdio@520 {
302 #address-cells = <1>;
303 #size-cells = <0>;
304 compatible = "fsl,gianfar-tbi";
305 reg = <0x520 0x20>;
306
307 tbi1: tbi-phy@11 {
308 reg = <0x11>;
309 device_type = "tbi-phy";
310 };
311 };
282 }; 312 };
283 313
284 serial0: serial@4500 { 314 serial0: serial@4500 {
@@ -311,15 +341,7 @@
311 fsl,channel-fifo-len = <24>; 341 fsl,channel-fifo-len = <24>;
312 fsl,exec-units-mask = <0x9fe>; 342 fsl,exec-units-mask = <0x9fe>;
313 fsl,descriptor-types-mask = <0x3ab0ebf>; 343 fsl,descriptor-types-mask = <0x3ab0ebf>;
314 }; 344 sleep = <&pmc 0x03000000>;
315
316 sdhci@2e000 {
317 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
318 reg = <0x2e000 0x1000>;
319 interrupts = <42 0x8>;
320 interrupt-parent = <&ipic>;
321 /* Filled in by U-Boot */
322 clock-frequency = <0>;
323 }; 345 };
324 346
325 /* IPIC 347 /* IPIC
@@ -335,6 +357,13 @@
335 #interrupt-cells = <2>; 357 #interrupt-cells = <2>;
336 reg = <0x700 0x100>; 358 reg = <0x700 0x100>;
337 }; 359 };
360
361 pmc: power@b00 {
362 compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc";
363 reg = <0xb00 0x100 0xa00 0x100>;
364 interrupts = <80 0x8>;
365 interrupt-parent = <&ipic>;
366 };
338 }; 367 };
339 368
340 pci0: pci@e0008500 { 369 pci0: pci@e0008500 {
@@ -390,6 +419,7 @@
390 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 419 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
391 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; 420 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
392 clock-frequency = <0>; 421 clock-frequency = <0>;
422 sleep = <&pmc 0x00010000>;
393 #interrupt-cells = <1>; 423 #interrupt-cells = <1>;
394 #size-cells = <2>; 424 #size-cells = <2>;
395 #address-cells = <3>; 425 #address-cells = <3>;
@@ -414,6 +444,7 @@
414 0 0 0 2 &ipic 1 8 444 0 0 0 2 &ipic 1 8
415 0 0 0 3 &ipic 1 8 445 0 0 0 3 &ipic 1 8
416 0 0 0 4 &ipic 1 8>; 446 0 0 0 4 &ipic 1 8>;
447 sleep = <&pmc 0x00300000>;
417 clock-frequency = <0>; 448 clock-frequency = <0>;
418 449
419 pcie@0 { 450 pcie@0 {
@@ -445,6 +476,7 @@
445 0 0 0 2 &ipic 2 8 476 0 0 0 2 &ipic 2 8
446 0 0 0 3 &ipic 2 8 477 0 0 0 3 &ipic 2 8
447 0 0 0 4 &ipic 2 8>; 478 0 0 0 4 &ipic 2 8>;
479 sleep = <&pmc 0x000c0000>;
448 clock-frequency = <0>; 480 clock-frequency = <0>;
449 481
450 pcie@0 { 482 pcie@0 {