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Diffstat (limited to 'arch/powerpc/boot/dts/mpc8377_mds.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts68
1 files changed, 47 insertions, 21 deletions
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 3e3ec8fdef49..cebfc50f4ce5 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -129,21 +129,38 @@
129 reg = <0x200 0x100>; 129 reg = <0x200 0x100>;
130 }; 130 };
131 131
132 i2c@3000 { 132 sleep-nexus {
133 #address-cells = <1>; 133 #address-cells = <1>;
134 #size-cells = <0>; 134 #size-cells = <1>;
135 cell-index = <0>; 135 compatible = "simple-bus";
136 compatible = "fsl-i2c"; 136 sleep = <&pmc 0x0c000000>;
137 reg = <0x3000 0x100>; 137 ranges;
138 interrupts = <14 0x8>;
139 interrupt-parent = <&ipic>;
140 dfsrr;
141 138
142 rtc@68 { 139 i2c@3000 {
143 compatible = "dallas,ds1374"; 140 #address-cells = <1>;
144 reg = <0x68>; 141 #size-cells = <0>;
145 interrupts = <19 0x8>; 142 cell-index = <0>;
143 compatible = "fsl-i2c";
144 reg = <0x3000 0x100>;
145 interrupts = <14 0x8>;
146 interrupt-parent = <&ipic>; 146 interrupt-parent = <&ipic>;
147 dfsrr;
148
149 rtc@68 {
150 compatible = "dallas,ds1374";
151 reg = <0x68>;
152 interrupts = <19 0x8>;
153 interrupt-parent = <&ipic>;
154 };
155 };
156
157 sdhci@2e000 {
158 compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
159 reg = <0x2e000 0x1000>;
160 interrupts = <42 0x8>;
161 interrupt-parent = <&ipic>;
162 /* Filled in by U-Boot */
163 clock-frequency = <0>;
147 }; 164 };
148 }; 165 };
149 166
@@ -176,6 +193,7 @@
176 interrupts = <38 0x8>; 193 interrupts = <38 0x8>;
177 dr_mode = "host"; 194 dr_mode = "host";
178 phy_type = "ulpi"; 195 phy_type = "ulpi";
196 sleep = <&pmc 0x00c00000>;
179 }; 197 };
180 198
181 mdio@24520 { 199 mdio@24520 {
@@ -226,6 +244,8 @@
226 interrupt-parent = <&ipic>; 244 interrupt-parent = <&ipic>;
227 tbi-handle = <&tbi0>; 245 tbi-handle = <&tbi0>;
228 phy-handle = <&phy2>; 246 phy-handle = <&phy2>;
247 sleep = <&pmc 0xc0000000>;
248 fsl,magic-packet;
229 }; 249 };
230 250
231 enet1: ethernet@25000 { 251 enet1: ethernet@25000 {
@@ -240,6 +260,8 @@
240 interrupt-parent = <&ipic>; 260 interrupt-parent = <&ipic>;
241 tbi-handle = <&tbi1>; 261 tbi-handle = <&tbi1>;
242 phy-handle = <&phy3>; 262 phy-handle = <&phy3>;
263 sleep = <&pmc 0x30000000>;
264 fsl,magic-packet;
243 }; 265 };
244 266
245 serial0: serial@4500 { 267 serial0: serial@4500 {
@@ -311,15 +333,7 @@
311 fsl,channel-fifo-len = <24>; 333 fsl,channel-fifo-len = <24>;
312 fsl,exec-units-mask = <0x9fe>; 334 fsl,exec-units-mask = <0x9fe>;
313 fsl,descriptor-types-mask = <0x3ab0ebf>; 335 fsl,descriptor-types-mask = <0x3ab0ebf>;
314 }; 336 sleep = <&pmc 0x03000000>;
315
316 sdhci@2e000 {
317 compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
318 reg = <0x2e000 0x1000>;
319 interrupts = <42 0x8>;
320 interrupt-parent = <&ipic>;
321 /* Filled in by U-Boot */
322 clock-frequency = <0>;
323 }; 337 };
324 338
325 sata@18000 { 339 sata@18000 {
@@ -327,6 +341,7 @@
327 reg = <0x18000 0x1000>; 341 reg = <0x18000 0x1000>;
328 interrupts = <44 0x8>; 342 interrupts = <44 0x8>;
329 interrupt-parent = <&ipic>; 343 interrupt-parent = <&ipic>;
344 sleep = <&pmc 0x000000c0>;
330 }; 345 };
331 346
332 sata@19000 { 347 sata@19000 {
@@ -334,6 +349,7 @@
334 reg = <0x19000 0x1000>; 349 reg = <0x19000 0x1000>;
335 interrupts = <45 0x8>; 350 interrupts = <45 0x8>;
336 interrupt-parent = <&ipic>; 351 interrupt-parent = <&ipic>;
352 sleep = <&pmc 0x00000030>;
337 }; 353 };
338 354
339 /* IPIC 355 /* IPIC
@@ -349,6 +365,13 @@
349 #interrupt-cells = <2>; 365 #interrupt-cells = <2>;
350 reg = <0x700 0x100>; 366 reg = <0x700 0x100>;
351 }; 367 };
368
369 pmc: power@b00 {
370 compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
371 reg = <0xb00 0x100 0xa00 0x100>;
372 interrupts = <80 0x8>;
373 interrupt-parent = <&ipic>;
374 };
352 }; 375 };
353 376
354 pci0: pci@e0008500 { 377 pci0: pci@e0008500 {
@@ -403,6 +426,7 @@
403 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 426 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
404 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 427 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
405 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; 428 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
429 sleep = <&pmc 0x00010000>;
406 clock-frequency = <0>; 430 clock-frequency = <0>;
407 #interrupt-cells = <1>; 431 #interrupt-cells = <1>;
408 #size-cells = <2>; 432 #size-cells = <2>;
@@ -428,6 +452,7 @@
428 0 0 0 2 &ipic 1 8 452 0 0 0 2 &ipic 1 8
429 0 0 0 3 &ipic 1 8 453 0 0 0 3 &ipic 1 8
430 0 0 0 4 &ipic 1 8>; 454 0 0 0 4 &ipic 1 8>;
455 sleep = <&pmc 0x00300000>;
431 clock-frequency = <0>; 456 clock-frequency = <0>;
432 457
433 pcie@0 { 458 pcie@0 {
@@ -459,6 +484,7 @@
459 0 0 0 2 &ipic 2 8 484 0 0 0 2 &ipic 2 8
460 0 0 0 3 &ipic 2 8 485 0 0 0 3 &ipic 2 8
461 0 0 0 4 &ipic 2 8>; 486 0 0 0 4 &ipic 2 8>;
487 sleep = <&pmc 0x000c0000>;
462 clock-frequency = <0>; 488 clock-frequency = <0>;
463 489
464 pcie@0 { 490 pcie@0 {