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diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
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+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
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1/*
2 * MPC8349E MDS Device Tree Source
3 *
4 * Copyright 2005, 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/ {
13 model = "MPC8349EMDS";
14 compatible = "MPC834xMDS";
15 #address-cells = <1>;
16 #size-cells = <1>;
17
18 cpus {
19 #cpus = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
22
23 PowerPC,8349@0 {
24 device_type = "cpu";
25 reg = <0>;
26 d-cache-line-size = <20>; // 32 bytes
27 i-cache-line-size = <20>; // 32 bytes
28 d-cache-size = <8000>; // L1, 32K
29 i-cache-size = <8000>; // L1, 32K
30 timebase-frequency = <0>; // from bootloader
31 bus-frequency = <0>; // from bootloader
32 clock-frequency = <0>; // from bootloader
33 32-bit;
34 };
35 };
36
37 memory {
38 device_type = "memory";
39 reg = <00000000 10000000>; // 256MB at 0
40 };
41
42 bcsr@e2400000 {
43 device_type = "board-control";
44 reg = <e2400000 8000>;
45 };
46
47 soc8349@e0000000 {
48 #address-cells = <1>;
49 #size-cells = <1>;
50 #interrupt-cells = <2>;
51 device_type = "soc";
52 ranges = <0 e0000000 00100000>;
53 reg = <e0000000 00000200>;
54 bus-frequency = <0>;
55
56 wdt@200 {
57 device_type = "watchdog";
58 compatible = "mpc83xx_wdt";
59 reg = <200 100>;
60 };
61
62 i2c@3000 {
63 device_type = "i2c";
64 compatible = "fsl-i2c";
65 reg = <3000 100>;
66 interrupts = <e 8>;
67 interrupt-parent = <700>;
68 dfsrr;
69 };
70
71 i2c@3100 {
72 device_type = "i2c";
73 compatible = "fsl-i2c";
74 reg = <3100 100>;
75 interrupts = <f 8>;
76 interrupt-parent = <700>;
77 dfsrr;
78 };
79
80 spi@7000 {
81 device_type = "spi";
82 compatible = "mpc83xx_spi";
83 reg = <7000 1000>;
84 interrupts = <10 8>;
85 interrupt-parent = <700>;
86 mode = <0>;
87 };
88
89 /* phy type (ULPI or SERIAL) are only types supportted for MPH */
90 /* port = 0 or 1 */
91 usb@22000 {
92 device_type = "usb";
93 compatible = "fsl-usb2-mph";
94 reg = <22000 1000>;
95 #address-cells = <1>;
96 #size-cells = <0>;
97 interrupt-parent = <700>;
98 interrupts = <27 2>;
99 phy_type = "ulpi";
100 port1;
101 };
102 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
103 usb@23000 {
104 device_type = "usb";
105 compatible = "fsl-usb2-dr";
106 reg = <23000 1000>;
107 #address-cells = <1>;
108 #size-cells = <0>;
109 interrupt-parent = <700>;
110 interrupts = <26 2>;
111 dr_mode = "otg";
112 phy_type = "ulpi";
113 };
114
115 mdio@24520 {
116 device_type = "mdio";
117 compatible = "gianfar";
118 reg = <24520 20>;
119 #address-cells = <1>;
120 #size-cells = <0>;
121 linux,phandle = <24520>;
122 ethernet-phy@0 {
123 linux,phandle = <2452000>;
124 interrupt-parent = <700>;
125 interrupts = <11 2>;
126 reg = <0>;
127 device_type = "ethernet-phy";
128 };
129 ethernet-phy@1 {
130 linux,phandle = <2452001>;
131 interrupt-parent = <700>;
132 interrupts = <12 2>;
133 reg = <1>;
134 device_type = "ethernet-phy";
135 };
136 };
137
138 ethernet@24000 {
139 device_type = "network";
140 model = "TSEC";
141 compatible = "gianfar";
142 reg = <24000 1000>;
143 address = [ 00 00 00 00 00 00 ];
144 local-mac-address = [ 00 00 00 00 00 00 ];
145 interrupts = <20 8 21 8 22 8>;
146 interrupt-parent = <700>;
147 phy-handle = <2452000>;
148 };
149
150 ethernet@25000 {
151 #address-cells = <1>;
152 #size-cells = <0>;
153 device_type = "network";
154 model = "TSEC";
155 compatible = "gianfar";
156 reg = <25000 1000>;
157 address = [ 00 00 00 00 00 00 ];
158 local-mac-address = [ 00 00 00 00 00 00 ];
159 interrupts = <23 8 24 8 25 8>;
160 interrupt-parent = <700>;
161 phy-handle = <2452001>;
162 };
163
164 serial@4500 {
165 device_type = "serial";
166 compatible = "ns16550";
167 reg = <4500 100>;
168 clock-frequency = <0>;
169 interrupts = <9 8>;
170 interrupt-parent = <700>;
171 };
172
173 serial@4600 {
174 device_type = "serial";
175 compatible = "ns16550";
176 reg = <4600 100>;
177 clock-frequency = <0>;
178 interrupts = <a 8>;
179 interrupt-parent = <700>;
180 };
181
182 pci@8500 {
183 interrupt-map-mask = <f800 0 0 7>;
184 interrupt-map = <
185
186 /* IDSEL 0x11 */
187 8800 0 0 1 700 14 8
188 8800 0 0 2 700 15 8
189 8800 0 0 3 700 16 8
190 8800 0 0 4 700 17 8
191
192 /* IDSEL 0x12 */
193 9000 0 0 1 700 16 8
194 9000 0 0 2 700 17 8
195 9000 0 0 3 700 14 8
196 9000 0 0 4 700 15 8
197
198 /* IDSEL 0x13 */
199 9800 0 0 1 700 17 8
200 9800 0 0 2 700 14 8
201 9800 0 0 3 700 15 8
202 9800 0 0 4 700 16 8
203
204 /* IDSEL 0x15 */
205 a800 0 0 1 700 14 8
206 a800 0 0 2 700 15 8
207 a800 0 0 3 700 16 8
208 a800 0 0 4 700 17 8
209
210 /* IDSEL 0x16 */
211 b000 0 0 1 700 17 8
212 b000 0 0 2 700 14 8
213 b000 0 0 3 700 15 8
214 b000 0 0 4 700 16 8
215
216 /* IDSEL 0x17 */
217 b800 0 0 1 700 16 8
218 b800 0 0 2 700 17 8
219 b800 0 0 3 700 14 8
220 b800 0 0 4 700 15 8
221
222 /* IDSEL 0x18 */
223 c000 0 0 1 700 15 8
224 c000 0 0 2 700 16 8
225 c000 0 0 3 700 17 8
226 c000 0 0 4 700 14 8>;
227 interrupt-parent = <700>;
228 interrupts = <42 8>;
229 bus-range = <0 0>;
230 ranges = <02000000 0 a0000000 a0000000 0 10000000
231 42000000 0 80000000 80000000 0 10000000
232 01000000 0 00000000 e2000000 0 00100000>;
233 clock-frequency = <3f940aa>;
234 #interrupt-cells = <1>;
235 #size-cells = <2>;
236 #address-cells = <3>;
237 reg = <8500 100>;
238 compatible = "83xx";
239 device_type = "pci";
240 };
241
242 pci@8600 {
243 interrupt-map-mask = <f800 0 0 7>;
244 interrupt-map = <
245
246 /* IDSEL 0x11 */
247 8800 0 0 1 700 14 8
248 8800 0 0 2 700 15 8
249 8800 0 0 3 700 16 8
250 8800 0 0 4 700 17 8
251
252 /* IDSEL 0x12 */
253 9000 0 0 1 700 16 8
254 9000 0 0 2 700 17 8
255 9000 0 0 3 700 14 8
256 9000 0 0 4 700 15 8
257
258 /* IDSEL 0x13 */
259 9800 0 0 1 700 17 8
260 9800 0 0 2 700 14 8
261 9800 0 0 3 700 15 8
262 9800 0 0 4 700 16 8
263
264 /* IDSEL 0x15 */
265 a800 0 0 1 700 14 8
266 a800 0 0 2 700 15 8
267 a800 0 0 3 700 16 8
268 a800 0 0 4 700 17 8
269
270 /* IDSEL 0x16 */
271 b000 0 0 1 700 17 8
272 b000 0 0 2 700 14 8
273 b000 0 0 3 700 15 8
274 b000 0 0 4 700 16 8
275
276 /* IDSEL 0x17 */
277 b800 0 0 1 700 16 8
278 b800 0 0 2 700 17 8
279 b800 0 0 3 700 14 8
280 b800 0 0 4 700 15 8
281
282 /* IDSEL 0x18 */
283 c000 0 0 1 700 15 8
284 c000 0 0 2 700 16 8
285 c000 0 0 3 700 17 8
286 c000 0 0 4 700 14 8>;
287 interrupt-parent = <700>;
288 interrupts = <42 8>;
289 bus-range = <0 0>;
290 ranges = <02000000 0 b0000000 b0000000 0 10000000
291 42000000 0 90000000 90000000 0 10000000
292 01000000 0 00000000 e2100000 0 00100000>;
293 clock-frequency = <3f940aa>;
294 #interrupt-cells = <1>;
295 #size-cells = <2>;
296 #address-cells = <3>;
297 reg = <8600 100>;
298 compatible = "83xx";
299 device_type = "pci";
300 };
301
302 /* May need to remove if on a part without crypto engine */
303 crypto@30000 {
304 device_type = "crypto";
305 model = "SEC2";
306 compatible = "talitos";
307 reg = <30000 10000>;
308 interrupts = <b 8>;
309 interrupt-parent = <700>;
310 num-channels = <4>;
311 channel-fifo-len = <18>;
312 exec-units-mask = <0000007e>;
313 /* desc mask is for rev2.0,
314 * we need runtime fixup for >2.0 */
315 descriptor-types-mask = <01010ebf>;
316 };
317
318 /* IPIC
319 * interrupts cell = <intr #, sense>
320 * sense values match linux IORESOURCE_IRQ_* defines:
321 * sense == 8: Level, low assertion
322 * sense == 2: Edge, high-to-low change
323 */
324 pic@700 {
325 linux,phandle = <700>;
326 interrupt-controller;
327 #address-cells = <0>;
328 #interrupt-cells = <2>;
329 reg = <700 100>;
330 built-in;
331 device_type = "ipic";
332 };
333 };
334};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-18 20:26:45 -0500