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Diffstat (limited to 'arch/powerpc/boot/dts/mpc834x_mds.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts249
1 files changed, 124 insertions, 125 deletions
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 481099756e44..e5a84ef9f4b0 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -29,7 +29,6 @@
29 timebase-frequency = <0>; // from bootloader 29 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader 30 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader 31 clock-frequency = <0>; // from bootloader
32 32-bit;
33 }; 32 };
34 }; 33 };
35 34
@@ -46,7 +45,6 @@
46 soc8349@e0000000 { 45 soc8349@e0000000 {
47 #address-cells = <1>; 46 #address-cells = <1>;
48 #size-cells = <1>; 47 #size-cells = <1>;
49 #interrupt-cells = <2>;
50 device_type = "soc"; 48 device_type = "soc";
51 ranges = <0 e0000000 00100000>; 49 ranges = <0 e0000000 00100000>;
52 reg = <e0000000 00000200>; 50 reg = <e0000000 00000200>;
@@ -78,11 +76,11 @@
78 76
79 spi@7000 { 77 spi@7000 {
80 device_type = "spi"; 78 device_type = "spi";
81 compatible = "mpc83xx_spi"; 79 compatible = "fsl_spi";
82 reg = <7000 1000>; 80 reg = <7000 1000>;
83 interrupts = <10 8>; 81 interrupts = <10 8>;
84 interrupt-parent = < &ipic >; 82 interrupt-parent = < &ipic >;
85 mode = <0>; 83 mode = "cpu";
86 }; 84 };
87 85
88 /* phy type (ULPI or SERIAL) are only types supportted for MPH */ 86 /* phy type (ULPI or SERIAL) are only types supportted for MPH */
@@ -146,6 +144,7 @@
146 interrupts = <20 8 21 8 22 8>; 144 interrupts = <20 8 21 8 22 8>;
147 interrupt-parent = < &ipic >; 145 interrupt-parent = < &ipic >;
148 phy-handle = < &phy0 >; 146 phy-handle = < &phy0 >;
147 linux,network-index = <0>;
149 }; 148 };
150 149
151 ethernet@25000 { 150 ethernet@25000 {
@@ -165,6 +164,7 @@
165 interrupts = <23 8 24 8 25 8>; 164 interrupts = <23 8 24 8 25 8>;
166 interrupt-parent = < &ipic >; 165 interrupt-parent = < &ipic >;
167 phy-handle = < &phy1 >; 166 phy-handle = < &phy1 >;
167 linux,network-index = <1>;
168 }; 168 };
169 169
170 serial@4500 { 170 serial@4500 {
@@ -185,126 +185,6 @@
185 interrupt-parent = < &ipic >; 185 interrupt-parent = < &ipic >;
186 }; 186 };
187 187
188 pci@8500 {
189 interrupt-map-mask = <f800 0 0 7>;
190 interrupt-map = <
191
192 /* IDSEL 0x11 */
193 8800 0 0 1 &ipic 14 8
194 8800 0 0 2 &ipic 15 8
195 8800 0 0 3 &ipic 16 8
196 8800 0 0 4 &ipic 17 8
197
198 /* IDSEL 0x12 */
199 9000 0 0 1 &ipic 16 8
200 9000 0 0 2 &ipic 17 8
201 9000 0 0 3 &ipic 14 8
202 9000 0 0 4 &ipic 15 8
203
204 /* IDSEL 0x13 */
205 9800 0 0 1 &ipic 17 8
206 9800 0 0 2 &ipic 14 8
207 9800 0 0 3 &ipic 15 8
208 9800 0 0 4 &ipic 16 8
209
210 /* IDSEL 0x15 */
211 a800 0 0 1 &ipic 14 8
212 a800 0 0 2 &ipic 15 8
213 a800 0 0 3 &ipic 16 8
214 a800 0 0 4 &ipic 17 8
215
216 /* IDSEL 0x16 */
217 b000 0 0 1 &ipic 17 8
218 b000 0 0 2 &ipic 14 8
219 b000 0 0 3 &ipic 15 8
220 b000 0 0 4 &ipic 16 8
221
222 /* IDSEL 0x17 */
223 b800 0 0 1 &ipic 16 8
224 b800 0 0 2 &ipic 17 8
225 b800 0 0 3 &ipic 14 8
226 b800 0 0 4 &ipic 15 8
227
228 /* IDSEL 0x18 */
229 c000 0 0 1 &ipic 15 8
230 c000 0 0 2 &ipic 16 8
231 c000 0 0 3 &ipic 17 8
232 c000 0 0 4 &ipic 14 8>;
233 interrupt-parent = < &ipic >;
234 interrupts = <42 8>;
235 bus-range = <0 0>;
236 ranges = <02000000 0 90000000 90000000 0 10000000
237 42000000 0 80000000 80000000 0 10000000
238 01000000 0 00000000 e2000000 0 00100000>;
239 clock-frequency = <3f940aa>;
240 #interrupt-cells = <1>;
241 #size-cells = <2>;
242 #address-cells = <3>;
243 reg = <8500 100>;
244 compatible = "fsl,mpc8349-pci";
245 device_type = "pci";
246 };
247
248 pci@8600 {
249 interrupt-map-mask = <f800 0 0 7>;
250 interrupt-map = <
251
252 /* IDSEL 0x11 */
253 8800 0 0 1 &ipic 14 8
254 8800 0 0 2 &ipic 15 8
255 8800 0 0 3 &ipic 16 8
256 8800 0 0 4 &ipic 17 8
257
258 /* IDSEL 0x12 */
259 9000 0 0 1 &ipic 16 8
260 9000 0 0 2 &ipic 17 8
261 9000 0 0 3 &ipic 14 8
262 9000 0 0 4 &ipic 15 8
263
264 /* IDSEL 0x13 */
265 9800 0 0 1 &ipic 17 8
266 9800 0 0 2 &ipic 14 8
267 9800 0 0 3 &ipic 15 8
268 9800 0 0 4 &ipic 16 8
269
270 /* IDSEL 0x15 */
271 a800 0 0 1 &ipic 14 8
272 a800 0 0 2 &ipic 15 8
273 a800 0 0 3 &ipic 16 8
274 a800 0 0 4 &ipic 17 8
275
276 /* IDSEL 0x16 */
277 b000 0 0 1 &ipic 17 8
278 b000 0 0 2 &ipic 14 8
279 b000 0 0 3 &ipic 15 8
280 b000 0 0 4 &ipic 16 8
281
282 /* IDSEL 0x17 */
283 b800 0 0 1 &ipic 16 8
284 b800 0 0 2 &ipic 17 8
285 b800 0 0 3 &ipic 14 8
286 b800 0 0 4 &ipic 15 8
287
288 /* IDSEL 0x18 */
289 c000 0 0 1 &ipic 15 8
290 c000 0 0 2 &ipic 16 8
291 c000 0 0 3 &ipic 17 8
292 c000 0 0 4 &ipic 14 8>;
293 interrupt-parent = < &ipic >;
294 interrupts = <42 8>;
295 bus-range = <0 0>;
296 ranges = <02000000 0 b0000000 b0000000 0 10000000
297 42000000 0 a0000000 a0000000 0 10000000
298 01000000 0 00000000 e2100000 0 00100000>;
299 clock-frequency = <3f940aa>;
300 #interrupt-cells = <1>;
301 #size-cells = <2>;
302 #address-cells = <3>;
303 reg = <8600 100>;
304 compatible = "fsl,mpc8349-pci";
305 device_type = "pci";
306 };
307
308 /* May need to remove if on a part without crypto engine */ 188 /* May need to remove if on a part without crypto engine */
309 crypto@30000 { 189 crypto@30000 {
310 device_type = "crypto"; 190 device_type = "crypto";
@@ -332,8 +212,127 @@
332 #address-cells = <0>; 212 #address-cells = <0>;
333 #interrupt-cells = <2>; 213 #interrupt-cells = <2>;
334 reg = <700 100>; 214 reg = <700 100>;
335 built-in;
336 device_type = "ipic"; 215 device_type = "ipic";
337 }; 216 };
338 }; 217 };
218
219 pci@e0008500 {
220 interrupt-map-mask = <f800 0 0 7>;
221 interrupt-map = <
222
223 /* IDSEL 0x11 */
224 8800 0 0 1 &ipic 14 8
225 8800 0 0 2 &ipic 15 8
226 8800 0 0 3 &ipic 16 8
227 8800 0 0 4 &ipic 17 8
228
229 /* IDSEL 0x12 */
230 9000 0 0 1 &ipic 16 8
231 9000 0 0 2 &ipic 17 8
232 9000 0 0 3 &ipic 14 8
233 9000 0 0 4 &ipic 15 8
234
235 /* IDSEL 0x13 */
236 9800 0 0 1 &ipic 17 8
237 9800 0 0 2 &ipic 14 8
238 9800 0 0 3 &ipic 15 8
239 9800 0 0 4 &ipic 16 8
240
241 /* IDSEL 0x15 */
242 a800 0 0 1 &ipic 14 8
243 a800 0 0 2 &ipic 15 8
244 a800 0 0 3 &ipic 16 8
245 a800 0 0 4 &ipic 17 8
246
247 /* IDSEL 0x16 */
248 b000 0 0 1 &ipic 17 8
249 b000 0 0 2 &ipic 14 8
250 b000 0 0 3 &ipic 15 8
251 b000 0 0 4 &ipic 16 8
252
253 /* IDSEL 0x17 */
254 b800 0 0 1 &ipic 16 8
255 b800 0 0 2 &ipic 17 8
256 b800 0 0 3 &ipic 14 8
257 b800 0 0 4 &ipic 15 8
258
259 /* IDSEL 0x18 */
260 c000 0 0 1 &ipic 15 8
261 c000 0 0 2 &ipic 16 8
262 c000 0 0 3 &ipic 17 8
263 c000 0 0 4 &ipic 14 8>;
264 interrupt-parent = < &ipic >;
265 interrupts = <42 8>;
266 bus-range = <0 0>;
267 ranges = <02000000 0 90000000 90000000 0 10000000
268 42000000 0 80000000 80000000 0 10000000
269 01000000 0 00000000 e2000000 0 00100000>;
270 clock-frequency = <3f940aa>;
271 #interrupt-cells = <1>;
272 #size-cells = <2>;
273 #address-cells = <3>;
274 reg = <e0008500 100>;
275 compatible = "fsl,mpc8349-pci";
276 device_type = "pci";
277 };
278
279 pci@e0008600 {
280 interrupt-map-mask = <f800 0 0 7>;
281 interrupt-map = <
282
283 /* IDSEL 0x11 */
284 8800 0 0 1 &ipic 14 8
285 8800 0 0 2 &ipic 15 8
286 8800 0 0 3 &ipic 16 8
287 8800 0 0 4 &ipic 17 8
288
289 /* IDSEL 0x12 */
290 9000 0 0 1 &ipic 16 8
291 9000 0 0 2 &ipic 17 8
292 9000 0 0 3 &ipic 14 8
293 9000 0 0 4 &ipic 15 8
294
295 /* IDSEL 0x13 */
296 9800 0 0 1 &ipic 17 8
297 9800 0 0 2 &ipic 14 8
298 9800 0 0 3 &ipic 15 8
299 9800 0 0 4 &ipic 16 8
300
301 /* IDSEL 0x15 */
302 a800 0 0 1 &ipic 14 8
303 a800 0 0 2 &ipic 15 8
304 a800 0 0 3 &ipic 16 8
305 a800 0 0 4 &ipic 17 8
306
307 /* IDSEL 0x16 */
308 b000 0 0 1 &ipic 17 8
309 b000 0 0 2 &ipic 14 8
310 b000 0 0 3 &ipic 15 8
311 b000 0 0 4 &ipic 16 8
312
313 /* IDSEL 0x17 */
314 b800 0 0 1 &ipic 16 8
315 b800 0 0 2 &ipic 17 8
316 b800 0 0 3 &ipic 14 8
317 b800 0 0 4 &ipic 15 8
318
319 /* IDSEL 0x18 */
320 c000 0 0 1 &ipic 15 8
321 c000 0 0 2 &ipic 16 8
322 c000 0 0 3 &ipic 17 8
323 c000 0 0 4 &ipic 14 8>;
324 interrupt-parent = < &ipic >;
325 interrupts = <42 8>;
326 bus-range = <0 0>;
327 ranges = <02000000 0 b0000000 b0000000 0 10000000
328 42000000 0 a0000000 a0000000 0 10000000
329 01000000 0 00000000 e2100000 0 00100000>;
330 clock-frequency = <3f940aa>;
331 #interrupt-cells = <1>;
332 #size-cells = <2>;
333 #address-cells = <3>;
334 reg = <e0008600 100>;
335 compatible = "fsl,mpc8349-pci";
336 device_type = "pci";
337 };
339}; 338};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-31 00:04:22 -0500