diff options
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8349emitxgp.dts')
-rw-r--r-- | arch/powerpc/boot/dts/mpc8349emitxgp.dts | 109 |
1 files changed, 56 insertions, 53 deletions
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts index 79983d74eee4..f81d735e6e72 100644 --- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts +++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts | |||
@@ -8,6 +8,9 @@ | |||
8 | * Free Software Foundation; either version 2 of the License, or (at your | 8 | * Free Software Foundation; either version 2 of the License, or (at your |
9 | * option) any later version. | 9 | * option) any later version. |
10 | */ | 10 | */ |
11 | |||
12 | /dts-v1/; | ||
13 | |||
11 | / { | 14 | / { |
12 | model = "MPC8349EMITXGP"; | 15 | model = "MPC8349EMITXGP"; |
13 | compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX"; | 16 | compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX"; |
@@ -27,11 +30,11 @@ | |||
27 | 30 | ||
28 | PowerPC,8349@0 { | 31 | PowerPC,8349@0 { |
29 | device_type = "cpu"; | 32 | device_type = "cpu"; |
30 | reg = <0>; | 33 | reg = <0x0>; |
31 | d-cache-line-size = <20>; | 34 | d-cache-line-size = <32>; |
32 | i-cache-line-size = <20>; | 35 | i-cache-line-size = <32>; |
33 | d-cache-size = <8000>; | 36 | d-cache-size = <32768>; |
34 | i-cache-size = <8000>; | 37 | i-cache-size = <32768>; |
35 | timebase-frequency = <0>; // from bootloader | 38 | timebase-frequency = <0>; // from bootloader |
36 | bus-frequency = <0>; // from bootloader | 39 | bus-frequency = <0>; // from bootloader |
37 | clock-frequency = <0>; // from bootloader | 40 | clock-frequency = <0>; // from bootloader |
@@ -40,21 +43,21 @@ | |||
40 | 43 | ||
41 | memory { | 44 | memory { |
42 | device_type = "memory"; | 45 | device_type = "memory"; |
43 | reg = <00000000 10000000>; | 46 | reg = <0x00000000 0x10000000>; |
44 | }; | 47 | }; |
45 | 48 | ||
46 | soc8349@e0000000 { | 49 | soc8349@e0000000 { |
47 | #address-cells = <1>; | 50 | #address-cells = <1>; |
48 | #size-cells = <1>; | 51 | #size-cells = <1>; |
49 | device_type = "soc"; | 52 | device_type = "soc"; |
50 | ranges = <0 e0000000 00100000>; | 53 | ranges = <0x0 0xe0000000 0x00100000>; |
51 | reg = <e0000000 00000200>; | 54 | reg = <0xe0000000 0x00000200>; |
52 | bus-frequency = <0>; // from bootloader | 55 | bus-frequency = <0>; // from bootloader |
53 | 56 | ||
54 | wdt@200 { | 57 | wdt@200 { |
55 | device_type = "watchdog"; | 58 | device_type = "watchdog"; |
56 | compatible = "mpc83xx_wdt"; | 59 | compatible = "mpc83xx_wdt"; |
57 | reg = <200 100>; | 60 | reg = <0x200 0x100>; |
58 | }; | 61 | }; |
59 | 62 | ||
60 | i2c@3000 { | 63 | i2c@3000 { |
@@ -62,9 +65,9 @@ | |||
62 | #size-cells = <0>; | 65 | #size-cells = <0>; |
63 | cell-index = <0>; | 66 | cell-index = <0>; |
64 | compatible = "fsl-i2c"; | 67 | compatible = "fsl-i2c"; |
65 | reg = <3000 100>; | 68 | reg = <0x3000 0x100>; |
66 | interrupts = <e 8>; | 69 | interrupts = <14 0x8>; |
67 | interrupt-parent = < &ipic >; | 70 | interrupt-parent = <&ipic>; |
68 | dfsrr; | 71 | dfsrr; |
69 | }; | 72 | }; |
70 | 73 | ||
@@ -73,28 +76,28 @@ | |||
73 | #size-cells = <0>; | 76 | #size-cells = <0>; |
74 | cell-index = <1>; | 77 | cell-index = <1>; |
75 | compatible = "fsl-i2c"; | 78 | compatible = "fsl-i2c"; |
76 | reg = <3100 100>; | 79 | reg = <0x3100 0x100>; |
77 | interrupts = <f 8>; | 80 | interrupts = <15 0x8>; |
78 | interrupt-parent = < &ipic >; | 81 | interrupt-parent = <&ipic>; |
79 | dfsrr; | 82 | dfsrr; |
80 | }; | 83 | }; |
81 | 84 | ||
82 | spi@7000 { | 85 | spi@7000 { |
83 | cell-index = <0>; | 86 | cell-index = <0>; |
84 | compatible = "fsl,spi"; | 87 | compatible = "fsl,spi"; |
85 | reg = <7000 1000>; | 88 | reg = <0x7000 0x1000>; |
86 | interrupts = <10 8>; | 89 | interrupts = <16 0x8>; |
87 | interrupt-parent = < &ipic >; | 90 | interrupt-parent = <&ipic>; |
88 | mode = "cpu"; | 91 | mode = "cpu"; |
89 | }; | 92 | }; |
90 | 93 | ||
91 | usb@23000 { | 94 | usb@23000 { |
92 | compatible = "fsl-usb2-dr"; | 95 | compatible = "fsl-usb2-dr"; |
93 | reg = <23000 1000>; | 96 | reg = <0x23000 0x1000>; |
94 | #address-cells = <1>; | 97 | #address-cells = <1>; |
95 | #size-cells = <0>; | 98 | #size-cells = <0>; |
96 | interrupt-parent = < &ipic >; | 99 | interrupt-parent = <&ipic>; |
97 | interrupts = <26 8>; | 100 | interrupts = <38 0x8>; |
98 | dr_mode = "otg"; | 101 | dr_mode = "otg"; |
99 | phy_type = "ulpi"; | 102 | phy_type = "ulpi"; |
100 | }; | 103 | }; |
@@ -103,13 +106,13 @@ | |||
103 | #address-cells = <1>; | 106 | #address-cells = <1>; |
104 | #size-cells = <0>; | 107 | #size-cells = <0>; |
105 | compatible = "fsl,gianfar-mdio"; | 108 | compatible = "fsl,gianfar-mdio"; |
106 | reg = <24520 20>; | 109 | reg = <0x24520 0x20>; |
107 | 110 | ||
108 | /* Vitesse 8201 */ | 111 | /* Vitesse 8201 */ |
109 | phy1c: ethernet-phy@1c { | 112 | phy1c: ethernet-phy@1c { |
110 | interrupt-parent = < &ipic >; | 113 | interrupt-parent = <&ipic>; |
111 | interrupts = <12 8>; | 114 | interrupts = <18 0x8>; |
112 | reg = <1c>; | 115 | reg = <0x1c>; |
113 | device_type = "ethernet-phy"; | 116 | device_type = "ethernet-phy"; |
114 | }; | 117 | }; |
115 | }; | 118 | }; |
@@ -119,11 +122,11 @@ | |||
119 | device_type = "network"; | 122 | device_type = "network"; |
120 | model = "TSEC"; | 123 | model = "TSEC"; |
121 | compatible = "gianfar"; | 124 | compatible = "gianfar"; |
122 | reg = <24000 1000>; | 125 | reg = <0x24000 0x1000>; |
123 | local-mac-address = [ 00 00 00 00 00 00 ]; | 126 | local-mac-address = [ 00 00 00 00 00 00 ]; |
124 | interrupts = <20 8 21 8 22 8>; | 127 | interrupts = <32 0x8 33 0x8 34 0x8>; |
125 | interrupt-parent = < &ipic >; | 128 | interrupt-parent = <&ipic>; |
126 | phy-handle = < &phy1c >; | 129 | phy-handle = <&phy1c>; |
127 | linux,network-index = <0>; | 130 | linux,network-index = <0>; |
128 | }; | 131 | }; |
129 | 132 | ||
@@ -131,63 +134,63 @@ | |||
131 | cell-index = <0>; | 134 | cell-index = <0>; |
132 | device_type = "serial"; | 135 | device_type = "serial"; |
133 | compatible = "ns16550"; | 136 | compatible = "ns16550"; |
134 | reg = <4500 100>; | 137 | reg = <0x4500 0x100>; |
135 | clock-frequency = <0>; // from bootloader | 138 | clock-frequency = <0>; // from bootloader |
136 | interrupts = <9 8>; | 139 | interrupts = <9 0x8>; |
137 | interrupt-parent = < &ipic >; | 140 | interrupt-parent = <&ipic>; |
138 | }; | 141 | }; |
139 | 142 | ||
140 | serial1: serial@4600 { | 143 | serial1: serial@4600 { |
141 | cell-index = <1>; | 144 | cell-index = <1>; |
142 | device_type = "serial"; | 145 | device_type = "serial"; |
143 | compatible = "ns16550"; | 146 | compatible = "ns16550"; |
144 | reg = <4600 100>; | 147 | reg = <0x4600 0x100>; |
145 | clock-frequency = <0>; // from bootloader | 148 | clock-frequency = <0>; // from bootloader |
146 | interrupts = <a 8>; | 149 | interrupts = <10 0x8>; |
147 | interrupt-parent = < &ipic >; | 150 | interrupt-parent = <&ipic>; |
148 | }; | 151 | }; |
149 | 152 | ||
150 | crypto@30000 { | 153 | crypto@30000 { |
151 | device_type = "crypto"; | 154 | device_type = "crypto"; |
152 | model = "SEC2"; | 155 | model = "SEC2"; |
153 | compatible = "talitos"; | 156 | compatible = "talitos"; |
154 | reg = <30000 10000>; | 157 | reg = <0x30000 0x10000>; |
155 | interrupts = <b 8>; | 158 | interrupts = <11 0x8>; |
156 | interrupt-parent = < &ipic >; | 159 | interrupt-parent = <&ipic>; |
157 | num-channels = <4>; | 160 | num-channels = <4>; |
158 | channel-fifo-len = <18>; | 161 | channel-fifo-len = <24>; |
159 | exec-units-mask = <0000007e>; | 162 | exec-units-mask = <0x0000007e>; |
160 | descriptor-types-mask = <01010ebf>; | 163 | descriptor-types-mask = <0x01010ebf>; |
161 | }; | 164 | }; |
162 | 165 | ||
163 | ipic: pic@700 { | 166 | ipic: pic@700 { |
164 | interrupt-controller; | 167 | interrupt-controller; |
165 | #address-cells = <0>; | 168 | #address-cells = <0>; |
166 | #interrupt-cells = <2>; | 169 | #interrupt-cells = <2>; |
167 | reg = <700 100>; | 170 | reg = <0x700 0x100>; |
168 | device_type = "ipic"; | 171 | device_type = "ipic"; |
169 | }; | 172 | }; |
170 | }; | 173 | }; |
171 | 174 | ||
172 | pci0: pci@e0008600 { | 175 | pci0: pci@e0008600 { |
173 | cell-index = <2>; | 176 | cell-index = <2>; |
174 | interrupt-map-mask = <f800 0 0 7>; | 177 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
175 | interrupt-map = < | 178 | interrupt-map = < |
176 | /* IDSEL 0x0F - PCI Slot */ | 179 | /* IDSEL 0x0F - PCI Slot */ |
177 | 7800 0 0 1 &ipic 14 8 /* PCI_INTA */ | 180 | 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */ |
178 | 7800 0 0 2 &ipic 15 8 /* PCI_INTB */ | 181 | 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */ |
179 | >; | 182 | >; |
180 | interrupt-parent = < &ipic >; | 183 | interrupt-parent = <&ipic>; |
181 | interrupts = <43 8>; | 184 | interrupts = <67 0x8>; |
182 | bus-range = <1 1>; | 185 | bus-range = <0x1 0x1>; |
183 | ranges = <42000000 0 a0000000 a0000000 0 10000000 | 186 | ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 |
184 | 02000000 0 b0000000 b0000000 0 10000000 | 187 | 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 |
185 | 01000000 0 00000000 e3000000 0 01000000>; | 188 | 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>; |
186 | clock-frequency = <3f940aa>; | 189 | clock-frequency = <66666666>; |
187 | #interrupt-cells = <1>; | 190 | #interrupt-cells = <1>; |
188 | #size-cells = <2>; | 191 | #size-cells = <2>; |
189 | #address-cells = <3>; | 192 | #address-cells = <3>; |
190 | reg = <e0008600 100>; | 193 | reg = <0xe0008600 0x100>; |
191 | compatible = "fsl,mpc8349-pci"; | 194 | compatible = "fsl,mpc8349-pci"; |
192 | device_type = "pci"; | 195 | device_type = "pci"; |
193 | }; | 196 | }; |