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-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts184
1 files changed, 184 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
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index 000000000000..b2e1a5ec3779
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+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -0,0 +1,184 @@
1/*
2 * MPC8349E-mITX-GP Device Tree Source
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11/ {
12 model = "MPC8349EMITXGP";
13 compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
14 #address-cells = <1>;
15 #size-cells = <1>;
16
17 cpus {
18 #cpus = <1>;
19 #address-cells = <1>;
20 #size-cells = <0>;
21
22 PowerPC,8349@0 {
23 device_type = "cpu";
24 reg = <0>;
25 d-cache-line-size = <20>;
26 i-cache-line-size = <20>;
27 d-cache-size = <8000>;
28 i-cache-size = <8000>;
29 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader
32 32-bit;
33 };
34 };
35
36 memory {
37 device_type = "memory";
38 reg = <00000000 10000000>;
39 };
40
41 soc8349@e0000000 {
42 #address-cells = <1>;
43 #size-cells = <1>;
44 #interrupt-cells = <2>;
45 device_type = "soc";
46 ranges = <0 e0000000 00100000>;
47 reg = <e0000000 00000200>;
48 bus-frequency = <0>; // from bootloader
49
50 wdt@200 {
51 device_type = "watchdog";
52 compatible = "mpc83xx_wdt";
53 reg = <200 100>;
54 };
55
56 i2c@3000 {
57 device_type = "i2c";
58 compatible = "fsl-i2c";
59 reg = <3000 100>;
60 interrupts = <e 8>;
61 interrupt-parent = < &ipic >;
62 dfsrr;
63 };
64
65 i2c@3100 {
66 device_type = "i2c";
67 compatible = "fsl-i2c";
68 reg = <3100 100>;
69 interrupts = <f 8>;
70 interrupt-parent = < &ipic >;
71 dfsrr;
72 };
73
74 spi@7000 {
75 device_type = "spi";
76 compatible = "mpc83xx_spi";
77 reg = <7000 1000>;
78 interrupts = <10 8>;
79 interrupt-parent = < &ipic >;
80 mode = <0>;
81 };
82
83 usb@23000 {
84 device_type = "usb";
85 compatible = "fsl-usb2-dr";
86 reg = <23000 1000>;
87 #address-cells = <1>;
88 #size-cells = <0>;
89 interrupt-parent = < &ipic >;
90 interrupts = <26 8>;
91 dr_mode = "otg";
92 phy_type = "ulpi";
93 };
94
95 mdio@24520 {
96 device_type = "mdio";
97 compatible = "gianfar";
98 reg = <24520 20>;
99 #address-cells = <1>;
100 #size-cells = <0>;
101
102 /* Vitesse 8201 */
103 phy1c: ethernet-phy@1c {
104 interrupt-parent = < &ipic >;
105 interrupts = <12 8>;
106 reg = <1c>;
107 device_type = "ethernet-phy";
108 };
109 };
110
111 ethernet@24000 {
112 device_type = "network";
113 model = "TSEC";
114 compatible = "gianfar";
115 reg = <24000 1000>;
116 local-mac-address = [ 00 00 00 00 00 00 ];
117 interrupts = <20 8 21 8 22 8>;
118 interrupt-parent = < &ipic >;
119 phy-handle = < &phy1c >;
120 };
121
122 serial@4500 {
123 device_type = "serial";
124 compatible = "ns16550";
125 reg = <4500 100>;
126 clock-frequency = <0>; // from bootloader
127 interrupts = <9 8>;
128 interrupt-parent = < &ipic >;
129 };
130
131 serial@4600 {
132 device_type = "serial";
133 compatible = "ns16550";
134 reg = <4600 100>;
135 clock-frequency = <0>; // from bootloader
136 interrupts = <a 8>;
137 interrupt-parent = < &ipic >;
138 };
139
140 pci@8600 {
141 interrupt-map-mask = <f800 0 0 7>;
142 interrupt-map = <
143 /* IDSEL 0x0F - PCI Slot */
144 7800 0 0 1 &ipic 14 8 /* PCI_INTA */
145 7800 0 0 2 &ipic 15 8 /* PCI_INTB */
146 >;
147 interrupt-parent = < &ipic >;
148 interrupts = <43 8>;
149 bus-range = <1 1>;
150 ranges = <42000000 0 a0000000 a0000000 0 10000000
151 02000000 0 b0000000 b0000000 0 10000000
152 01000000 0 00000000 e3000000 0 01000000>;
153 clock-frequency = <3f940aa>;
154 #interrupt-cells = <1>;
155 #size-cells = <2>;
156 #address-cells = <3>;
157 reg = <8600 100>;
158 compatible = "83xx";
159 device_type = "pci";
160 };
161
162 crypto@30000 {
163 device_type = "crypto";
164 model = "SEC2";
165 compatible = "talitos";
166 reg = <30000 10000>;
167 interrupts = <b 8>;
168 interrupt-parent = < &ipic >;
169 num-channels = <4>;
170 channel-fifo-len = <18>;
171 exec-units-mask = <0000007e>;
172 descriptor-types-mask = <01010ebf>;
173 };
174
175 ipic: pic@700 {
176 interrupt-controller;
177 #address-cells = <0>;
178 #interrupt-cells = <2>;
179 reg = <700 100>;
180 built-in;
181 device_type = "ipic";
182 };
183 };
184};