aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/boot/dts/mpc8313erdb.dts
diff options
context:
space:
mode:
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8313erdb.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8313erdb.dts217
1 files changed, 141 insertions, 76 deletions
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 9e7eba973262..2d6653fe72ff 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -9,23 +9,33 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/dts-v1/;
13
12/ { 14/ {
13 model = "MPC8313ERDB"; 15 model = "MPC8313ERDB";
14 compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB"; 16 compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
15 #address-cells = <1>; 17 #address-cells = <1>;
16 #size-cells = <1>; 18 #size-cells = <1>;
17 19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
18 cpus { 28 cpus {
19 #address-cells = <1>; 29 #address-cells = <1>;
20 #size-cells = <0>; 30 #size-cells = <0>;
21 31
22 PowerPC,8313@0 { 32 PowerPC,8313@0 {
23 device_type = "cpu"; 33 device_type = "cpu";
24 reg = <0>; 34 reg = <0x0>;
25 d-cache-line-size = <20>; // 32 bytes 35 d-cache-line-size = <32>;
26 i-cache-line-size = <20>; // 32 bytes 36 i-cache-line-size = <32>;
27 d-cache-size = <4000>; // L1, 16K 37 d-cache-size = <16384>;
28 i-cache-size = <4000>; // L1, 16K 38 i-cache-size = <16384>;
29 timebase-frequency = <0>; // from bootloader 39 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader 40 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader 41 clock-frequency = <0>; // from bootloader
@@ -34,134 +44,188 @@
34 44
35 memory { 45 memory {
36 device_type = "memory"; 46 device_type = "memory";
37 reg = <00000000 08000000>; // 128MB at 0 47 reg = <0x00000000 0x08000000>; // 128MB at 0
48 };
49
50 localbus@e0005000 {
51 #address-cells = <2>;
52 #size-cells = <1>;
53 compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
54 reg = <0xe0005000 0x1000>;
55 interrupts = <77 0x8>;
56 interrupt-parent = <&ipic>;
57
58 // CS0 and CS1 are swapped when
59 // booting from nand, but the
60 // addresses are the same.
61 ranges = <0x0 0x0 0xfe000000 0x00800000
62 0x1 0x0 0xe2800000 0x00008000
63 0x2 0x0 0xf0000000 0x00020000
64 0x3 0x0 0xfa000000 0x00008000>;
65
66 flash@0,0 {
67 #address-cells = <1>;
68 #size-cells = <1>;
69 compatible = "cfi-flash";
70 reg = <0x0 0x0 0x800000>;
71 bank-width = <2>;
72 device-width = <1>;
73 };
74
75 nand@1,0 {
76 #address-cells = <1>;
77 #size-cells = <1>;
78 compatible = "fsl,mpc8313-fcm-nand",
79 "fsl,elbc-fcm-nand";
80 reg = <0x1 0x0 0x2000>;
81
82 u-boot@0 {
83 reg = <0x0 0x100000>;
84 read-only;
85 };
86
87 kernel@100000 {
88 reg = <0x100000 0x300000>;
89 };
90
91 fs@400000 {
92 reg = <0x400000 0x1c00000>;
93 };
94 };
38 }; 95 };
39 96
40 soc8313@e0000000 { 97 soc8313@e0000000 {
41 #address-cells = <1>; 98 #address-cells = <1>;
42 #size-cells = <1>; 99 #size-cells = <1>;
43 device_type = "soc"; 100 device_type = "soc";
44 ranges = <0 e0000000 00100000>; 101 compatible = "simple-bus";
45 reg = <e0000000 00000200>; 102 ranges = <0x0 0xe0000000 0x00100000>;
103 reg = <0xe0000000 0x00000200>;
46 bus-frequency = <0>; 104 bus-frequency = <0>;
47 105
48 wdt@200 { 106 wdt@200 {
49 device_type = "watchdog"; 107 device_type = "watchdog";
50 compatible = "mpc83xx_wdt"; 108 compatible = "mpc83xx_wdt";
51 reg = <200 100>; 109 reg = <0x200 0x100>;
52 }; 110 };
53 111
54 i2c@3000 { 112 i2c@3000 {
55 device_type = "i2c"; 113 #address-cells = <1>;
114 #size-cells = <0>;
115 cell-index = <0>;
56 compatible = "fsl-i2c"; 116 compatible = "fsl-i2c";
57 reg = <3000 100>; 117 reg = <0x3000 0x100>;
58 interrupts = <e 8>; 118 interrupts = <14 0x8>;
59 interrupt-parent = < &ipic >; 119 interrupt-parent = <&ipic>;
60 dfsrr; 120 dfsrr;
61 }; 121 };
62 122
63 i2c@3100 { 123 i2c@3100 {
64 device_type = "i2c"; 124 #address-cells = <1>;
125 #size-cells = <0>;
126 cell-index = <1>;
65 compatible = "fsl-i2c"; 127 compatible = "fsl-i2c";
66 reg = <3100 100>; 128 reg = <0x3100 0x100>;
67 interrupts = <f 8>; 129 interrupts = <15 0x8>;
68 interrupt-parent = < &ipic >; 130 interrupt-parent = <&ipic>;
69 dfsrr; 131 dfsrr;
70 }; 132 };
71 133
72 spi@7000 { 134 spi@7000 {
73 device_type = "spi"; 135 cell-index = <0>;
74 compatible = "fsl_spi"; 136 compatible = "fsl,spi";
75 reg = <7000 1000>; 137 reg = <0x7000 0x1000>;
76 interrupts = <10 8>; 138 interrupts = <16 0x8>;
77 interrupt-parent = < &ipic >; 139 interrupt-parent = <&ipic>;
78 mode = "cpu"; 140 mode = "cpu";
79 }; 141 };
80 142
81 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ 143 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
82 usb@23000 { 144 usb@23000 {
83 device_type = "usb";
84 compatible = "fsl-usb2-dr"; 145 compatible = "fsl-usb2-dr";
85 reg = <23000 1000>; 146 reg = <0x23000 0x1000>;
86 #address-cells = <1>; 147 #address-cells = <1>;
87 #size-cells = <0>; 148 #size-cells = <0>;
88 interrupt-parent = < &ipic >; 149 interrupt-parent = <&ipic>;
89 interrupts = <26 8>; 150 interrupts = <38 0x8>;
90 phy_type = "utmi_wide"; 151 phy_type = "utmi_wide";
91 }; 152 };
92 153
93 mdio@24520 { 154 mdio@24520 {
94 device_type = "mdio";
95 compatible = "gianfar";
96 reg = <24520 20>;
97 #address-cells = <1>; 155 #address-cells = <1>;
98 #size-cells = <0>; 156 #size-cells = <0>;
157 compatible = "fsl,gianfar-mdio";
158 reg = <0x24520 0x20>;
99 phy1: ethernet-phy@1 { 159 phy1: ethernet-phy@1 {
100 interrupt-parent = < &ipic >; 160 interrupt-parent = <&ipic>;
101 interrupts = <13 8>; 161 interrupts = <19 0x8>;
102 reg = <1>; 162 reg = <0x1>;
103 device_type = "ethernet-phy"; 163 device_type = "ethernet-phy";
104 }; 164 };
105 phy4: ethernet-phy@4 { 165 phy4: ethernet-phy@4 {
106 interrupt-parent = < &ipic >; 166 interrupt-parent = <&ipic>;
107 interrupts = <14 8>; 167 interrupts = <20 0x8>;
108 reg = <4>; 168 reg = <0x4>;
109 device_type = "ethernet-phy"; 169 device_type = "ethernet-phy";
110 }; 170 };
111 }; 171 };
112 172
113 ethernet@24000 { 173 enet0: ethernet@24000 {
174 cell-index = <0>;
114 device_type = "network"; 175 device_type = "network";
115 model = "eTSEC"; 176 model = "eTSEC";
116 compatible = "gianfar"; 177 compatible = "gianfar";
117 reg = <24000 1000>; 178 reg = <0x24000 0x1000>;
118 local-mac-address = [ 00 00 00 00 00 00 ]; 179 local-mac-address = [ 00 00 00 00 00 00 ];
119 interrupts = <25 8 24 8 23 8>; 180 interrupts = <37 0x8 36 0x8 35 0x8>;
120 interrupt-parent = < &ipic >; 181 interrupt-parent = <&ipic>;
121 phy-handle = < &phy1 >; 182 phy-handle = < &phy1 >;
122 }; 183 };
123 184
124 ethernet@25000 { 185 enet1: ethernet@25000 {
186 cell-index = <1>;
125 device_type = "network"; 187 device_type = "network";
126 model = "eTSEC"; 188 model = "eTSEC";
127 compatible = "gianfar"; 189 compatible = "gianfar";
128 reg = <25000 1000>; 190 reg = <0x25000 0x1000>;
129 local-mac-address = [ 00 00 00 00 00 00 ]; 191 local-mac-address = [ 00 00 00 00 00 00 ];
130 interrupts = <22 8 21 8 20 8>; 192 interrupts = <34 0x8 33 0x8 32 0x8>;
131 interrupt-parent = < &ipic >; 193 interrupt-parent = <&ipic>;
132 phy-handle = < &phy4 >; 194 phy-handle = < &phy4 >;
133 }; 195 };
134 196
135 serial@4500 { 197 serial0: serial@4500 {
198 cell-index = <0>;
136 device_type = "serial"; 199 device_type = "serial";
137 compatible = "ns16550"; 200 compatible = "ns16550";
138 reg = <4500 100>; 201 reg = <0x4500 0x100>;
139 clock-frequency = <0>; 202 clock-frequency = <0>;
140 interrupts = <9 8>; 203 interrupts = <9 0x8>;
141 interrupt-parent = < &ipic >; 204 interrupt-parent = <&ipic>;
142 }; 205 };
143 206
144 serial@4600 { 207 serial1: serial@4600 {
208 cell-index = <1>;
145 device_type = "serial"; 209 device_type = "serial";
146 compatible = "ns16550"; 210 compatible = "ns16550";
147 reg = <4600 100>; 211 reg = <0x4600 0x100>;
148 clock-frequency = <0>; 212 clock-frequency = <0>;
149 interrupts = <a 8>; 213 interrupts = <10 0x8>;
150 interrupt-parent = < &ipic >; 214 interrupt-parent = <&ipic>;
151 }; 215 };
152 216
153 crypto@30000 { 217 crypto@30000 {
154 device_type = "crypto"; 218 device_type = "crypto";
155 model = "SEC2"; 219 model = "SEC2";
156 compatible = "talitos"; 220 compatible = "talitos";
157 reg = <30000 7000>; 221 reg = <0x30000 0x7000>;
158 interrupts = <b 8>; 222 interrupts = <11 0x8>;
159 interrupt-parent = < &ipic >; 223 interrupt-parent = <&ipic>;
160 /* Rev. 2.2 */ 224 /* Rev. 2.2 */
161 num-channels = <1>; 225 num-channels = <1>;
162 channel-fifo-len = <18>; 226 channel-fifo-len = <24>;
163 exec-units-mask = <0000004c>; 227 exec-units-mask = <0x0000004c>;
164 descriptor-types-mask = <0122003f>; 228 descriptor-types-mask = <0x0122003f>;
165 }; 229 };
166 230
167 /* IPIC 231 /* IPIC
@@ -174,37 +238,38 @@
174 interrupt-controller; 238 interrupt-controller;
175 #address-cells = <0>; 239 #address-cells = <0>;
176 #interrupt-cells = <2>; 240 #interrupt-cells = <2>;
177 reg = <700 100>; 241 reg = <0x700 0x100>;
178 device_type = "ipic"; 242 device_type = "ipic";
179 }; 243 };
180 }; 244 };
181 245
182 pci@e0008500 { 246 pci0: pci@e0008500 {
183 interrupt-map-mask = <f800 0 0 7>; 247 cell-index = <1>;
248 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
184 interrupt-map = < 249 interrupt-map = <
185 250
186 /* IDSEL 0x0E -mini PCI */ 251 /* IDSEL 0x0E -mini PCI */
187 7000 0 0 1 &ipic 12 8 252 0x7000 0x0 0x0 0x1 &ipic 18 0x8
188 7000 0 0 2 &ipic 12 8 253 0x7000 0x0 0x0 0x2 &ipic 18 0x8
189 7000 0 0 3 &ipic 12 8 254 0x7000 0x0 0x0 0x3 &ipic 18 0x8
190 7000 0 0 4 &ipic 12 8 255 0x7000 0x0 0x0 0x4 &ipic 18 0x8
191 256
192 /* IDSEL 0x0F - PCI slot */ 257 /* IDSEL 0x0F - PCI slot */
193 7800 0 0 1 &ipic 11 8 258 0x7800 0x0 0x0 0x1 &ipic 17 0x8
194 7800 0 0 2 &ipic 12 8 259 0x7800 0x0 0x0 0x2 &ipic 18 0x8
195 7800 0 0 3 &ipic 11 8 260 0x7800 0x0 0x0 0x3 &ipic 17 0x8
196 7800 0 0 4 &ipic 12 8>; 261 0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
197 interrupt-parent = < &ipic >; 262 interrupt-parent = <&ipic>;
198 interrupts = <42 8>; 263 interrupts = <66 0x8>;
199 bus-range = <0 0>; 264 bus-range = <0x0 0x0>;
200 ranges = <02000000 0 90000000 90000000 0 10000000 265 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
201 42000000 0 80000000 80000000 0 10000000 266 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
202 01000000 0 00000000 e2000000 0 00100000>; 267 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
203 clock-frequency = <3f940aa>; 268 clock-frequency = <66666666>;
204 #interrupt-cells = <1>; 269 #interrupt-cells = <1>;
205 #size-cells = <2>; 270 #size-cells = <2>;
206 #address-cells = <3>; 271 #address-cells = <3>;
207 reg = <e0008500 100>; 272 reg = <0xe0008500 0x100>;
208 compatible = "fsl,mpc8349-pci"; 273 compatible = "fsl,mpc8349-pci";
209 device_type = "pci"; 274 device_type = "pci";
210 }; 275 };
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-17 09:52:25 -0400