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Diffstat (limited to 'arch/powerpc/boot/dts/mpc8272ads.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8272ads.dts309
1 files changed, 167 insertions, 142 deletions
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 43130541799a..3fe991d4cb03 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -11,7 +11,7 @@
11 11
12/ { 12/ {
13 model = "MPC8272ADS"; 13 model = "MPC8272ADS";
14 compatible = "MPC8260ADS"; 14 compatible = "fsl,mpc8272ads";
15 #address-cells = <1>; 15 #address-cells = <1>;
16 #size-cells = <1>; 16 #size-cells = <1>;
17 17
@@ -22,187 +22,208 @@
22 PowerPC,8272@0 { 22 PowerPC,8272@0 {
23 device_type = "cpu"; 23 device_type = "cpu";
24 reg = <0>; 24 reg = <0>;
25 d-cache-line-size = <20>; // 32 bytes 25 d-cache-line-size = <d#32>;
26 i-cache-line-size = <20>; // 32 bytes 26 i-cache-line-size = <d#32>;
27 d-cache-size = <4000>; // L1, 16K 27 d-cache-size = <d#16384>;
28 i-cache-size = <4000>; // L1, 16K 28 i-cache-size = <d#16384>;
29 timebase-frequency = <0>; 29 timebase-frequency = <0>;
30 bus-frequency = <0>; 30 bus-frequency = <0>;
31 clock-frequency = <0>; 31 clock-frequency = <0>;
32 }; 32 };
33 }; 33 };
34 34
35 pci_pic: interrupt-controller@f8200000 {
36 #address-cells = <0>;
37 #interrupt-cells = <2>;
38 interrupt-controller;
39 reg = <f8200000 f8200004>;
40 device_type = "pci-pic";
41 };
42
43 memory { 35 memory {
44 device_type = "memory"; 36 device_type = "memory";
45 reg = <00000000 4000000 f4500000 00000020>; 37 reg = <0 0>;
46 };
47
48 chosen {
49 name = "chosen";
50 linux,platform = <0>;
51 interrupt-controller = <&Cpm_pic>;
52 }; 38 };
53 39
54 soc8272@f0000000 { 40 localbus@f0010100 {
55 #address-cells = <1>; 41 compatible = "fsl,mpc8272-localbus",
42 "fsl,pq2-localbus";
43 #address-cells = <2>;
56 #size-cells = <1>; 44 #size-cells = <1>;
57 device_type = "soc"; 45 reg = <f0010100 40>;
58 ranges = <00000000 f0000000 00053000>;
59 reg = <f0000000 10000>;
60 46
61 mdio@0 { 47 ranges = <0 0 fe000000 02000000
62 device_type = "mdio"; 48 1 0 f4500000 00008000
63 compatible = "fs_enet"; 49 3 0 f8200000 00008000>;
64 reg = <0 0>;
65 #address-cells = <1>;
66 #size-cells = <0>;
67
68 phy0:ethernet-phy@0 {
69 interrupt-parent = <&Cpm_pic>;
70 interrupts = <17 4>;
71 reg = <0>;
72 bitbang = [ 12 12 13 02 02 01 ];
73 device_type = "ethernet-phy";
74 };
75 50
76 phy1:ethernet-phy@1 { 51 flash@0,0 {
77 interrupt-parent = <&Cpm_pic>; 52 compatible = "jedec-flash";
78 interrupts = <17 4>; 53 reg = <0 0 2000000>;
79 bitbang = [ 12 12 13 02 02 01 ]; 54 bank-width = <4>;
80 reg = <3>; 55 device-width = <1>;
81 device_type = "ethernet-phy";
82 };
83 }; 56 };
84 57
85 ethernet@24000 { 58 board-control@1,0 {
86 #address-cells = <1>; 59 reg = <1 0 20>;
87 #size-cells = <0>; 60 compatible = "fsl,mpc8272ads-bcsr";
88 device_type = "network";
89 device-id = <1>;
90 compatible = "fs_enet";
91 model = "FCC";
92 reg = <11300 20 8400 100 11380 30>;
93 mac-address = [ 00 11 2F 99 43 54 ];
94 interrupts = <20 2>;
95 interrupt-parent = <&Cpm_pic>;
96 phy-handle = <&Phy0>;
97 rx-clock = <13>;
98 tx-clock = <12>;
99 }; 61 };
100 62
101 ethernet@25000 { 63 PCI_PIC: interrupt-controller@3,0 {
102 device_type = "network"; 64 compatible = "fsl,mpc8272ads-pci-pic",
103 device-id = <2>; 65 "fsl,pq2ads-pci-pic";
104 compatible = "fs_enet"; 66 #interrupt-cells = <1>;
105 model = "FCC"; 67 interrupt-controller;
106 reg = <11320 20 8500 100 113b0 30>; 68 reg = <3 0 8>;
107 mac-address = [ 00 11 2F 99 44 54 ]; 69 interrupt-parent = <&PIC>;
108 interrupts = <21 2>; 70 interrupts = <14 8>;
109 interrupt-parent = <&Cpm_pic>;
110 phy-handle = <&Phy1>;
111 rx-clock = <17>;
112 tx-clock = <18>;
113 }; 71 };
72 };
73
74
75 pci@f0010800 {
76 device_type = "pci";
77 reg = <f0010800 10c f00101ac 8 f00101c4 8>;
78 compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
79 #interrupt-cells = <1>;
80 #size-cells = <2>;
81 #address-cells = <3>;
82 clock-frequency = <d#66666666>;
83 interrupt-map-mask = <f800 0 0 7>;
84 interrupt-map = <
85 /* IDSEL 0x16 */
86 b000 0 0 1 &PCI_PIC 0
87 b000 0 0 2 &PCI_PIC 1
88 b000 0 0 3 &PCI_PIC 2
89 b000 0 0 4 &PCI_PIC 3
90
91 /* IDSEL 0x17 */
92 b800 0 0 1 &PCI_PIC 4
93 b800 0 0 2 &PCI_PIC 5
94 b800 0 0 3 &PCI_PIC 6
95 b800 0 0 4 &PCI_PIC 7
96
97 /* IDSEL 0x18 */
98 c000 0 0 1 &PCI_PIC 8
99 c000 0 0 2 &PCI_PIC 9
100 c000 0 0 3 &PCI_PIC a
101 c000 0 0 4 &PCI_PIC b>;
102
103 interrupt-parent = <&PIC>;
104 interrupts = <12 8>;
105 ranges = <42000000 0 80000000 80000000 0 20000000
106 02000000 0 a0000000 a0000000 0 20000000
107 01000000 0 00000000 f6000000 0 02000000>;
108 };
109
110 soc@f0000000 {
111 #address-cells = <1>;
112 #size-cells = <1>;
113 device_type = "soc";
114 compatible = "fsl,mpc8272", "fsl,pq2-soc";
115 ranges = <00000000 f0000000 00053000>;
116
117 // Temporary -- will go away once kernel uses ranges for get_immrbase().
118 reg = <f0000000 00053000>;
114 119
115 cpm@f0000000 { 120 cpm@119c0 {
116 #address-cells = <1>; 121 #address-cells = <1>;
117 #size-cells = <1>; 122 #size-cells = <1>;
118 device_type = "cpm"; 123 compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
119 model = "CPM2"; 124 reg = <119c0 30 0 2000>;
120 ranges = <00000000 00000000 20000>; 125 ranges;
121 reg = <0 20000>; 126
122 command-proc = <119c0>; 127 brg@119f0 {
123 brg-frequency = <17D7840>; 128 compatible = "fsl,mpc8272-brg",
124 cpm_clk = <BEBC200>; 129 "fsl,cpm2-brg",
125 130 "fsl,cpm-brg";
126 scc@11a00 { 131 reg = <119f0 10 115f0 10>;
132 };
133
134 serial@11a00 {
127 device_type = "serial"; 135 device_type = "serial";
128 compatible = "cpm_uart"; 136 compatible = "fsl,mpc8272-scc-uart",
129 model = "SCC"; 137 "fsl,cpm2-scc-uart";
130 device-id = <1>;
131 reg = <11a00 20 8000 100>; 138 reg = <11a00 20 8000 100>;
132 current-speed = <1c200>; 139 interrupts = <28 8>;
133 interrupts = <28 2>; 140 interrupt-parent = <&PIC>;
134 interrupt-parent = <&Cpm_pic>; 141 fsl,cpm-brg = <1>;
135 clock-setup = <0 00ffffff>; 142 fsl,cpm-command = <00800000>;
136 rx-clock = <1>;
137 tx-clock = <1>;
138 }; 143 };
139 144
140 scc@11a60 { 145 serial@11a60 {
141 device_type = "serial"; 146 device_type = "serial";
142 compatible = "cpm_uart"; 147 compatible = "fsl,mpc8272-scc-uart",
143 model = "SCC"; 148 "fsl,cpm2-scc-uart";
144 device-id = <4>;
145 reg = <11a60 20 8300 100>; 149 reg = <11a60 20 8300 100>;
146 current-speed = <1c200>; 150 interrupts = <2b 8>;
147 interrupts = <2b 2>; 151 interrupt-parent = <&PIC>;
148 interrupt-parent = <&Cpm_pic>; 152 fsl,cpm-brg = <4>;
149 clock-setup = <1b ffffff00>; 153 fsl,cpm-command = <0ce00000>;
150 rx-clock = <4>; 154 };
151 tx-clock = <4>; 155
156 mdio@10d40 {
157 device_type = "mdio";
158 compatible = "fsl,mpc8272ads-mdio-bitbang",
159 "fsl,mpc8272-mdio-bitbang",
160 "fsl,cpm2-mdio-bitbang";
161 reg = <10d40 14>;
162 #address-cells = <1>;
163 #size-cells = <0>;
164 fsl,mdio-pin = <12>;
165 fsl,mdc-pin = <13>;
166
167 PHY0: ethernet-phy@0 {
168 interrupt-parent = <&PIC>;
169 interrupts = <17 8>;
170 reg = <0>;
171 device_type = "ethernet-phy";
172 };
173
174 PHY1: ethernet-phy@1 {
175 interrupt-parent = <&PIC>;
176 interrupts = <17 8>;
177 reg = <3>;
178 device_type = "ethernet-phy";
179 };
180 };
181
182 ethernet@11300 {
183 device_type = "network";
184 compatible = "fsl,mpc8272-fcc-enet",
185 "fsl,cpm2-fcc-enet";
186 reg = <11300 20 8400 100 11390 1>;
187 local-mac-address = [ 00 00 00 00 00 00 ];
188 interrupts = <20 8>;
189 interrupt-parent = <&PIC>;
190 phy-handle = <&PHY0>;
191 linux,network-index = <0>;
192 fsl,cpm-command = <12000300>;
193 };
194
195 ethernet@11320 {
196 device_type = "network";
197 compatible = "fsl,mpc8272-fcc-enet",
198 "fsl,cpm2-fcc-enet";
199 reg = <11320 20 8500 100 113b0 1>;
200 local-mac-address = [ 00 00 00 00 00 00 ];
201 interrupts = <21 8>;
202 interrupt-parent = <&PIC>;
203 phy-handle = <&PHY1>;
204 linux,network-index = <1>;
205 fsl,cpm-command = <16200300>;
152 }; 206 };
153 }; 207 };
154 208
155 cpm_pic:interrupt-controller@10c00 { 209 PIC: interrupt-controller@10c00 {
156 #address-cells = <0>;
157 #interrupt-cells = <2>; 210 #interrupt-cells = <2>;
158 interrupt-controller; 211 interrupt-controller;
159 reg = <10c00 80>; 212 reg = <10c00 80>;
160 device_type = "cpm-pic"; 213 compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
161 compatible = "CPM2";
162 };
163
164 pci@0500 {
165 #interrupt-cells = <1>;
166 #size-cells = <2>;
167 #address-cells = <3>;
168 compatible = "8272";
169 device_type = "pci";
170 reg = <10430 4dc>;
171 clock-frequency = <3f940aa>;
172 interrupt-map-mask = <f800 0 0 7>;
173 interrupt-map = <
174 /* IDSEL 0x16 */
175 b000 0 0 1 f8200000 40 8
176 b000 0 0 2 f8200000 41 8
177 b000 0 0 3 f8200000 42 8
178 b000 0 0 4 f8200000 43 8
179
180 /* IDSEL 0x17 */
181 b800 0 0 1 f8200000 43 8
182 b800 0 0 2 f8200000 40 8
183 b800 0 0 3 f8200000 41 8
184 b800 0 0 4 f8200000 42 8
185
186 /* IDSEL 0x18 */
187 c000 0 0 1 f8200000 42 8
188 c000 0 0 2 f8200000 43 8
189 c000 0 0 3 f8200000 40 8
190 c000 0 0 4 f8200000 41 8>;
191 interrupt-parent = <&Cpm_pic>;
192 interrupts = <14 8>;
193 bus-range = <0 0>;
194 ranges = <02000000 0 80000000 80000000 0 40000000
195 01000000 0 00000000 f6000000 0 02000000>;
196 }; 214 };
197 215
198/* May need to remove if on a part without crypto engine */ 216/* May need to remove if on a part without crypto engine */
199 crypto@30000 { 217 crypto@30000 {
200 device_type = "crypto"; 218 device_type = "crypto";
201 model = "SEC2"; 219 model = "SEC2";
202 compatible = "talitos"; 220 compatible = "fsl,mpc8272-talitos-sec2",
221 "fsl,talitos-sec2",
222 "fsl,talitos",
223 "talitos";
203 reg = <30000 10000>; 224 reg = <30000 10000>;
204 interrupts = <b 2>; 225 interrupts = <b 8>;
205 interrupt-parent = <&Cpm_pic>; 226 interrupt-parent = <&PIC>;
206 num-channels = <4>; 227 num-channels = <4>;
207 channel-fifo-len = <18>; 228 channel-fifo-len = <18>;
208 exec-units-mask = <0000007e>; 229 exec-units-mask = <0000007e>;
@@ -210,4 +231,8 @@
210 descriptor-types-mask = <01010ebf>; 231 descriptor-types-mask = <01010ebf>;
211 }; 232 };
212 }; 233 };
234
235 chosen {
236 linux,stdout-path = "/soc/cpm/serial@11a00";
237 };
213}; 238};
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-09 00:42:49 -0500