diff options
Diffstat (limited to 'arch/powerpc/boot/dts/lite5200b.dts')
| -rw-r--r-- | arch/powerpc/boot/dts/lite5200b.dts | 77 |
1 files changed, 38 insertions, 39 deletions
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts index 00211b39a342..5185625a9419 100644 --- a/arch/powerpc/boot/dts/lite5200b.dts +++ b/arch/powerpc/boot/dts/lite5200b.dts | |||
| @@ -62,13 +62,12 @@ | |||
| 62 | reg = <200 38>; | 62 | reg = <200 38>; |
| 63 | }; | 63 | }; |
| 64 | 64 | ||
| 65 | pic@500 { | 65 | mpc5200_pic: pic@500 { |
| 66 | // 5200 interrupts are encoded into two levels; | 66 | // 5200 interrupts are encoded into two levels; |
| 67 | linux,phandle = <500>; | ||
| 68 | interrupt-controller; | 67 | interrupt-controller; |
| 69 | #interrupt-cells = <3>; | 68 | #interrupt-cells = <3>; |
| 70 | device_type = "interrupt-controller"; | 69 | device_type = "interrupt-controller"; |
| 71 | compatible = "mpc5200b-pic\0mpc5200-pic"; | 70 | compatible = "mpc5200b-pic\0mpc5200_pic"; |
| 72 | reg = <500 80>; | 71 | reg = <500 80>; |
| 73 | built-in; | 72 | built-in; |
| 74 | }; | 73 | }; |
| @@ -79,7 +78,7 @@ | |||
| 79 | cell-index = <0>; | 78 | cell-index = <0>; |
| 80 | reg = <600 10>; | 79 | reg = <600 10>; |
| 81 | interrupts = <1 9 0>; | 80 | interrupts = <1 9 0>; |
| 82 | interrupt-parent = <500>; | 81 | interrupt-parent = <&mpc5200_pic>; |
| 83 | has-wdt; | 82 | has-wdt; |
| 84 | }; | 83 | }; |
| 85 | 84 | ||
| @@ -89,7 +88,7 @@ | |||
| 89 | cell-index = <1>; | 88 | cell-index = <1>; |
| 90 | reg = <610 10>; | 89 | reg = <610 10>; |
| 91 | interrupts = <1 a 0>; | 90 | interrupts = <1 a 0>; |
| 92 | interrupt-parent = <500>; | 91 | interrupt-parent = <&mpc5200_pic>; |
| 93 | }; | 92 | }; |
| 94 | 93 | ||
| 95 | gpt@620 { // General Purpose Timer | 94 | gpt@620 { // General Purpose Timer |
| @@ -98,7 +97,7 @@ | |||
| 98 | cell-index = <2>; | 97 | cell-index = <2>; |
| 99 | reg = <620 10>; | 98 | reg = <620 10>; |
| 100 | interrupts = <1 b 0>; | 99 | interrupts = <1 b 0>; |
| 101 | interrupt-parent = <500>; | 100 | interrupt-parent = <&mpc5200_pic>; |
| 102 | }; | 101 | }; |
| 103 | 102 | ||
| 104 | gpt@630 { // General Purpose Timer | 103 | gpt@630 { // General Purpose Timer |
| @@ -107,7 +106,7 @@ | |||
| 107 | cell-index = <3>; | 106 | cell-index = <3>; |
| 108 | reg = <630 10>; | 107 | reg = <630 10>; |
| 109 | interrupts = <1 c 0>; | 108 | interrupts = <1 c 0>; |
| 110 | interrupt-parent = <500>; | 109 | interrupt-parent = <&mpc5200_pic>; |
| 111 | }; | 110 | }; |
| 112 | 111 | ||
| 113 | gpt@640 { // General Purpose Timer | 112 | gpt@640 { // General Purpose Timer |
| @@ -116,7 +115,7 @@ | |||
| 116 | cell-index = <4>; | 115 | cell-index = <4>; |
| 117 | reg = <640 10>; | 116 | reg = <640 10>; |
| 118 | interrupts = <1 d 0>; | 117 | interrupts = <1 d 0>; |
| 119 | interrupt-parent = <500>; | 118 | interrupt-parent = <&mpc5200_pic>; |
| 120 | }; | 119 | }; |
| 121 | 120 | ||
| 122 | gpt@650 { // General Purpose Timer | 121 | gpt@650 { // General Purpose Timer |
| @@ -125,7 +124,7 @@ | |||
| 125 | cell-index = <5>; | 124 | cell-index = <5>; |
| 126 | reg = <650 10>; | 125 | reg = <650 10>; |
| 127 | interrupts = <1 e 0>; | 126 | interrupts = <1 e 0>; |
| 128 | interrupt-parent = <500>; | 127 | interrupt-parent = <&mpc5200_pic>; |
| 129 | }; | 128 | }; |
| 130 | 129 | ||
| 131 | gpt@660 { // General Purpose Timer | 130 | gpt@660 { // General Purpose Timer |
| @@ -134,7 +133,7 @@ | |||
| 134 | cell-index = <6>; | 133 | cell-index = <6>; |
| 135 | reg = <660 10>; | 134 | reg = <660 10>; |
| 136 | interrupts = <1 f 0>; | 135 | interrupts = <1 f 0>; |
| 137 | interrupt-parent = <500>; | 136 | interrupt-parent = <&mpc5200_pic>; |
| 138 | }; | 137 | }; |
| 139 | 138 | ||
| 140 | gpt@670 { // General Purpose Timer | 139 | gpt@670 { // General Purpose Timer |
| @@ -143,7 +142,7 @@ | |||
| 143 | cell-index = <7>; | 142 | cell-index = <7>; |
| 144 | reg = <670 10>; | 143 | reg = <670 10>; |
| 145 | interrupts = <1 10 0>; | 144 | interrupts = <1 10 0>; |
| 146 | interrupt-parent = <500>; | 145 | interrupt-parent = <&mpc5200_pic>; |
| 147 | }; | 146 | }; |
| 148 | 147 | ||
| 149 | rtc@800 { // Real time clock | 148 | rtc@800 { // Real time clock |
| @@ -151,7 +150,7 @@ | |||
| 151 | device_type = "rtc"; | 150 | device_type = "rtc"; |
| 152 | reg = <800 100>; | 151 | reg = <800 100>; |
| 153 | interrupts = <1 5 0 1 6 0>; | 152 | interrupts = <1 5 0 1 6 0>; |
| 154 | interrupt-parent = <500>; | 153 | interrupt-parent = <&mpc5200_pic>; |
| 155 | }; | 154 | }; |
| 156 | 155 | ||
| 157 | mscan@900 { | 156 | mscan@900 { |
| @@ -159,7 +158,7 @@ | |||
| 159 | compatible = "mpc5200b-mscan\0mpc5200-mscan"; | 158 | compatible = "mpc5200b-mscan\0mpc5200-mscan"; |
| 160 | cell-index = <0>; | 159 | cell-index = <0>; |
| 161 | interrupts = <2 11 0>; | 160 | interrupts = <2 11 0>; |
| 162 | interrupt-parent = <500>; | 161 | interrupt-parent = <&mpc5200_pic>; |
| 163 | reg = <900 80>; | 162 | reg = <900 80>; |
| 164 | }; | 163 | }; |
| 165 | 164 | ||
| @@ -168,7 +167,7 @@ | |||
| 168 | compatible = "mpc5200b-mscan\0mpc5200-mscan"; | 167 | compatible = "mpc5200b-mscan\0mpc5200-mscan"; |
| 169 | cell-index = <1>; | 168 | cell-index = <1>; |
| 170 | interrupts = <2 12 0>; | 169 | interrupts = <2 12 0>; |
| 171 | interrupt-parent = <500>; | 170 | interrupt-parent = <&mpc5200_pic>; |
| 172 | reg = <980 80>; | 171 | reg = <980 80>; |
| 173 | }; | 172 | }; |
| 174 | 173 | ||
| @@ -176,14 +175,14 @@ | |||
| 176 | compatible = "mpc5200b-gpio\0mpc5200-gpio"; | 175 | compatible = "mpc5200b-gpio\0mpc5200-gpio"; |
| 177 | reg = <b00 40>; | 176 | reg = <b00 40>; |
| 178 | interrupts = <1 7 0>; | 177 | interrupts = <1 7 0>; |
| 179 | interrupt-parent = <500>; | 178 | interrupt-parent = <&mpc5200_pic>; |
| 180 | }; | 179 | }; |
| 181 | 180 | ||
| 182 | gpio-wkup@c00 { | 181 | gpio-wkup@c00 { |
| 183 | compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup"; | 182 | compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup"; |
| 184 | reg = <c00 40>; | 183 | reg = <c00 40>; |
| 185 | interrupts = <1 8 0 0 3 0>; | 184 | interrupts = <1 8 0 0 3 0>; |
| 186 | interrupt-parent = <500>; | 185 | interrupt-parent = <&mpc5200_pic>; |
| 187 | }; | 186 | }; |
| 188 | 187 | ||
| 189 | pci@0d00 { | 188 | pci@0d00 { |
| @@ -194,18 +193,18 @@ | |||
| 194 | compatible = "mpc5200b-pci\0mpc5200-pci"; | 193 | compatible = "mpc5200b-pci\0mpc5200-pci"; |
| 195 | reg = <d00 100>; | 194 | reg = <d00 100>; |
| 196 | interrupt-map-mask = <f800 0 0 7>; | 195 | interrupt-map-mask = <f800 0 0 7>; |
| 197 | interrupt-map = <c000 0 0 1 500 0 0 3 // 1st slot | 196 | interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot |
| 198 | c000 0 0 2 500 1 1 3 | 197 | c000 0 0 2 &mpc5200_pic 1 1 3 |
| 199 | c000 0 0 3 500 1 2 3 | 198 | c000 0 0 3 &mpc5200_pic 1 2 3 |
| 200 | c000 0 0 4 500 1 3 3 | 199 | c000 0 0 4 &mpc5200_pic 1 3 3 |
| 201 | 200 | ||
| 202 | c800 0 0 1 500 1 1 3 // 2nd slot | 201 | c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot |
| 203 | c800 0 0 2 500 1 2 3 | 202 | c800 0 0 2 &mpc5200_pic 1 2 3 |
| 204 | c800 0 0 3 500 1 3 3 | 203 | c800 0 0 3 &mpc5200_pic 1 3 3 |
| 205 | c800 0 0 4 500 0 0 3>; | 204 | c800 0 0 4 &mpc5200_pic 0 0 3>; |
| 206 | clock-frequency = <0>; // From boot loader | 205 | clock-frequency = <0>; // From boot loader |
| 207 | interrupts = <2 8 0 2 9 0 2 a 0>; | 206 | interrupts = <2 8 0 2 9 0 2 a 0>; |
| 208 | interrupt-parent = <500>; | 207 | interrupt-parent = <&mpc5200_pic>; |
| 209 | bus-range = <0 0>; | 208 | bus-range = <0 0>; |
| 210 | ranges = <42000000 0 80000000 80000000 0 20000000 | 209 | ranges = <42000000 0 80000000 80000000 0 20000000 |
| 211 | 02000000 0 a0000000 a0000000 0 10000000 | 210 | 02000000 0 a0000000 a0000000 0 10000000 |
| @@ -217,7 +216,7 @@ | |||
| 217 | compatible = "mpc5200b-spi\0mpc5200-spi"; | 216 | compatible = "mpc5200b-spi\0mpc5200-spi"; |
| 218 | reg = <f00 20>; | 217 | reg = <f00 20>; |
| 219 | interrupts = <2 d 0 2 e 0>; | 218 | interrupts = <2 d 0 2 e 0>; |
| 220 | interrupt-parent = <500>; | 219 | interrupt-parent = <&mpc5200_pic>; |
| 221 | }; | 220 | }; |
| 222 | 221 | ||
| 223 | usb@1000 { | 222 | usb@1000 { |
| @@ -225,7 +224,7 @@ | |||
| 225 | compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be"; | 224 | compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be"; |
| 226 | reg = <1000 ff>; | 225 | reg = <1000 ff>; |
| 227 | interrupts = <2 6 0>; | 226 | interrupts = <2 6 0>; |
| 228 | interrupt-parent = <500>; | 227 | interrupt-parent = <&mpc5200_pic>; |
| 229 | }; | 228 | }; |
| 230 | 229 | ||
| 231 | bestcomm@1200 { | 230 | bestcomm@1200 { |
| @@ -236,7 +235,7 @@ | |||
| 236 | 3 4 0 3 5 0 3 6 0 3 7 0 | 235 | 3 4 0 3 5 0 3 6 0 3 7 0 |
| 237 | 3 8 0 3 9 0 3 a 0 3 b 0 | 236 | 3 8 0 3 9 0 3 a 0 3 b 0 |
| 238 | 3 c 0 3 d 0 3 e 0 3 f 0>; | 237 | 3 c 0 3 d 0 3 e 0 3 f 0>; |
| 239 | interrupt-parent = <500>; | 238 | interrupt-parent = <&mpc5200_pic>; |
| 240 | }; | 239 | }; |
| 241 | 240 | ||
| 242 | xlb@1f00 { | 241 | xlb@1f00 { |
| @@ -251,7 +250,7 @@ | |||
| 251 | cell-index = <0>; | 250 | cell-index = <0>; |
| 252 | reg = <2000 100>; | 251 | reg = <2000 100>; |
| 253 | interrupts = <2 1 0>; | 252 | interrupts = <2 1 0>; |
| 254 | interrupt-parent = <500>; | 253 | interrupt-parent = <&mpc5200_pic>; |
| 255 | }; | 254 | }; |
| 256 | 255 | ||
| 257 | // PSC2 in ac97 mode example | 256 | // PSC2 in ac97 mode example |
| @@ -261,7 +260,7 @@ | |||
| 261 | // cell-index = <1>; | 260 | // cell-index = <1>; |
| 262 | // reg = <2200 100>; | 261 | // reg = <2200 100>; |
| 263 | // interrupts = <2 2 0>; | 262 | // interrupts = <2 2 0>; |
| 264 | // interrupt-parent = <500>; | 263 | // interrupt-parent = <&mpc5200_pic>; |
| 265 | //}; | 264 | //}; |
| 266 | 265 | ||
| 267 | // PSC3 in CODEC mode example | 266 | // PSC3 in CODEC mode example |
| @@ -271,7 +270,7 @@ | |||
| 271 | // cell-index = <2>; | 270 | // cell-index = <2>; |
| 272 | // reg = <2400 100>; | 271 | // reg = <2400 100>; |
| 273 | // interrupts = <2 3 0>; | 272 | // interrupts = <2 3 0>; |
| 274 | // interrupt-parent = <500>; | 273 | // interrupt-parent = <&mpc5200_pic>; |
| 275 | //}; | 274 | //}; |
| 276 | 275 | ||
| 277 | // PSC4 in uart mode example | 276 | // PSC4 in uart mode example |
| @@ -281,7 +280,7 @@ | |||
| 281 | // cell-index = <3>; | 280 | // cell-index = <3>; |
| 282 | // reg = <2600 100>; | 281 | // reg = <2600 100>; |
| 283 | // interrupts = <2 b 0>; | 282 | // interrupts = <2 b 0>; |
| 284 | // interrupt-parent = <500>; | 283 | // interrupt-parent = <&mpc5200_pic>; |
| 285 | //}; | 284 | //}; |
| 286 | 285 | ||
| 287 | // PSC5 in uart mode example | 286 | // PSC5 in uart mode example |
| @@ -291,7 +290,7 @@ | |||
| 291 | // cell-index = <4>; | 290 | // cell-index = <4>; |
| 292 | // reg = <2800 100>; | 291 | // reg = <2800 100>; |
| 293 | // interrupts = <2 c 0>; | 292 | // interrupts = <2 c 0>; |
| 294 | // interrupt-parent = <500>; | 293 | // interrupt-parent = <&mpc5200_pic>; |
| 295 | //}; | 294 | //}; |
| 296 | 295 | ||
| 297 | // PSC6 in spi mode example | 296 | // PSC6 in spi mode example |
| @@ -301,7 +300,7 @@ | |||
| 301 | // cell-index = <5>; | 300 | // cell-index = <5>; |
| 302 | // reg = <2c00 100>; | 301 | // reg = <2c00 100>; |
| 303 | // interrupts = <2 4 0>; | 302 | // interrupts = <2 4 0>; |
| 304 | // interrupt-parent = <500>; | 303 | // interrupt-parent = <&mpc5200_pic>; |
| 305 | //}; | 304 | //}; |
| 306 | 305 | ||
| 307 | ethernet@3000 { | 306 | ethernet@3000 { |
| @@ -310,7 +309,7 @@ | |||
| 310 | reg = <3000 800>; | 309 | reg = <3000 800>; |
| 311 | mac-address = [ 02 03 04 05 06 07 ]; // Bad! | 310 | mac-address = [ 02 03 04 05 06 07 ]; // Bad! |
| 312 | interrupts = <2 5 0>; | 311 | interrupts = <2 5 0>; |
| 313 | interrupt-parent = <500>; | 312 | interrupt-parent = <&mpc5200_pic>; |
| 314 | }; | 313 | }; |
| 315 | 314 | ||
| 316 | ata@3a00 { | 315 | ata@3a00 { |
| @@ -318,7 +317,7 @@ | |||
| 318 | compatible = "mpc5200b-ata\0mpc5200-ata"; | 317 | compatible = "mpc5200b-ata\0mpc5200-ata"; |
| 319 | reg = <3a00 100>; | 318 | reg = <3a00 100>; |
| 320 | interrupts = <2 7 0>; | 319 | interrupts = <2 7 0>; |
| 321 | interrupt-parent = <500>; | 320 | interrupt-parent = <&mpc5200_pic>; |
| 322 | }; | 321 | }; |
| 323 | 322 | ||
| 324 | i2c@3d00 { | 323 | i2c@3d00 { |
| @@ -327,7 +326,7 @@ | |||
| 327 | cell-index = <0>; | 326 | cell-index = <0>; |
| 328 | reg = <3d00 40>; | 327 | reg = <3d00 40>; |
| 329 | interrupts = <2 f 0>; | 328 | interrupts = <2 f 0>; |
| 330 | interrupt-parent = <500>; | 329 | interrupt-parent = <&mpc5200_pic>; |
| 331 | fsl5200-clocking; | 330 | fsl5200-clocking; |
| 332 | }; | 331 | }; |
| 333 | 332 | ||
| @@ -337,7 +336,7 @@ | |||
| 337 | cell-index = <1>; | 336 | cell-index = <1>; |
| 338 | reg = <3d40 40>; | 337 | reg = <3d40 40>; |
| 339 | interrupts = <2 10 0>; | 338 | interrupts = <2 10 0>; |
| 340 | interrupt-parent = <500>; | 339 | interrupt-parent = <&mpc5200_pic>; |
| 341 | fsl5200-clocking; | 340 | fsl5200-clocking; |
| 342 | }; | 341 | }; |
| 343 | sram@8000 { | 342 | sram@8000 { |