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Diffstat (limited to 'arch/powerpc/boot/dts/lite5200b.dts')
-rw-r--r--arch/powerpc/boot/dts/lite5200b.dts119
1 files changed, 58 insertions, 61 deletions
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index f242531f0451..a6bb1d0558ef 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -19,7 +19,7 @@
19/ { 19/ {
20 model = "fsl,lite5200b"; 20 model = "fsl,lite5200b";
21 // revision = "1.0"; 21 // revision = "1.0";
22 compatible = "fsl,lite5200b\0generic-mpc5200"; 22 compatible = "fsl,lite5200b","generic-mpc5200";
23 #address-cells = <1>; 23 #address-cells = <1>;
24 #size-cells = <1>; 24 #size-cells = <1>;
25 25
@@ -37,7 +37,6 @@
37 timebase-frequency = <0>; // from bootloader 37 timebase-frequency = <0>; // from bootloader
38 bus-frequency = <0>; // from bootloader 38 bus-frequency = <0>; // from bootloader
39 clock-frequency = <0>; // from bootloader 39 clock-frequency = <0>; // from bootloader
40 32-bit;
41 }; 40 };
42 }; 41 };
43 42
@@ -50,15 +49,14 @@
50 model = "fsl,mpc5200b"; 49 model = "fsl,mpc5200b";
51 compatible = "mpc5200"; 50 compatible = "mpc5200";
52 revision = ""; // from bootloader 51 revision = ""; // from bootloader
53 #interrupt-cells = <3>;
54 device_type = "soc"; 52 device_type = "soc";
55 ranges = <0 f0000000 f0010000>; 53 ranges = <0 f0000000 0000c000>;
56 reg = <f0000000 00010000>; 54 reg = <f0000000 00000100>;
57 bus-frequency = <0>; // from bootloader 55 bus-frequency = <0>; // from bootloader
58 system-frequency = <0>; // from bootloader 56 system-frequency = <0>; // from bootloader
59 57
60 cdm@200 { 58 cdm@200 {
61 compatible = "mpc5200b-cdm\0mpc5200-cdm"; 59 compatible = "mpc5200b-cdm","mpc5200-cdm";
62 reg = <200 38>; 60 reg = <200 38>;
63 }; 61 };
64 62
@@ -67,13 +65,12 @@
67 interrupt-controller; 65 interrupt-controller;
68 #interrupt-cells = <3>; 66 #interrupt-cells = <3>;
69 device_type = "interrupt-controller"; 67 device_type = "interrupt-controller";
70 compatible = "mpc5200b-pic\0mpc5200-pic"; 68 compatible = "mpc5200b-pic","mpc5200-pic";
71 reg = <500 80>; 69 reg = <500 80>;
72 built-in;
73 }; 70 };
74 71
75 gpt@600 { // General Purpose Timer 72 gpt@600 { // General Purpose Timer
76 compatible = "mpc5200b-gpt\0mpc5200-gpt"; 73 compatible = "mpc5200b-gpt","mpc5200-gpt";
77 device_type = "gpt"; 74 device_type = "gpt";
78 cell-index = <0>; 75 cell-index = <0>;
79 reg = <600 10>; 76 reg = <600 10>;
@@ -83,7 +80,7 @@
83 }; 80 };
84 81
85 gpt@610 { // General Purpose Timer 82 gpt@610 { // General Purpose Timer
86 compatible = "mpc5200b-gpt\0mpc5200-gpt"; 83 compatible = "mpc5200b-gpt","mpc5200-gpt";
87 device_type = "gpt"; 84 device_type = "gpt";
88 cell-index = <1>; 85 cell-index = <1>;
89 reg = <610 10>; 86 reg = <610 10>;
@@ -92,7 +89,7 @@
92 }; 89 };
93 90
94 gpt@620 { // General Purpose Timer 91 gpt@620 { // General Purpose Timer
95 compatible = "mpc5200b-gpt\0mpc5200-gpt"; 92 compatible = "mpc5200b-gpt","mpc5200-gpt";
96 device_type = "gpt"; 93 device_type = "gpt";
97 cell-index = <2>; 94 cell-index = <2>;
98 reg = <620 10>; 95 reg = <620 10>;
@@ -101,7 +98,7 @@
101 }; 98 };
102 99
103 gpt@630 { // General Purpose Timer 100 gpt@630 { // General Purpose Timer
104 compatible = "mpc5200b-gpt\0mpc5200-gpt"; 101 compatible = "mpc5200b-gpt","mpc5200-gpt";
105 device_type = "gpt"; 102 device_type = "gpt";
106 cell-index = <3>; 103 cell-index = <3>;
107 reg = <630 10>; 104 reg = <630 10>;
@@ -110,7 +107,7 @@
110 }; 107 };
111 108
112 gpt@640 { // General Purpose Timer 109 gpt@640 { // General Purpose Timer
113 compatible = "mpc5200b-gpt\0mpc5200-gpt"; 110 compatible = "mpc5200b-gpt","mpc5200-gpt";
114 device_type = "gpt"; 111 device_type = "gpt";
115 cell-index = <4>; 112 cell-index = <4>;
116 reg = <640 10>; 113 reg = <640 10>;
@@ -119,7 +116,7 @@
119 }; 116 };
120 117
121 gpt@650 { // General Purpose Timer 118 gpt@650 { // General Purpose Timer
122 compatible = "mpc5200b-gpt\0mpc5200-gpt"; 119 compatible = "mpc5200b-gpt","mpc5200-gpt";
123 device_type = "gpt"; 120 device_type = "gpt";
124 cell-index = <5>; 121 cell-index = <5>;
125 reg = <650 10>; 122 reg = <650 10>;
@@ -128,7 +125,7 @@
128 }; 125 };
129 126
130 gpt@660 { // General Purpose Timer 127 gpt@660 { // General Purpose Timer
131 compatible = "mpc5200b-gpt\0mpc5200-gpt"; 128 compatible = "mpc5200b-gpt","mpc5200-gpt";
132 device_type = "gpt"; 129 device_type = "gpt";
133 cell-index = <6>; 130 cell-index = <6>;
134 reg = <660 10>; 131 reg = <660 10>;
@@ -137,7 +134,7 @@
137 }; 134 };
138 135
139 gpt@670 { // General Purpose Timer 136 gpt@670 { // General Purpose Timer
140 compatible = "mpc5200b-gpt\0mpc5200-gpt"; 137 compatible = "mpc5200b-gpt","mpc5200-gpt";
141 device_type = "gpt"; 138 device_type = "gpt";
142 cell-index = <7>; 139 cell-index = <7>;
143 reg = <670 10>; 140 reg = <670 10>;
@@ -146,7 +143,7 @@
146 }; 143 };
147 144
148 rtc@800 { // Real time clock 145 rtc@800 { // Real time clock
149 compatible = "mpc5200b-rtc\0mpc5200-rtc"; 146 compatible = "mpc5200b-rtc","mpc5200-rtc";
150 device_type = "rtc"; 147 device_type = "rtc";
151 reg = <800 100>; 148 reg = <800 100>;
152 interrupts = <1 5 0 1 6 0>; 149 interrupts = <1 5 0 1 6 0>;
@@ -155,7 +152,7 @@
155 152
156 mscan@900 { 153 mscan@900 {
157 device_type = "mscan"; 154 device_type = "mscan";
158 compatible = "mpc5200b-mscan\0mpc5200-mscan"; 155 compatible = "mpc5200b-mscan","mpc5200-mscan";
159 cell-index = <0>; 156 cell-index = <0>;
160 interrupts = <2 11 0>; 157 interrupts = <2 11 0>;
161 interrupt-parent = <&mpc5200_pic>; 158 interrupt-parent = <&mpc5200_pic>;
@@ -164,7 +161,7 @@
164 161
165 mscan@980 { 162 mscan@980 {
166 device_type = "mscan"; 163 device_type = "mscan";
167 compatible = "mpc5200b-mscan\0mpc5200-mscan"; 164 compatible = "mpc5200b-mscan","mpc5200-mscan";
168 cell-index = <1>; 165 cell-index = <1>;
169 interrupts = <2 12 0>; 166 interrupts = <2 12 0>;
170 interrupt-parent = <&mpc5200_pic>; 167 interrupt-parent = <&mpc5200_pic>;
@@ -172,48 +169,22 @@
172 }; 169 };
173 170
174 gpio@b00 { 171 gpio@b00 {
175 compatible = "mpc5200b-gpio\0mpc5200-gpio"; 172 compatible = "mpc5200b-gpio","mpc5200-gpio";
176 reg = <b00 40>; 173 reg = <b00 40>;
177 interrupts = <1 7 0>; 174 interrupts = <1 7 0>;
178 interrupt-parent = <&mpc5200_pic>; 175 interrupt-parent = <&mpc5200_pic>;
179 }; 176 };
180 177
181 gpio-wkup@c00 { 178 gpio-wkup@c00 {
182 compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup"; 179 compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup";
183 reg = <c00 40>; 180 reg = <c00 40>;
184 interrupts = <1 8 0 0 3 0>; 181 interrupts = <1 8 0 0 3 0>;
185 interrupt-parent = <&mpc5200_pic>; 182 interrupt-parent = <&mpc5200_pic>;
186 }; 183 };
187 184
188 pci@0d00 {
189 #interrupt-cells = <1>;
190 #size-cells = <2>;
191 #address-cells = <3>;
192 device_type = "pci";
193 compatible = "mpc5200b-pci\0mpc5200-pci";
194 reg = <d00 100>;
195 interrupt-map-mask = <f800 0 0 7>;
196 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
197 c000 0 0 2 &mpc5200_pic 1 1 3
198 c000 0 0 3 &mpc5200_pic 1 2 3
199 c000 0 0 4 &mpc5200_pic 1 3 3
200
201 c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
202 c800 0 0 2 &mpc5200_pic 1 2 3
203 c800 0 0 3 &mpc5200_pic 1 3 3
204 c800 0 0 4 &mpc5200_pic 0 0 3>;
205 clock-frequency = <0>; // From boot loader
206 interrupts = <2 8 0 2 9 0 2 a 0>;
207 interrupt-parent = <&mpc5200_pic>;
208 bus-range = <0 0>;
209 ranges = <42000000 0 80000000 80000000 0 20000000
210 02000000 0 a0000000 a0000000 0 10000000
211 01000000 0 00000000 b0000000 0 01000000>;
212 };
213
214 spi@f00 { 185 spi@f00 {
215 device_type = "spi"; 186 device_type = "spi";
216 compatible = "mpc5200b-spi\0mpc5200-spi"; 187 compatible = "mpc5200b-spi","mpc5200-spi";
217 reg = <f00 20>; 188 reg = <f00 20>;
218 interrupts = <2 d 0 2 e 0>; 189 interrupts = <2 d 0 2 e 0>;
219 interrupt-parent = <&mpc5200_pic>; 190 interrupt-parent = <&mpc5200_pic>;
@@ -221,7 +192,7 @@
221 192
222 usb@1000 { 193 usb@1000 {
223 device_type = "usb-ohci-be"; 194 device_type = "usb-ohci-be";
224 compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be"; 195 compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be";
225 reg = <1000 ff>; 196 reg = <1000 ff>;
226 interrupts = <2 6 0>; 197 interrupts = <2 6 0>;
227 interrupt-parent = <&mpc5200_pic>; 198 interrupt-parent = <&mpc5200_pic>;
@@ -229,7 +200,7 @@
229 200
230 bestcomm@1200 { 201 bestcomm@1200 {
231 device_type = "dma-controller"; 202 device_type = "dma-controller";
232 compatible = "mpc5200b-bestcomm\0mpc5200-bestcomm"; 203 compatible = "mpc5200b-bestcomm","mpc5200-bestcomm";
233 reg = <1200 80>; 204 reg = <1200 80>;
234 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 205 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
235 3 4 0 3 5 0 3 6 0 3 7 0 206 3 4 0 3 5 0 3 6 0 3 7 0
@@ -239,13 +210,13 @@
239 }; 210 };
240 211
241 xlb@1f00 { 212 xlb@1f00 {
242 compatible = "mpc5200b-xlb\0mpc5200-xlb"; 213 compatible = "mpc5200b-xlb","mpc5200-xlb";
243 reg = <1f00 100>; 214 reg = <1f00 100>;
244 }; 215 };
245 216
246 serial@2000 { // PSC1 217 serial@2000 { // PSC1
247 device_type = "serial"; 218 device_type = "serial";
248 compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart"; 219 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
249 port-number = <0>; // Logical port assignment 220 port-number = <0>; // Logical port assignment
250 cell-index = <0>; 221 cell-index = <0>;
251 reg = <2000 100>; 222 reg = <2000 100>;
@@ -256,7 +227,7 @@
256 // PSC2 in ac97 mode example 227 // PSC2 in ac97 mode example
257 //ac97@2200 { // PSC2 228 //ac97@2200 { // PSC2
258 // device_type = "sound"; 229 // device_type = "sound";
259 // compatible = "mpc5200b-psc-ac97\0mpc5200-psc-ac97"; 230 // compatible = "mpc5200b-psc-ac97","mpc5200-psc-ac97";
260 // cell-index = <1>; 231 // cell-index = <1>;
261 // reg = <2200 100>; 232 // reg = <2200 100>;
262 // interrupts = <2 2 0>; 233 // interrupts = <2 2 0>;
@@ -276,7 +247,7 @@
276 // PSC4 in uart mode example 247 // PSC4 in uart mode example
277 //serial@2600 { // PSC4 248 //serial@2600 { // PSC4
278 // device_type = "serial"; 249 // device_type = "serial";
279 // compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart"; 250 // compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
280 // cell-index = <3>; 251 // cell-index = <3>;
281 // reg = <2600 100>; 252 // reg = <2600 100>;
282 // interrupts = <2 b 0>; 253 // interrupts = <2 b 0>;
@@ -286,7 +257,7 @@
286 // PSC5 in uart mode example 257 // PSC5 in uart mode example
287 //serial@2800 { // PSC5 258 //serial@2800 { // PSC5
288 // device_type = "serial"; 259 // device_type = "serial";
289 // compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart"; 260 // compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
290 // cell-index = <4>; 261 // cell-index = <4>;
291 // reg = <2800 100>; 262 // reg = <2800 100>;
292 // interrupts = <2 c 0>; 263 // interrupts = <2 c 0>;
@@ -296,7 +267,7 @@
296 // PSC6 in spi mode example 267 // PSC6 in spi mode example
297 //spi@2c00 { // PSC6 268 //spi@2c00 { // PSC6
298 // device_type = "spi"; 269 // device_type = "spi";
299 // compatible = "mpc5200b-psc-spi\0mpc5200-psc-spi"; 270 // compatible = "mpc5200b-psc-spi","mpc5200-psc-spi";
300 // cell-index = <5>; 271 // cell-index = <5>;
301 // reg = <2c00 100>; 272 // reg = <2c00 100>;
302 // interrupts = <2 4 0>; 273 // interrupts = <2 4 0>;
@@ -305,7 +276,7 @@
305 276
306 ethernet@3000 { 277 ethernet@3000 {
307 device_type = "network"; 278 device_type = "network";
308 compatible = "mpc5200b-fec\0mpc5200-fec"; 279 compatible = "mpc5200b-fec","mpc5200-fec";
309 reg = <3000 800>; 280 reg = <3000 800>;
310 mac-address = [ 02 03 04 05 06 07 ]; // Bad! 281 mac-address = [ 02 03 04 05 06 07 ]; // Bad!
311 interrupts = <2 5 0>; 282 interrupts = <2 5 0>;
@@ -314,7 +285,7 @@
314 285
315 ata@3a00 { 286 ata@3a00 {
316 device_type = "ata"; 287 device_type = "ata";
317 compatible = "mpc5200b-ata\0mpc5200-ata"; 288 compatible = "mpc5200b-ata","mpc5200-ata";
318 reg = <3a00 100>; 289 reg = <3a00 100>;
319 interrupts = <2 7 0>; 290 interrupts = <2 7 0>;
320 interrupt-parent = <&mpc5200_pic>; 291 interrupt-parent = <&mpc5200_pic>;
@@ -322,7 +293,7 @@
322 293
323 i2c@3d00 { 294 i2c@3d00 {
324 device_type = "i2c"; 295 device_type = "i2c";
325 compatible = "mpc5200b-i2c\0mpc5200-i2c\0fsl-i2c"; 296 compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c";
326 cell-index = <0>; 297 cell-index = <0>;
327 reg = <3d00 40>; 298 reg = <3d00 40>;
328 interrupts = <2 f 0>; 299 interrupts = <2 f 0>;
@@ -332,7 +303,7 @@
332 303
333 i2c@3d40 { 304 i2c@3d40 {
334 device_type = "i2c"; 305 device_type = "i2c";
335 compatible = "mpc5200b-i2c\0mpc5200-i2c\0fsl-i2c"; 306 compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c";
336 cell-index = <1>; 307 cell-index = <1>;
337 reg = <3d40 40>; 308 reg = <3d40 40>;
338 interrupts = <2 10 0>; 309 interrupts = <2 10 0>;
@@ -341,8 +312,34 @@
341 }; 312 };
342 sram@8000 { 313 sram@8000 {
343 device_type = "sram"; 314 device_type = "sram";
344 compatible = "mpc5200b-sram\0mpc5200-sram\0sram"; 315 compatible = "mpc5200b-sram","mpc5200-sram","sram";
345 reg = <8000 4000>; 316 reg = <8000 4000>;
346 }; 317 };
347 }; 318 };
319
320 pci@f0000d00 {
321 #interrupt-cells = <1>;
322 #size-cells = <2>;
323 #address-cells = <3>;
324 device_type = "pci";
325 compatible = "mpc5200b-pci","mpc5200-pci";
326 reg = <f0000d00 100>;
327 interrupt-map-mask = <f800 0 0 7>;
328 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
329 c000 0 0 2 &mpc5200_pic 1 1 3
330 c000 0 0 3 &mpc5200_pic 1 2 3
331 c000 0 0 4 &mpc5200_pic 1 3 3
332
333 c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
334 c800 0 0 2 &mpc5200_pic 1 2 3
335 c800 0 0 3 &mpc5200_pic 1 3 3
336 c800 0 0 4 &mpc5200_pic 0 0 3>;
337 clock-frequency = <0>; // From boot loader
338 interrupts = <2 8 0 2 9 0 2 a 0>;
339 interrupt-parent = <&mpc5200_pic>;
340 bus-range = <0 0>;
341 ranges = <42000000 0 80000000 80000000 0 20000000
342 02000000 0 a0000000 a0000000 0 10000000
343 01000000 0 00000000 b0000000 0 01000000>;
344 };
348}; 345};
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-01 17:35:32 -0400