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-rw-r--r--arch/powerpc/boot/dts/lite5200.dts94
1 files changed, 38 insertions, 56 deletions
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index 7de3d2133d7c..0d701c1bf539 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -10,15 +10,8 @@
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13/*
14 * WARNING: Do not depend on this tree layout remaining static just yet.
15 * The MPC5200 device tree conventions are still in flux
16 * Keep an eye on the linuxppc-dev mailing list for more details
17 */
18
19/ { 13/ {
20 model = "fsl,lite5200"; 14 model = "fsl,lite5200";
21 // revision = "1.0";
22 compatible = "fsl,lite5200"; 15 compatible = "fsl,lite5200";
23 #address-cells = <1>; 16 #address-cells = <1>;
24 #size-cells = <1>; 17 #size-cells = <1>;
@@ -48,30 +41,27 @@
48 soc5200@f0000000 { 41 soc5200@f0000000 {
49 #address-cells = <1>; 42 #address-cells = <1>;
50 #size-cells = <1>; 43 #size-cells = <1>;
51 model = "fsl,mpc5200"; 44 compatible = "fsl,mpc5200-immr";
52 compatible = "mpc5200";
53 revision = ""; // from bootloader
54 device_type = "soc";
55 ranges = <0 f0000000 0000c000>; 45 ranges = <0 f0000000 0000c000>;
56 reg = <f0000000 00000100>; 46 reg = <f0000000 00000100>;
57 bus-frequency = <0>; // from bootloader 47 bus-frequency = <0>; // from bootloader
58 system-frequency = <0>; // from bootloader 48 system-frequency = <0>; // from bootloader
59 49
60 cdm@200 { 50 cdm@200 {
61 compatible = "mpc5200-cdm"; 51 compatible = "fsl,mpc5200-cdm";
62 reg = <200 38>; 52 reg = <200 38>;
63 }; 53 };
64 54
65 mpc5200_pic: pic@500 { 55 mpc5200_pic: interrupt-controller@500 {
66 // 5200 interrupts are encoded into two levels; 56 // 5200 interrupts are encoded into two levels;
67 interrupt-controller; 57 interrupt-controller;
68 #interrupt-cells = <3>; 58 #interrupt-cells = <3>;
69 device_type = "interrupt-controller"; 59 device_type = "interrupt-controller";
70 compatible = "mpc5200-pic"; 60 compatible = "fsl,mpc5200-pic";
71 reg = <500 80>; 61 reg = <500 80>;
72 }; 62 };
73 63
74 gpt@600 { // General Purpose Timer 64 timer@600 { // General Purpose Timer
75 compatible = "fsl,mpc5200-gpt"; 65 compatible = "fsl,mpc5200-gpt";
76 cell-index = <0>; 66 cell-index = <0>;
77 reg = <600 10>; 67 reg = <600 10>;
@@ -80,7 +70,7 @@
80 fsl,has-wdt; 70 fsl,has-wdt;
81 }; 71 };
82 72
83 gpt@610 { // General Purpose Timer 73 timer@610 { // General Purpose Timer
84 compatible = "fsl,mpc5200-gpt"; 74 compatible = "fsl,mpc5200-gpt";
85 cell-index = <1>; 75 cell-index = <1>;
86 reg = <610 10>; 76 reg = <610 10>;
@@ -88,7 +78,7 @@
88 interrupt-parent = <&mpc5200_pic>; 78 interrupt-parent = <&mpc5200_pic>;
89 }; 79 };
90 80
91 gpt@620 { // General Purpose Timer 81 timer@620 { // General Purpose Timer
92 compatible = "fsl,mpc5200-gpt"; 82 compatible = "fsl,mpc5200-gpt";
93 cell-index = <2>; 83 cell-index = <2>;
94 reg = <620 10>; 84 reg = <620 10>;
@@ -96,7 +86,7 @@
96 interrupt-parent = <&mpc5200_pic>; 86 interrupt-parent = <&mpc5200_pic>;
97 }; 87 };
98 88
99 gpt@630 { // General Purpose Timer 89 timer@630 { // General Purpose Timer
100 compatible = "fsl,mpc5200-gpt"; 90 compatible = "fsl,mpc5200-gpt";
101 cell-index = <3>; 91 cell-index = <3>;
102 reg = <630 10>; 92 reg = <630 10>;
@@ -104,7 +94,7 @@
104 interrupt-parent = <&mpc5200_pic>; 94 interrupt-parent = <&mpc5200_pic>;
105 }; 95 };
106 96
107 gpt@640 { // General Purpose Timer 97 timer@640 { // General Purpose Timer
108 compatible = "fsl,mpc5200-gpt"; 98 compatible = "fsl,mpc5200-gpt";
109 cell-index = <4>; 99 cell-index = <4>;
110 reg = <640 10>; 100 reg = <640 10>;
@@ -112,7 +102,7 @@
112 interrupt-parent = <&mpc5200_pic>; 102 interrupt-parent = <&mpc5200_pic>;
113 }; 103 };
114 104
115 gpt@650 { // General Purpose Timer 105 timer@650 { // General Purpose Timer
116 compatible = "fsl,mpc5200-gpt"; 106 compatible = "fsl,mpc5200-gpt";
117 cell-index = <5>; 107 cell-index = <5>;
118 reg = <650 10>; 108 reg = <650 10>;
@@ -120,7 +110,7 @@
120 interrupt-parent = <&mpc5200_pic>; 110 interrupt-parent = <&mpc5200_pic>;
121 }; 111 };
122 112
123 gpt@660 { // General Purpose Timer 113 timer@660 { // General Purpose Timer
124 compatible = "fsl,mpc5200-gpt"; 114 compatible = "fsl,mpc5200-gpt";
125 cell-index = <6>; 115 cell-index = <6>;
126 reg = <660 10>; 116 reg = <660 10>;
@@ -128,7 +118,7 @@
128 interrupt-parent = <&mpc5200_pic>; 118 interrupt-parent = <&mpc5200_pic>;
129 }; 119 };
130 120
131 gpt@670 { // General Purpose Timer 121 timer@670 { // General Purpose Timer
132 compatible = "fsl,mpc5200-gpt"; 122 compatible = "fsl,mpc5200-gpt";
133 cell-index = <7>; 123 cell-index = <7>;
134 reg = <670 10>; 124 reg = <670 10>;
@@ -137,25 +127,23 @@
137 }; 127 };
138 128
139 rtc@800 { // Real time clock 129 rtc@800 { // Real time clock
140 compatible = "mpc5200-rtc"; 130 compatible = "fsl,mpc5200-rtc";
141 device_type = "rtc"; 131 device_type = "rtc";
142 reg = <800 100>; 132 reg = <800 100>;
143 interrupts = <1 5 0 1 6 0>; 133 interrupts = <1 5 0 1 6 0>;
144 interrupt-parent = <&mpc5200_pic>; 134 interrupt-parent = <&mpc5200_pic>;
145 }; 135 };
146 136
147 mscan@900 { 137 can@900 {
148 device_type = "mscan"; 138 compatible = "fsl,mpc5200-mscan";
149 compatible = "mpc5200-mscan";
150 cell-index = <0>; 139 cell-index = <0>;
151 interrupts = <2 11 0>; 140 interrupts = <2 11 0>;
152 interrupt-parent = <&mpc5200_pic>; 141 interrupt-parent = <&mpc5200_pic>;
153 reg = <900 80>; 142 reg = <900 80>;
154 }; 143 };
155 144
156 mscan@980 { 145 can@980 {
157 device_type = "mscan"; 146 compatible = "fsl,mpc5200-mscan";
158 compatible = "mpc5200-mscan";
159 cell-index = <1>; 147 cell-index = <1>;
160 interrupts = <2 12 0>; 148 interrupts = <2 12 0>;
161 interrupt-parent = <&mpc5200_pic>; 149 interrupt-parent = <&mpc5200_pic>;
@@ -163,38 +151,36 @@
163 }; 151 };
164 152
165 gpio@b00 { 153 gpio@b00 {
166 compatible = "mpc5200-gpio"; 154 compatible = "fsl,mpc5200-gpio";
167 reg = <b00 40>; 155 reg = <b00 40>;
168 interrupts = <1 7 0>; 156 interrupts = <1 7 0>;
169 interrupt-parent = <&mpc5200_pic>; 157 interrupt-parent = <&mpc5200_pic>;
170 }; 158 };
171 159
172 gpio-wkup@c00 { 160 gpio@c00 {
173 compatible = "mpc5200-gpio-wkup"; 161 compatible = "fsl,mpc5200-gpio-wkup";
174 reg = <c00 40>; 162 reg = <c00 40>;
175 interrupts = <1 8 0 0 3 0>; 163 interrupts = <1 8 0 0 3 0>;
176 interrupt-parent = <&mpc5200_pic>; 164 interrupt-parent = <&mpc5200_pic>;
177 }; 165 };
178 166
179 spi@f00 { 167 spi@f00 {
180 device_type = "spi"; 168 compatible = "fsl,mpc5200-spi";
181 compatible = "mpc5200-spi";
182 reg = <f00 20>; 169 reg = <f00 20>;
183 interrupts = <2 d 0 2 e 0>; 170 interrupts = <2 d 0 2 e 0>;
184 interrupt-parent = <&mpc5200_pic>; 171 interrupt-parent = <&mpc5200_pic>;
185 }; 172 };
186 173
187 usb@1000 { 174 usb@1000 {
188 device_type = "usb-ohci-be"; 175 compatible = "fsl,mpc5200-ohci","ohci-be";
189 compatible = "mpc5200-ohci","ohci-be";
190 reg = <1000 ff>; 176 reg = <1000 ff>;
191 interrupts = <2 6 0>; 177 interrupts = <2 6 0>;
192 interrupt-parent = <&mpc5200_pic>; 178 interrupt-parent = <&mpc5200_pic>;
193 }; 179 };
194 180
195 bestcomm@1200 { 181 dma-controller@1200 {
196 device_type = "dma-controller"; 182 device_type = "dma-controller";
197 compatible = "mpc5200-bestcomm"; 183 compatible = "fsl,mpc5200-bestcomm";
198 reg = <1200 80>; 184 reg = <1200 80>;
199 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 185 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
200 3 4 0 3 5 0 3 6 0 3 7 0 186 3 4 0 3 5 0 3 6 0 3 7 0
@@ -204,13 +190,13 @@
204 }; 190 };
205 191
206 xlb@1f00 { 192 xlb@1f00 {
207 compatible = "mpc5200-xlb"; 193 compatible = "fsl,mpc5200-xlb";
208 reg = <1f00 100>; 194 reg = <1f00 100>;
209 }; 195 };
210 196
211 serial@2000 { // PSC1 197 serial@2000 { // PSC1
212 device_type = "serial"; 198 device_type = "serial";
213 compatible = "mpc5200-psc-uart"; 199 compatible = "fsl,mpc5200-psc-uart";
214 port-number = <0>; // Logical port assignment 200 port-number = <0>; // Logical port assignment
215 cell-index = <0>; 201 cell-index = <0>;
216 reg = <2000 100>; 202 reg = <2000 100>;
@@ -220,8 +206,7 @@
220 206
221 // PSC2 in ac97 mode example 207 // PSC2 in ac97 mode example
222 //ac97@2200 { // PSC2 208 //ac97@2200 { // PSC2
223 // device_type = "sound"; 209 // compatible = "fsl,mpc5200-psc-ac97";
224 // compatible = "mpc5200-psc-ac97";
225 // cell-index = <1>; 210 // cell-index = <1>;
226 // reg = <2200 100>; 211 // reg = <2200 100>;
227 // interrupts = <2 2 0>; 212 // interrupts = <2 2 0>;
@@ -230,8 +215,7 @@
230 215
231 // PSC3 in CODEC mode example 216 // PSC3 in CODEC mode example
232 //i2s@2400 { // PSC3 217 //i2s@2400 { // PSC3
233 // device_type = "sound"; 218 // compatible = "fsl,mpc5200-psc-i2s";
234 // compatible = "mpc5200-psc-i2s";
235 // cell-index = <2>; 219 // cell-index = <2>;
236 // reg = <2400 100>; 220 // reg = <2400 100>;
237 // interrupts = <2 3 0>; 221 // interrupts = <2 3 0>;
@@ -241,7 +225,7 @@
241 // PSC4 in uart mode example 225 // PSC4 in uart mode example
242 //serial@2600 { // PSC4 226 //serial@2600 { // PSC4
243 // device_type = "serial"; 227 // device_type = "serial";
244 // compatible = "mpc5200-psc-uart"; 228 // compatible = "fsl,mpc5200-psc-uart";
245 // cell-index = <3>; 229 // cell-index = <3>;
246 // reg = <2600 100>; 230 // reg = <2600 100>;
247 // interrupts = <2 b 0>; 231 // interrupts = <2 b 0>;
@@ -251,7 +235,7 @@
251 // PSC5 in uart mode example 235 // PSC5 in uart mode example
252 //serial@2800 { // PSC5 236 //serial@2800 { // PSC5
253 // device_type = "serial"; 237 // device_type = "serial";
254 // compatible = "mpc5200-psc-uart"; 238 // compatible = "fsl,mpc5200-psc-uart";
255 // cell-index = <4>; 239 // cell-index = <4>;
256 // reg = <2800 100>; 240 // reg = <2800 100>;
257 // interrupts = <2 c 0>; 241 // interrupts = <2 c 0>;
@@ -260,8 +244,7 @@
260 244
261 // PSC6 in spi mode example 245 // PSC6 in spi mode example
262 //spi@2c00 { // PSC6 246 //spi@2c00 { // PSC6
263 // device_type = "spi"; 247 // compatible = "fsl,mpc5200-psc-spi";
264 // compatible = "mpc5200-psc-spi";
265 // cell-index = <5>; 248 // cell-index = <5>;
266 // reg = <2c00 100>; 249 // reg = <2c00 100>;
267 // interrupts = <2 4 0>; 250 // interrupts = <2 4 0>;
@@ -270,16 +253,16 @@
270 253
271 ethernet@3000 { 254 ethernet@3000 {
272 device_type = "network"; 255 device_type = "network";
273 compatible = "mpc5200-fec"; 256 compatible = "fsl,mpc5200-fec";
274 reg = <3000 800>; 257 reg = <3000 800>;
275 mac-address = [ 02 03 04 05 06 07 ]; // Bad! 258 local-mac-address = [ 00 00 00 00 00 00 ];
276 interrupts = <2 5 0>; 259 interrupts = <2 5 0>;
277 interrupt-parent = <&mpc5200_pic>; 260 interrupt-parent = <&mpc5200_pic>;
278 }; 261 };
279 262
280 ata@3a00 { 263 ata@3a00 {
281 device_type = "ata"; 264 device_type = "ata";
282 compatible = "mpc5200-ata"; 265 compatible = "fsl,mpc5200-ata";
283 reg = <3a00 100>; 266 reg = <3a00 100>;
284 interrupts = <2 7 0>; 267 interrupts = <2 7 0>;
285 interrupt-parent = <&mpc5200_pic>; 268 interrupt-parent = <&mpc5200_pic>;
@@ -288,7 +271,7 @@
288 i2c@3d00 { 271 i2c@3d00 {
289 #address-cells = <1>; 272 #address-cells = <1>;
290 #size-cells = <0>; 273 #size-cells = <0>;
291 compatible = "mpc5200-i2c","fsl-i2c"; 274 compatible = "fsl,mpc5200-i2c","fsl-i2c";
292 cell-index = <0>; 275 cell-index = <0>;
293 reg = <3d00 40>; 276 reg = <3d00 40>;
294 interrupts = <2 f 0>; 277 interrupts = <2 f 0>;
@@ -299,7 +282,7 @@
299 i2c@3d40 { 282 i2c@3d40 {
300 #address-cells = <1>; 283 #address-cells = <1>;
301 #size-cells = <0>; 284 #size-cells = <0>;
302 compatible = "mpc5200-i2c","fsl-i2c"; 285 compatible = "fsl,mpc5200-i2c","fsl-i2c";
303 cell-index = <1>; 286 cell-index = <1>;
304 reg = <3d40 40>; 287 reg = <3d40 40>;
305 interrupts = <2 10 0>; 288 interrupts = <2 10 0>;
@@ -307,8 +290,7 @@
307 fsl5200-clocking; 290 fsl5200-clocking;
308 }; 291 };
309 sram@8000 { 292 sram@8000 {
310 device_type = "sram"; 293 compatible = "fsl,mpc5200-sram","sram";
311 compatible = "mpc5200-sram","sram";
312 reg = <8000 4000>; 294 reg = <8000 4000>;
313 }; 295 };
314 }; 296 };
@@ -318,7 +300,7 @@
318 #size-cells = <2>; 300 #size-cells = <2>;
319 #address-cells = <3>; 301 #address-cells = <3>;
320 device_type = "pci"; 302 device_type = "pci";
321 compatible = "mpc5200-pci"; 303 compatible = "fsl,mpc5200-pci";
322 reg = <f0000d00 100>; 304 reg = <f0000d00 100>;
323 interrupt-map-mask = <f800 0 0 7>; 305 interrupt-map-mask = <f800 0 0 7>;
324 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 306 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-13 10:48:55 -0500