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-rw-r--r--arch/powerpc/boot/dts/lite5200.dts96
1 files changed, 40 insertions, 56 deletions
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index e1d6f441532f..0d701c1bf539 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -10,15 +10,8 @@
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13/*
14 * WARNING: Do not depend on this tree layout remaining static just yet.
15 * The MPC5200 device tree conventions are still in flux
16 * Keep an eye on the linuxppc-dev mailing list for more details
17 */
18
19/ { 13/ {
20 model = "fsl,lite5200"; 14 model = "fsl,lite5200";
21 // revision = "1.0";
22 compatible = "fsl,lite5200"; 15 compatible = "fsl,lite5200";
23 #address-cells = <1>; 16 #address-cells = <1>;
24 #size-cells = <1>; 17 #size-cells = <1>;
@@ -46,30 +39,29 @@
46 }; 39 };
47 40
48 soc5200@f0000000 { 41 soc5200@f0000000 {
49 model = "fsl,mpc5200"; 42 #address-cells = <1>;
50 compatible = "mpc5200"; 43 #size-cells = <1>;
51 revision = ""; // from bootloader 44 compatible = "fsl,mpc5200-immr";
52 device_type = "soc";
53 ranges = <0 f0000000 0000c000>; 45 ranges = <0 f0000000 0000c000>;
54 reg = <f0000000 00000100>; 46 reg = <f0000000 00000100>;
55 bus-frequency = <0>; // from bootloader 47 bus-frequency = <0>; // from bootloader
56 system-frequency = <0>; // from bootloader 48 system-frequency = <0>; // from bootloader
57 49
58 cdm@200 { 50 cdm@200 {
59 compatible = "mpc5200-cdm"; 51 compatible = "fsl,mpc5200-cdm";
60 reg = <200 38>; 52 reg = <200 38>;
61 }; 53 };
62 54
63 mpc5200_pic: pic@500 { 55 mpc5200_pic: interrupt-controller@500 {
64 // 5200 interrupts are encoded into two levels; 56 // 5200 interrupts are encoded into two levels;
65 interrupt-controller; 57 interrupt-controller;
66 #interrupt-cells = <3>; 58 #interrupt-cells = <3>;
67 device_type = "interrupt-controller"; 59 device_type = "interrupt-controller";
68 compatible = "mpc5200-pic"; 60 compatible = "fsl,mpc5200-pic";
69 reg = <500 80>; 61 reg = <500 80>;
70 }; 62 };
71 63
72 gpt@600 { // General Purpose Timer 64 timer@600 { // General Purpose Timer
73 compatible = "fsl,mpc5200-gpt"; 65 compatible = "fsl,mpc5200-gpt";
74 cell-index = <0>; 66 cell-index = <0>;
75 reg = <600 10>; 67 reg = <600 10>;
@@ -78,7 +70,7 @@
78 fsl,has-wdt; 70 fsl,has-wdt;
79 }; 71 };
80 72
81 gpt@610 { // General Purpose Timer 73 timer@610 { // General Purpose Timer
82 compatible = "fsl,mpc5200-gpt"; 74 compatible = "fsl,mpc5200-gpt";
83 cell-index = <1>; 75 cell-index = <1>;
84 reg = <610 10>; 76 reg = <610 10>;
@@ -86,7 +78,7 @@
86 interrupt-parent = <&mpc5200_pic>; 78 interrupt-parent = <&mpc5200_pic>;
87 }; 79 };
88 80
89 gpt@620 { // General Purpose Timer 81 timer@620 { // General Purpose Timer
90 compatible = "fsl,mpc5200-gpt"; 82 compatible = "fsl,mpc5200-gpt";
91 cell-index = <2>; 83 cell-index = <2>;
92 reg = <620 10>; 84 reg = <620 10>;
@@ -94,7 +86,7 @@
94 interrupt-parent = <&mpc5200_pic>; 86 interrupt-parent = <&mpc5200_pic>;
95 }; 87 };
96 88
97 gpt@630 { // General Purpose Timer 89 timer@630 { // General Purpose Timer
98 compatible = "fsl,mpc5200-gpt"; 90 compatible = "fsl,mpc5200-gpt";
99 cell-index = <3>; 91 cell-index = <3>;
100 reg = <630 10>; 92 reg = <630 10>;
@@ -102,7 +94,7 @@
102 interrupt-parent = <&mpc5200_pic>; 94 interrupt-parent = <&mpc5200_pic>;
103 }; 95 };
104 96
105 gpt@640 { // General Purpose Timer 97 timer@640 { // General Purpose Timer
106 compatible = "fsl,mpc5200-gpt"; 98 compatible = "fsl,mpc5200-gpt";
107 cell-index = <4>; 99 cell-index = <4>;
108 reg = <640 10>; 100 reg = <640 10>;
@@ -110,7 +102,7 @@
110 interrupt-parent = <&mpc5200_pic>; 102 interrupt-parent = <&mpc5200_pic>;
111 }; 103 };
112 104
113 gpt@650 { // General Purpose Timer 105 timer@650 { // General Purpose Timer
114 compatible = "fsl,mpc5200-gpt"; 106 compatible = "fsl,mpc5200-gpt";
115 cell-index = <5>; 107 cell-index = <5>;
116 reg = <650 10>; 108 reg = <650 10>;
@@ -118,7 +110,7 @@
118 interrupt-parent = <&mpc5200_pic>; 110 interrupt-parent = <&mpc5200_pic>;
119 }; 111 };
120 112
121 gpt@660 { // General Purpose Timer 113 timer@660 { // General Purpose Timer
122 compatible = "fsl,mpc5200-gpt"; 114 compatible = "fsl,mpc5200-gpt";
123 cell-index = <6>; 115 cell-index = <6>;
124 reg = <660 10>; 116 reg = <660 10>;
@@ -126,7 +118,7 @@
126 interrupt-parent = <&mpc5200_pic>; 118 interrupt-parent = <&mpc5200_pic>;
127 }; 119 };
128 120
129 gpt@670 { // General Purpose Timer 121 timer@670 { // General Purpose Timer
130 compatible = "fsl,mpc5200-gpt"; 122 compatible = "fsl,mpc5200-gpt";
131 cell-index = <7>; 123 cell-index = <7>;
132 reg = <670 10>; 124 reg = <670 10>;
@@ -135,25 +127,23 @@
135 }; 127 };
136 128
137 rtc@800 { // Real time clock 129 rtc@800 { // Real time clock
138 compatible = "mpc5200-rtc"; 130 compatible = "fsl,mpc5200-rtc";
139 device_type = "rtc"; 131 device_type = "rtc";
140 reg = <800 100>; 132 reg = <800 100>;
141 interrupts = <1 5 0 1 6 0>; 133 interrupts = <1 5 0 1 6 0>;
142 interrupt-parent = <&mpc5200_pic>; 134 interrupt-parent = <&mpc5200_pic>;
143 }; 135 };
144 136
145 mscan@900 { 137 can@900 {
146 device_type = "mscan"; 138 compatible = "fsl,mpc5200-mscan";
147 compatible = "mpc5200-mscan";
148 cell-index = <0>; 139 cell-index = <0>;
149 interrupts = <2 11 0>; 140 interrupts = <2 11 0>;
150 interrupt-parent = <&mpc5200_pic>; 141 interrupt-parent = <&mpc5200_pic>;
151 reg = <900 80>; 142 reg = <900 80>;
152 }; 143 };
153 144
154 mscan@980 { 145 can@980 {
155 device_type = "mscan"; 146 compatible = "fsl,mpc5200-mscan";
156 compatible = "mpc5200-mscan";
157 cell-index = <1>; 147 cell-index = <1>;
158 interrupts = <2 12 0>; 148 interrupts = <2 12 0>;
159 interrupt-parent = <&mpc5200_pic>; 149 interrupt-parent = <&mpc5200_pic>;
@@ -161,38 +151,36 @@
161 }; 151 };
162 152
163 gpio@b00 { 153 gpio@b00 {
164 compatible = "mpc5200-gpio"; 154 compatible = "fsl,mpc5200-gpio";
165 reg = <b00 40>; 155 reg = <b00 40>;
166 interrupts = <1 7 0>; 156 interrupts = <1 7 0>;
167 interrupt-parent = <&mpc5200_pic>; 157 interrupt-parent = <&mpc5200_pic>;
168 }; 158 };
169 159
170 gpio-wkup@c00 { 160 gpio@c00 {
171 compatible = "mpc5200-gpio-wkup"; 161 compatible = "fsl,mpc5200-gpio-wkup";
172 reg = <c00 40>; 162 reg = <c00 40>;
173 interrupts = <1 8 0 0 3 0>; 163 interrupts = <1 8 0 0 3 0>;
174 interrupt-parent = <&mpc5200_pic>; 164 interrupt-parent = <&mpc5200_pic>;
175 }; 165 };
176 166
177 spi@f00 { 167 spi@f00 {
178 device_type = "spi"; 168 compatible = "fsl,mpc5200-spi";
179 compatible = "mpc5200-spi";
180 reg = <f00 20>; 169 reg = <f00 20>;
181 interrupts = <2 d 0 2 e 0>; 170 interrupts = <2 d 0 2 e 0>;
182 interrupt-parent = <&mpc5200_pic>; 171 interrupt-parent = <&mpc5200_pic>;
183 }; 172 };
184 173
185 usb@1000 { 174 usb@1000 {
186 device_type = "usb-ohci-be"; 175 compatible = "fsl,mpc5200-ohci","ohci-be";
187 compatible = "mpc5200-ohci","ohci-be";
188 reg = <1000 ff>; 176 reg = <1000 ff>;
189 interrupts = <2 6 0>; 177 interrupts = <2 6 0>;
190 interrupt-parent = <&mpc5200_pic>; 178 interrupt-parent = <&mpc5200_pic>;
191 }; 179 };
192 180
193 bestcomm@1200 { 181 dma-controller@1200 {
194 device_type = "dma-controller"; 182 device_type = "dma-controller";
195 compatible = "mpc5200-bestcomm"; 183 compatible = "fsl,mpc5200-bestcomm";
196 reg = <1200 80>; 184 reg = <1200 80>;
197 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 185 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
198 3 4 0 3 5 0 3 6 0 3 7 0 186 3 4 0 3 5 0 3 6 0 3 7 0
@@ -202,13 +190,13 @@
202 }; 190 };
203 191
204 xlb@1f00 { 192 xlb@1f00 {
205 compatible = "mpc5200-xlb"; 193 compatible = "fsl,mpc5200-xlb";
206 reg = <1f00 100>; 194 reg = <1f00 100>;
207 }; 195 };
208 196
209 serial@2000 { // PSC1 197 serial@2000 { // PSC1
210 device_type = "serial"; 198 device_type = "serial";
211 compatible = "mpc5200-psc-uart"; 199 compatible = "fsl,mpc5200-psc-uart";
212 port-number = <0>; // Logical port assignment 200 port-number = <0>; // Logical port assignment
213 cell-index = <0>; 201 cell-index = <0>;
214 reg = <2000 100>; 202 reg = <2000 100>;
@@ -218,8 +206,7 @@
218 206
219 // PSC2 in ac97 mode example 207 // PSC2 in ac97 mode example
220 //ac97@2200 { // PSC2 208 //ac97@2200 { // PSC2
221 // device_type = "sound"; 209 // compatible = "fsl,mpc5200-psc-ac97";
222 // compatible = "mpc5200-psc-ac97";
223 // cell-index = <1>; 210 // cell-index = <1>;
224 // reg = <2200 100>; 211 // reg = <2200 100>;
225 // interrupts = <2 2 0>; 212 // interrupts = <2 2 0>;
@@ -228,8 +215,7 @@
228 215
229 // PSC3 in CODEC mode example 216 // PSC3 in CODEC mode example
230 //i2s@2400 { // PSC3 217 //i2s@2400 { // PSC3
231 // device_type = "sound"; 218 // compatible = "fsl,mpc5200-psc-i2s";
232 // compatible = "mpc5200-psc-i2s";
233 // cell-index = <2>; 219 // cell-index = <2>;
234 // reg = <2400 100>; 220 // reg = <2400 100>;
235 // interrupts = <2 3 0>; 221 // interrupts = <2 3 0>;
@@ -239,7 +225,7 @@
239 // PSC4 in uart mode example 225 // PSC4 in uart mode example
240 //serial@2600 { // PSC4 226 //serial@2600 { // PSC4
241 // device_type = "serial"; 227 // device_type = "serial";
242 // compatible = "mpc5200-psc-uart"; 228 // compatible = "fsl,mpc5200-psc-uart";
243 // cell-index = <3>; 229 // cell-index = <3>;
244 // reg = <2600 100>; 230 // reg = <2600 100>;
245 // interrupts = <2 b 0>; 231 // interrupts = <2 b 0>;
@@ -249,7 +235,7 @@
249 // PSC5 in uart mode example 235 // PSC5 in uart mode example
250 //serial@2800 { // PSC5 236 //serial@2800 { // PSC5
251 // device_type = "serial"; 237 // device_type = "serial";
252 // compatible = "mpc5200-psc-uart"; 238 // compatible = "fsl,mpc5200-psc-uart";
253 // cell-index = <4>; 239 // cell-index = <4>;
254 // reg = <2800 100>; 240 // reg = <2800 100>;
255 // interrupts = <2 c 0>; 241 // interrupts = <2 c 0>;
@@ -258,8 +244,7 @@
258 244
259 // PSC6 in spi mode example 245 // PSC6 in spi mode example
260 //spi@2c00 { // PSC6 246 //spi@2c00 { // PSC6
261 // device_type = "spi"; 247 // compatible = "fsl,mpc5200-psc-spi";
262 // compatible = "mpc5200-psc-spi";
263 // cell-index = <5>; 248 // cell-index = <5>;
264 // reg = <2c00 100>; 249 // reg = <2c00 100>;
265 // interrupts = <2 4 0>; 250 // interrupts = <2 4 0>;
@@ -268,16 +253,16 @@
268 253
269 ethernet@3000 { 254 ethernet@3000 {
270 device_type = "network"; 255 device_type = "network";
271 compatible = "mpc5200-fec"; 256 compatible = "fsl,mpc5200-fec";
272 reg = <3000 800>; 257 reg = <3000 800>;
273 mac-address = [ 02 03 04 05 06 07 ]; // Bad! 258 local-mac-address = [ 00 00 00 00 00 00 ];
274 interrupts = <2 5 0>; 259 interrupts = <2 5 0>;
275 interrupt-parent = <&mpc5200_pic>; 260 interrupt-parent = <&mpc5200_pic>;
276 }; 261 };
277 262
278 ata@3a00 { 263 ata@3a00 {
279 device_type = "ata"; 264 device_type = "ata";
280 compatible = "mpc5200-ata"; 265 compatible = "fsl,mpc5200-ata";
281 reg = <3a00 100>; 266 reg = <3a00 100>;
282 interrupts = <2 7 0>; 267 interrupts = <2 7 0>;
283 interrupt-parent = <&mpc5200_pic>; 268 interrupt-parent = <&mpc5200_pic>;
@@ -286,7 +271,7 @@
286 i2c@3d00 { 271 i2c@3d00 {
287 #address-cells = <1>; 272 #address-cells = <1>;
288 #size-cells = <0>; 273 #size-cells = <0>;
289 compatible = "mpc5200-i2c","fsl-i2c"; 274 compatible = "fsl,mpc5200-i2c","fsl-i2c";
290 cell-index = <0>; 275 cell-index = <0>;
291 reg = <3d00 40>; 276 reg = <3d00 40>;
292 interrupts = <2 f 0>; 277 interrupts = <2 f 0>;
@@ -297,7 +282,7 @@
297 i2c@3d40 { 282 i2c@3d40 {
298 #address-cells = <1>; 283 #address-cells = <1>;
299 #size-cells = <0>; 284 #size-cells = <0>;
300 compatible = "mpc5200-i2c","fsl-i2c"; 285 compatible = "fsl,mpc5200-i2c","fsl-i2c";
301 cell-index = <1>; 286 cell-index = <1>;
302 reg = <3d40 40>; 287 reg = <3d40 40>;
303 interrupts = <2 10 0>; 288 interrupts = <2 10 0>;
@@ -305,8 +290,7 @@
305 fsl5200-clocking; 290 fsl5200-clocking;
306 }; 291 };
307 sram@8000 { 292 sram@8000 {
308 device_type = "sram"; 293 compatible = "fsl,mpc5200-sram","sram";
309 compatible = "mpc5200-sram","sram";
310 reg = <8000 4000>; 294 reg = <8000 4000>;
311 }; 295 };
312 }; 296 };
@@ -316,7 +300,7 @@
316 #size-cells = <2>; 300 #size-cells = <2>;
317 #address-cells = <3>; 301 #address-cells = <3>;
318 device_type = "pci"; 302 device_type = "pci";
319 compatible = "mpc5200-pci"; 303 compatible = "fsl,mpc5200-pci";
320 reg = <f0000d00 100>; 304 reg = <f0000d00 100>;
321 interrupt-map-mask = <f800 0 0 7>; 305 interrupt-map-mask = <f800 0 0 7>;
322 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 306 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 11:10:27 -0500