diff options
Diffstat (limited to 'arch/powerpc/boot/dts/lite5200.dts')
| -rw-r--r-- | arch/powerpc/boot/dts/lite5200.dts | 67 |
1 files changed, 33 insertions, 34 deletions
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts index e13ac6ef05a9..d29308fe4c24 100644 --- a/arch/powerpc/boot/dts/lite5200.dts +++ b/arch/powerpc/boot/dts/lite5200.dts | |||
| @@ -49,7 +49,7 @@ | |||
| 49 | soc5200@f0000000 { | 49 | soc5200@f0000000 { |
| 50 | model = "fsl,mpc5200"; | 50 | model = "fsl,mpc5200"; |
| 51 | compatible = "mpc5200"; | 51 | compatible = "mpc5200"; |
| 52 | revision = "" // from bootloader | 52 | revision = ""; // from bootloader |
| 53 | #interrupt-cells = <3>; | 53 | #interrupt-cells = <3>; |
| 54 | device_type = "soc"; | 54 | device_type = "soc"; |
| 55 | ranges = <0 f0000000 f0010000>; | 55 | ranges = <0 f0000000 f0010000>; |
| @@ -62,9 +62,8 @@ | |||
| 62 | reg = <200 38>; | 62 | reg = <200 38>; |
| 63 | }; | 63 | }; |
| 64 | 64 | ||
| 65 | pic@500 { | 65 | mpc5200_pic: pic@500 { |
| 66 | // 5200 interrupts are encoded into two levels; | 66 | // 5200 interrupts are encoded into two levels; |
| 67 | linux,phandle = <500>; | ||
| 68 | interrupt-controller; | 67 | interrupt-controller; |
| 69 | #interrupt-cells = <3>; | 68 | #interrupt-cells = <3>; |
| 70 | device_type = "interrupt-controller"; | 69 | device_type = "interrupt-controller"; |
| @@ -79,7 +78,7 @@ | |||
| 79 | cell-index = <0>; | 78 | cell-index = <0>; |
| 80 | reg = <600 10>; | 79 | reg = <600 10>; |
| 81 | interrupts = <1 9 0>; | 80 | interrupts = <1 9 0>; |
| 82 | interrupt-parent = <500>; | 81 | interrupt-parent = <&mpc5200_pic>; |
| 83 | has-wdt; | 82 | has-wdt; |
| 84 | }; | 83 | }; |
| 85 | 84 | ||
| @@ -89,7 +88,7 @@ | |||
| 89 | cell-index = <1>; | 88 | cell-index = <1>; |
| 90 | reg = <610 10>; | 89 | reg = <610 10>; |
| 91 | interrupts = <1 a 0>; | 90 | interrupts = <1 a 0>; |
| 92 | interrupt-parent = <500>; | 91 | interrupt-parent = <&mpc5200_pic>; |
| 93 | }; | 92 | }; |
| 94 | 93 | ||
| 95 | gpt@620 { // General Purpose Timer | 94 | gpt@620 { // General Purpose Timer |
| @@ -98,7 +97,7 @@ | |||
| 98 | cell-index = <2>; | 97 | cell-index = <2>; |
| 99 | reg = <620 10>; | 98 | reg = <620 10>; |
| 100 | interrupts = <1 b 0>; | 99 | interrupts = <1 b 0>; |
| 101 | interrupt-parent = <500>; | 100 | interrupt-parent = <&mpc5200_pic>; |
| 102 | }; | 101 | }; |
| 103 | 102 | ||
| 104 | gpt@630 { // General Purpose Timer | 103 | gpt@630 { // General Purpose Timer |
| @@ -107,7 +106,7 @@ | |||
| 107 | cell-index = <3>; | 106 | cell-index = <3>; |
| 108 | reg = <630 10>; | 107 | reg = <630 10>; |
| 109 | interrupts = <1 c 0>; | 108 | interrupts = <1 c 0>; |
| 110 | interrupt-parent = <500>; | 109 | interrupt-parent = <&mpc5200_pic>; |
| 111 | }; | 110 | }; |
| 112 | 111 | ||
| 113 | gpt@640 { // General Purpose Timer | 112 | gpt@640 { // General Purpose Timer |
| @@ -116,7 +115,7 @@ | |||
| 116 | cell-index = <4>; | 115 | cell-index = <4>; |
| 117 | reg = <640 10>; | 116 | reg = <640 10>; |
| 118 | interrupts = <1 d 0>; | 117 | interrupts = <1 d 0>; |
| 119 | interrupt-parent = <500>; | 118 | interrupt-parent = <&mpc5200_pic>; |
| 120 | }; | 119 | }; |
| 121 | 120 | ||
| 122 | gpt@650 { // General Purpose Timer | 121 | gpt@650 { // General Purpose Timer |
| @@ -125,7 +124,7 @@ | |||
| 125 | cell-index = <5>; | 124 | cell-index = <5>; |
| 126 | reg = <650 10>; | 125 | reg = <650 10>; |
| 127 | interrupts = <1 e 0>; | 126 | interrupts = <1 e 0>; |
| 128 | interrupt-parent = <500>; | 127 | interrupt-parent = <&mpc5200_pic>; |
| 129 | }; | 128 | }; |
| 130 | 129 | ||
| 131 | gpt@660 { // General Purpose Timer | 130 | gpt@660 { // General Purpose Timer |
| @@ -134,7 +133,7 @@ | |||
| 134 | cell-index = <6>; | 133 | cell-index = <6>; |
| 135 | reg = <660 10>; | 134 | reg = <660 10>; |
| 136 | interrupts = <1 f 0>; | 135 | interrupts = <1 f 0>; |
| 137 | interrupt-parent = <500>; | 136 | interrupt-parent = <&mpc5200_pic>; |
| 138 | }; | 137 | }; |
| 139 | 138 | ||
| 140 | gpt@670 { // General Purpose Timer | 139 | gpt@670 { // General Purpose Timer |
| @@ -143,7 +142,7 @@ | |||
| 143 | cell-index = <7>; | 142 | cell-index = <7>; |
| 144 | reg = <670 10>; | 143 | reg = <670 10>; |
| 145 | interrupts = <1 10 0>; | 144 | interrupts = <1 10 0>; |
| 146 | interrupt-parent = <500>; | 145 | interrupt-parent = <&mpc5200_pic>; |
| 147 | }; | 146 | }; |
| 148 | 147 | ||
| 149 | rtc@800 { // Real time clock | 148 | rtc@800 { // Real time clock |
| @@ -151,7 +150,7 @@ | |||
| 151 | device_type = "rtc"; | 150 | device_type = "rtc"; |
| 152 | reg = <800 100>; | 151 | reg = <800 100>; |
| 153 | interrupts = <1 5 0 1 6 0>; | 152 | interrupts = <1 5 0 1 6 0>; |
| 154 | interrupt-parent = <500>; | 153 | interrupt-parent = <&mpc5200_pic>; |
| 155 | }; | 154 | }; |
| 156 | 155 | ||
| 157 | mscan@900 { | 156 | mscan@900 { |
| @@ -159,7 +158,7 @@ | |||
| 159 | compatible = "mpc5200-mscan"; | 158 | compatible = "mpc5200-mscan"; |
| 160 | cell-index = <0>; | 159 | cell-index = <0>; |
| 161 | interrupts = <2 11 0>; | 160 | interrupts = <2 11 0>; |
| 162 | interrupt-parent = <500>; | 161 | interrupt-parent = <&mpc5200_pic>; |
| 163 | reg = <900 80>; | 162 | reg = <900 80>; |
| 164 | }; | 163 | }; |
| 165 | 164 | ||
| @@ -168,7 +167,7 @@ | |||
| 168 | compatible = "mpc5200-mscan"; | 167 | compatible = "mpc5200-mscan"; |
| 169 | cell-index = <1>; | 168 | cell-index = <1>; |
| 170 | interrupts = <2 12 0>; | 169 | interrupts = <2 12 0>; |
| 171 | interrupt-parent = <500>; | 170 | interrupt-parent = <&mpc5200_pic>; |
| 172 | reg = <980 80>; | 171 | reg = <980 80>; |
| 173 | }; | 172 | }; |
| 174 | 173 | ||
| @@ -176,14 +175,14 @@ | |||
| 176 | compatible = "mpc5200-gpio"; | 175 | compatible = "mpc5200-gpio"; |
| 177 | reg = <b00 40>; | 176 | reg = <b00 40>; |
| 178 | interrupts = <1 7 0>; | 177 | interrupts = <1 7 0>; |
| 179 | interrupt-parent = <500>; | 178 | interrupt-parent = <&mpc5200_pic>; |
| 180 | }; | 179 | }; |
| 181 | 180 | ||
| 182 | gpio-wkup@c00 { | 181 | gpio-wkup@c00 { |
| 183 | compatible = "mpc5200-gpio-wkup"; | 182 | compatible = "mpc5200-gpio-wkup"; |
| 184 | reg = <c00 40>; | 183 | reg = <c00 40>; |
| 185 | interrupts = <1 8 0 0 3 0>; | 184 | interrupts = <1 8 0 0 3 0>; |
| 186 | interrupt-parent = <500>; | 185 | interrupt-parent = <&mpc5200_pic>; |
| 187 | }; | 186 | }; |
| 188 | 187 | ||
| 189 | pci@0d00 { | 188 | pci@0d00 { |
| @@ -194,13 +193,13 @@ | |||
| 194 | compatible = "mpc5200-pci"; | 193 | compatible = "mpc5200-pci"; |
| 195 | reg = <d00 100>; | 194 | reg = <d00 100>; |
| 196 | interrupt-map-mask = <f800 0 0 7>; | 195 | interrupt-map-mask = <f800 0 0 7>; |
| 197 | interrupt-map = <c000 0 0 1 500 0 0 3 | 196 | interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 |
| 198 | c000 0 0 2 500 0 0 3 | 197 | c000 0 0 2 &mpc5200_pic 0 0 3 |
| 199 | c000 0 0 3 500 0 0 3 | 198 | c000 0 0 3 &mpc5200_pic 0 0 3 |
| 200 | c000 0 0 4 500 0 0 3>; | 199 | c000 0 0 4 &mpc5200_pic 0 0 3>; |
| 201 | clock-frequency = <0>; // From boot loader | 200 | clock-frequency = <0>; // From boot loader |
| 202 | interrupts = <2 8 0 2 9 0 2 a 0>; | 201 | interrupts = <2 8 0 2 9 0 2 a 0>; |
| 203 | interrupt-parent = <500>; | 202 | interrupt-parent = <&mpc5200_pic>; |
| 204 | bus-range = <0 0>; | 203 | bus-range = <0 0>; |
| 205 | ranges = <42000000 0 80000000 80000000 0 20000000 | 204 | ranges = <42000000 0 80000000 80000000 0 20000000 |
| 206 | 02000000 0 a0000000 a0000000 0 10000000 | 205 | 02000000 0 a0000000 a0000000 0 10000000 |
| @@ -212,7 +211,7 @@ | |||
| 212 | compatible = "mpc5200-spi"; | 211 | compatible = "mpc5200-spi"; |
| 213 | reg = <f00 20>; | 212 | reg = <f00 20>; |
| 214 | interrupts = <2 d 0 2 e 0>; | 213 | interrupts = <2 d 0 2 e 0>; |
| 215 | interrupt-parent = <500>; | 214 | interrupt-parent = <&mpc5200_pic>; |
| 216 | }; | 215 | }; |
| 217 | 216 | ||
| 218 | usb@1000 { | 217 | usb@1000 { |
| @@ -220,7 +219,7 @@ | |||
| 220 | compatible = "mpc5200-ohci\0ohci-be"; | 219 | compatible = "mpc5200-ohci\0ohci-be"; |
| 221 | reg = <1000 ff>; | 220 | reg = <1000 ff>; |
| 222 | interrupts = <2 6 0>; | 221 | interrupts = <2 6 0>; |
| 223 | interrupt-parent = <500>; | 222 | interrupt-parent = <&mpc5200_pic>; |
| 224 | }; | 223 | }; |
| 225 | 224 | ||
| 226 | bestcomm@1200 { | 225 | bestcomm@1200 { |
| @@ -231,7 +230,7 @@ | |||
| 231 | 3 4 0 3 5 0 3 6 0 3 7 0 | 230 | 3 4 0 3 5 0 3 6 0 3 7 0 |
| 232 | 3 8 0 3 9 0 3 a 0 3 b 0 | 231 | 3 8 0 3 9 0 3 a 0 3 b 0 |
| 233 | 3 c 0 3 d 0 3 e 0 3 f 0>; | 232 | 3 c 0 3 d 0 3 e 0 3 f 0>; |
| 234 | interrupt-parent = <500>; | 233 | interrupt-parent = <&mpc5200_pic>; |
| 235 | }; | 234 | }; |
| 236 | 235 | ||
| 237 | xlb@1f00 { | 236 | xlb@1f00 { |
| @@ -246,7 +245,7 @@ | |||
| 246 | cell-index = <0>; | 245 | cell-index = <0>; |
| 247 | reg = <2000 100>; | 246 | reg = <2000 100>; |
| 248 | interrupts = <2 1 0>; | 247 | interrupts = <2 1 0>; |
| 249 | interrupt-parent = <500>; | 248 | interrupt-parent = <&mpc5200_pic>; |
| 250 | }; | 249 | }; |
| 251 | 250 | ||
| 252 | // PSC2 in ac97 mode example | 251 | // PSC2 in ac97 mode example |
| @@ -256,7 +255,7 @@ | |||
| 256 | // cell-index = <1>; | 255 | // cell-index = <1>; |
| 257 | // reg = <2200 100>; | 256 | // reg = <2200 100>; |
| 258 | // interrupts = <2 2 0>; | 257 | // interrupts = <2 2 0>; |
| 259 | // interrupt-parent = <500>; | 258 | // interrupt-parent = <&mpc5200_pic>; |
| 260 | //}; | 259 | //}; |
| 261 | 260 | ||
| 262 | // PSC3 in CODEC mode example | 261 | // PSC3 in CODEC mode example |
| @@ -266,7 +265,7 @@ | |||
| 266 | // cell-index = <2>; | 265 | // cell-index = <2>; |
| 267 | // reg = <2400 100>; | 266 | // reg = <2400 100>; |
| 268 | // interrupts = <2 3 0>; | 267 | // interrupts = <2 3 0>; |
| 269 | // interrupt-parent = <500>; | 268 | // interrupt-parent = <&mpc5200_pic>; |
| 270 | //}; | 269 | //}; |
| 271 | 270 | ||
| 272 | // PSC4 in uart mode example | 271 | // PSC4 in uart mode example |
| @@ -276,7 +275,7 @@ | |||
| 276 | // cell-index = <3>; | 275 | // cell-index = <3>; |
| 277 | // reg = <2600 100>; | 276 | // reg = <2600 100>; |
| 278 | // interrupts = <2 b 0>; | 277 | // interrupts = <2 b 0>; |
| 279 | // interrupt-parent = <500>; | 278 | // interrupt-parent = <&mpc5200_pic>; |
| 280 | //}; | 279 | //}; |
| 281 | 280 | ||
| 282 | // PSC5 in uart mode example | 281 | // PSC5 in uart mode example |
| @@ -286,7 +285,7 @@ | |||
| 286 | // cell-index = <4>; | 285 | // cell-index = <4>; |
| 287 | // reg = <2800 100>; | 286 | // reg = <2800 100>; |
| 288 | // interrupts = <2 c 0>; | 287 | // interrupts = <2 c 0>; |
| 289 | // interrupt-parent = <500>; | 288 | // interrupt-parent = <&mpc5200_pic>; |
| 290 | //}; | 289 | //}; |
| 291 | 290 | ||
| 292 | // PSC6 in spi mode example | 291 | // PSC6 in spi mode example |
| @@ -296,7 +295,7 @@ | |||
| 296 | // cell-index = <5>; | 295 | // cell-index = <5>; |
| 297 | // reg = <2c00 100>; | 296 | // reg = <2c00 100>; |
| 298 | // interrupts = <2 4 0>; | 297 | // interrupts = <2 4 0>; |
| 299 | // interrupt-parent = <500>; | 298 | // interrupt-parent = <&mpc5200_pic>; |
| 300 | //}; | 299 | //}; |
| 301 | 300 | ||
| 302 | ethernet@3000 { | 301 | ethernet@3000 { |
| @@ -305,7 +304,7 @@ | |||
| 305 | reg = <3000 800>; | 304 | reg = <3000 800>; |
| 306 | mac-address = [ 02 03 04 05 06 07 ]; // Bad! | 305 | mac-address = [ 02 03 04 05 06 07 ]; // Bad! |
| 307 | interrupts = <2 5 0>; | 306 | interrupts = <2 5 0>; |
| 308 | interrupt-parent = <500>; | 307 | interrupt-parent = <&mpc5200_pic>; |
| 309 | }; | 308 | }; |
| 310 | 309 | ||
| 311 | ata@3a00 { | 310 | ata@3a00 { |
| @@ -313,7 +312,7 @@ | |||
| 313 | compatible = "mpc5200-ata"; | 312 | compatible = "mpc5200-ata"; |
| 314 | reg = <3a00 100>; | 313 | reg = <3a00 100>; |
| 315 | interrupts = <2 7 0>; | 314 | interrupts = <2 7 0>; |
| 316 | interrupt-parent = <500>; | 315 | interrupt-parent = <&mpc5200_pic>; |
| 317 | }; | 316 | }; |
| 318 | 317 | ||
| 319 | i2c@3d00 { | 318 | i2c@3d00 { |
| @@ -322,7 +321,7 @@ | |||
| 322 | cell-index = <0>; | 321 | cell-index = <0>; |
| 323 | reg = <3d00 40>; | 322 | reg = <3d00 40>; |
| 324 | interrupts = <2 f 0>; | 323 | interrupts = <2 f 0>; |
| 325 | interrupt-parent = <500>; | 324 | interrupt-parent = <&mpc5200_pic>; |
| 326 | fsl5200-clocking; | 325 | fsl5200-clocking; |
| 327 | }; | 326 | }; |
| 328 | 327 | ||
| @@ -332,7 +331,7 @@ | |||
| 332 | cell-index = <1>; | 331 | cell-index = <1>; |
| 333 | reg = <3d40 40>; | 332 | reg = <3d40 40>; |
| 334 | interrupts = <2 10 0>; | 333 | interrupts = <2 10 0>; |
| 335 | interrupt-parent = <500>; | 334 | interrupt-parent = <&mpc5200_pic>; |
| 336 | fsl5200-clocking; | 335 | fsl5200-clocking; |
| 337 | }; | 336 | }; |
| 338 | sram@8000 { | 337 | sram@8000 { |