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-rw-r--r--arch/powerpc/boot/dts/kilauea.dts182
1 files changed, 92 insertions, 90 deletions
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts
index 48c9a6e71f1a..3ed6a8fee1d5 100644
--- a/arch/powerpc/boot/dts/kilauea.dts
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -8,12 +8,14 @@
8 * any warranty of any kind, whether express or implied. 8 * any warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11/dts-v1/;
12
11/ { 13/ {
12 #address-cells = <1>; 14 #address-cells = <1>;
13 #size-cells = <1>; 15 #size-cells = <1>;
14 model = "amcc,kilauea"; 16 model = "amcc,kilauea";
15 compatible = "amcc,kilauea"; 17 compatible = "amcc,kilauea";
16 dcr-parent = <&/cpus/cpu@0>; 18 dcr-parent = <&{/cpus/cpu@0}>;
17 19
18 aliases { 20 aliases {
19 ethernet0 = &EMAC0; 21 ethernet0 = &EMAC0;
@@ -29,13 +31,13 @@
29 cpu@0 { 31 cpu@0 {
30 device_type = "cpu"; 32 device_type = "cpu";
31 model = "PowerPC,405EX"; 33 model = "PowerPC,405EX";
32 reg = <0>; 34 reg = <0x00000000>;
33 clock-frequency = <0>; /* Filled in by U-Boot */ 35 clock-frequency = <0>; /* Filled in by U-Boot */
34 timebase-frequency = <0>; /* Filled in by U-Boot */ 36 timebase-frequency = <0>; /* Filled in by U-Boot */
35 i-cache-line-size = <20>; 37 i-cache-line-size = <32>;
36 d-cache-line-size = <20>; 38 d-cache-line-size = <32>;
37 i-cache-size = <4000>; /* 16 kB */ 39 i-cache-size = <16384>; /* 16 kB */
38 d-cache-size = <4000>; /* 16 kB */ 40 d-cache-size = <16384>; /* 16 kB */
39 dcr-controller; 41 dcr-controller;
40 dcr-access-method = "native"; 42 dcr-access-method = "native";
41 }; 43 };
@@ -43,14 +45,14 @@
43 45
44 memory { 46 memory {
45 device_type = "memory"; 47 device_type = "memory";
46 reg = <0 0>; /* Filled in by U-Boot */ 48 reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
47 }; 49 };
48 50
49 UIC0: interrupt-controller { 51 UIC0: interrupt-controller {
50 compatible = "ibm,uic-405ex", "ibm,uic"; 52 compatible = "ibm,uic-405ex", "ibm,uic";
51 interrupt-controller; 53 interrupt-controller;
52 cell-index = <0>; 54 cell-index = <0>;
53 dcr-reg = <0c0 009>; 55 dcr-reg = <0x0c0 0x009>;
54 #address-cells = <0>; 56 #address-cells = <0>;
55 #size-cells = <0>; 57 #size-cells = <0>;
56 #interrupt-cells = <2>; 58 #interrupt-cells = <2>;
@@ -60,11 +62,11 @@
60 compatible = "ibm,uic-405ex","ibm,uic"; 62 compatible = "ibm,uic-405ex","ibm,uic";
61 interrupt-controller; 63 interrupt-controller;
62 cell-index = <1>; 64 cell-index = <1>;
63 dcr-reg = <0d0 009>; 65 dcr-reg = <0x0d0 0x009>;
64 #address-cells = <0>; 66 #address-cells = <0>;
65 #size-cells = <0>; 67 #size-cells = <0>;
66 #interrupt-cells = <2>; 68 #interrupt-cells = <2>;
67 interrupts = <1e 4 1f 4>; /* cascade */ 69 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
68 interrupt-parent = <&UIC0>; 70 interrupt-parent = <&UIC0>;
69 }; 71 };
70 72
@@ -72,11 +74,11 @@
72 compatible = "ibm,uic-405ex","ibm,uic"; 74 compatible = "ibm,uic-405ex","ibm,uic";
73 interrupt-controller; 75 interrupt-controller;
74 cell-index = <2>; 76 cell-index = <2>;
75 dcr-reg = <0e0 009>; 77 dcr-reg = <0x0e0 0x009>;
76 #address-cells = <0>; 78 #address-cells = <0>;
77 #size-cells = <0>; 79 #size-cells = <0>;
78 #interrupt-cells = <2>; 80 #interrupt-cells = <2>;
79 interrupts = <1c 4 1d 4>; /* cascade */ 81 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
80 interrupt-parent = <&UIC0>; 82 interrupt-parent = <&UIC0>;
81 }; 83 };
82 84
@@ -89,72 +91,72 @@
89 91
90 SDRAM0: memory-controller { 92 SDRAM0: memory-controller {
91 compatible = "ibm,sdram-405ex"; 93 compatible = "ibm,sdram-405ex";
92 dcr-reg = <010 2>; 94 dcr-reg = <0x010 0x002>;
93 }; 95 };
94 96
95 MAL0: mcmal { 97 MAL0: mcmal {
96 compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; 98 compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
97 dcr-reg = <180 62>; 99 dcr-reg = <0x180 0x062>;
98 num-tx-chans = <2>; 100 num-tx-chans = <2>;
99 num-rx-chans = <2>; 101 num-rx-chans = <2>;
100 interrupt-parent = <&MAL0>; 102 interrupt-parent = <&MAL0>;
101 interrupts = <0 1 2 3 4>; 103 interrupts = <0x0 0x1 0x2 0x3 0x4>;
102 #interrupt-cells = <1>; 104 #interrupt-cells = <1>;
103 #address-cells = <0>; 105 #address-cells = <0>;
104 #size-cells = <0>; 106 #size-cells = <0>;
105 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 107 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
106 /*RXEOB*/ 1 &UIC0 b 4 108 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
107 /*SERR*/ 2 &UIC1 0 4 109 /*SERR*/ 0x2 &UIC1 0x0 0x4
108 /*TXDE*/ 3 &UIC1 1 4 110 /*TXDE*/ 0x3 &UIC1 0x1 0x4
109 /*RXDE*/ 4 &UIC1 2 4>; 111 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
110 interrupt-map-mask = <ffffffff>; 112 interrupt-map-mask = <0xffffffff>;
111 }; 113 };
112 114
113 POB0: opb { 115 POB0: opb {
114 compatible = "ibm,opb-405ex", "ibm,opb"; 116 compatible = "ibm,opb-405ex", "ibm,opb";
115 #address-cells = <1>; 117 #address-cells = <1>;
116 #size-cells = <1>; 118 #size-cells = <1>;
117 ranges = <80000000 80000000 10000000 119 ranges = <0x80000000 0x80000000 0x10000000
118 ef600000 ef600000 a00000 120 0xef600000 0xef600000 0x00a00000
119 f0000000 f0000000 10000000>; 121 0xf0000000 0xf0000000 0x10000000>;
120 dcr-reg = <0a0 5>; 122 dcr-reg = <0x0a0 0x005>;
121 clock-frequency = <0>; /* Filled in by U-Boot */ 123 clock-frequency = <0>; /* Filled in by U-Boot */
122 124
123 EBC0: ebc { 125 EBC0: ebc {
124 compatible = "ibm,ebc-405ex", "ibm,ebc"; 126 compatible = "ibm,ebc-405ex", "ibm,ebc";
125 dcr-reg = <012 2>; 127 dcr-reg = <0x012 0x002>;
126 #address-cells = <2>; 128 #address-cells = <2>;
127 #size-cells = <1>; 129 #size-cells = <1>;
128 clock-frequency = <0>; /* Filled in by U-Boot */ 130 clock-frequency = <0>; /* Filled in by U-Boot */
129 /* ranges property is supplied by U-Boot */ 131 /* ranges property is supplied by U-Boot */
130 interrupts = <5 1>; 132 interrupts = <0x5 0x1>;
131 interrupt-parent = <&UIC1>; 133 interrupt-parent = <&UIC1>;
132 134
133 nor_flash@0,0 { 135 nor_flash@0,0 {
134 compatible = "amd,s29gl512n", "cfi-flash"; 136 compatible = "amd,s29gl512n", "cfi-flash";
135 bank-width = <2>; 137 bank-width = <2>;
136 reg = <0 000000 4000000>; 138 reg = <0x00000000 0x00000000 0x04000000>;
137 #address-cells = <1>; 139 #address-cells = <1>;
138 #size-cells = <1>; 140 #size-cells = <1>;
139 partition@0 { 141 partition@0 {
140 label = "kernel"; 142 label = "kernel";
141 reg = <0 200000>; 143 reg = <0x00000000 0x00200000>;
142 }; 144 };
143 partition@200000 { 145 partition@200000 {
144 label = "root"; 146 label = "root";
145 reg = <200000 200000>; 147 reg = <0x00200000 0x00200000>;
146 }; 148 };
147 partition@400000 { 149 partition@400000 {
148 label = "user"; 150 label = "user";
149 reg = <400000 3b60000>; 151 reg = <0x00400000 0x03b60000>;
150 }; 152 };
151 partition@3f60000 { 153 partition@3f60000 {
152 label = "env"; 154 label = "env";
153 reg = <3f60000 40000>; 155 reg = <0x03f60000 0x00040000>;
154 }; 156 };
155 partition@3fa0000 { 157 partition@3fa0000 {
156 label = "u-boot"; 158 label = "u-boot";
157 reg = <3fa0000 60000>; 159 reg = <0x03fa0000 0x00060000>;
158 }; 160 };
159 }; 161 };
160 }; 162 };
@@ -162,68 +164,68 @@
162 UART0: serial@ef600200 { 164 UART0: serial@ef600200 {
163 device_type = "serial"; 165 device_type = "serial";
164 compatible = "ns16550"; 166 compatible = "ns16550";
165 reg = <ef600200 8>; 167 reg = <0xef600200 0x00000008>;
166 virtual-reg = <ef600200>; 168 virtual-reg = <0xef600200>;
167 clock-frequency = <0>; /* Filled in by U-Boot */ 169 clock-frequency = <0>; /* Filled in by U-Boot */
168 current-speed = <0>; 170 current-speed = <0>;
169 interrupt-parent = <&UIC0>; 171 interrupt-parent = <&UIC0>;
170 interrupts = <1a 4>; 172 interrupts = <0x1a 0x4>;
171 }; 173 };
172 174
173 UART1: serial@ef600300 { 175 UART1: serial@ef600300 {
174 device_type = "serial"; 176 device_type = "serial";
175 compatible = "ns16550"; 177 compatible = "ns16550";
176 reg = <ef600300 8>; 178 reg = <0xef600300 0x00000008>;
177 virtual-reg = <ef600300>; 179 virtual-reg = <0xef600300>;
178 clock-frequency = <0>; /* Filled in by U-Boot */ 180 clock-frequency = <0>; /* Filled in by U-Boot */
179 current-speed = <0>; 181 current-speed = <0>;
180 interrupt-parent = <&UIC0>; 182 interrupt-parent = <&UIC0>;
181 interrupts = <1 4>; 183 interrupts = <0x1 0x4>;
182 }; 184 };
183 185
184 IIC0: i2c@ef600400 { 186 IIC0: i2c@ef600400 {
185 compatible = "ibm,iic-405ex", "ibm,iic"; 187 compatible = "ibm,iic-405ex", "ibm,iic";
186 reg = <ef600400 14>; 188 reg = <0xef600400 0x00000014>;
187 interrupt-parent = <&UIC0>; 189 interrupt-parent = <&UIC0>;
188 interrupts = <2 4>; 190 interrupts = <0x2 0x4>;
189 }; 191 };
190 192
191 IIC1: i2c@ef600500 { 193 IIC1: i2c@ef600500 {
192 compatible = "ibm,iic-405ex", "ibm,iic"; 194 compatible = "ibm,iic-405ex", "ibm,iic";
193 reg = <ef600500 14>; 195 reg = <0xef600500 0x00000014>;
194 interrupt-parent = <&UIC0>; 196 interrupt-parent = <&UIC0>;
195 interrupts = <7 4>; 197 interrupts = <0x7 0x4>;
196 }; 198 };
197 199
198 200
199 RGMII0: emac-rgmii@ef600b00 { 201 RGMII0: emac-rgmii@ef600b00 {
200 compatible = "ibm,rgmii-405ex", "ibm,rgmii"; 202 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
201 reg = <ef600b00 104>; 203 reg = <0xef600b00 0x00000104>;
202 has-mdio; 204 has-mdio;
203 }; 205 };
204 206
205 EMAC0: ethernet@ef600900 { 207 EMAC0: ethernet@ef600900 {
206 linux,network-index = <0>; 208 linux,network-index = <0x0>;
207 device_type = "network"; 209 device_type = "network";
208 compatible = "ibm,emac-405ex", "ibm,emac4"; 210 compatible = "ibm,emac-405ex", "ibm,emac4";
209 interrupt-parent = <&EMAC0>; 211 interrupt-parent = <&EMAC0>;
210 interrupts = <0 1>; 212 interrupts = <0x0 0x1>;
211 #interrupt-cells = <1>; 213 #interrupt-cells = <1>;
212 #address-cells = <0>; 214 #address-cells = <0>;
213 #size-cells = <0>; 215 #size-cells = <0>;
214 interrupt-map = </*Status*/ 0 &UIC0 18 4 216 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
215 /*Wake*/ 1 &UIC1 1d 4>; 217 /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
216 reg = <ef600900 70>; 218 reg = <0xef600900 0x00000070>;
217 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 219 local-mac-address = [000000000000]; /* Filled in by U-Boot */
218 mal-device = <&MAL0>; 220 mal-device = <&MAL0>;
219 mal-tx-channel = <0>; 221 mal-tx-channel = <0>;
220 mal-rx-channel = <0>; 222 mal-rx-channel = <0>;
221 cell-index = <0>; 223 cell-index = <0>;
222 max-frame-size = <2328>; 224 max-frame-size = <9000>;
223 rx-fifo-size = <1000>; 225 rx-fifo-size = <4096>;
224 tx-fifo-size = <800>; 226 tx-fifo-size = <2048>;
225 phy-mode = "rgmii"; 227 phy-mode = "rgmii";
226 phy-map = <00000000>; 228 phy-map = <0x00000000>;
227 rgmii-device = <&RGMII0>; 229 rgmii-device = <&RGMII0>;
228 rgmii-channel = <0>; 230 rgmii-channel = <0>;
229 has-inverted-stacr-oc; 231 has-inverted-stacr-oc;
@@ -231,27 +233,27 @@
231 }; 233 };
232 234
233 EMAC1: ethernet@ef600a00 { 235 EMAC1: ethernet@ef600a00 {
234 linux,network-index = <1>; 236 linux,network-index = <0x1>;
235 device_type = "network"; 237 device_type = "network";
236 compatible = "ibm,emac-405ex", "ibm,emac4"; 238 compatible = "ibm,emac-405ex", "ibm,emac4";
237 interrupt-parent = <&EMAC1>; 239 interrupt-parent = <&EMAC1>;
238 interrupts = <0 1>; 240 interrupts = <0x0 0x1>;
239 #interrupt-cells = <1>; 241 #interrupt-cells = <1>;
240 #address-cells = <0>; 242 #address-cells = <0>;
241 #size-cells = <0>; 243 #size-cells = <0>;
242 interrupt-map = </*Status*/ 0 &UIC0 19 4 244 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
243 /*Wake*/ 1 &UIC1 1f 4>; 245 /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
244 reg = <ef600a00 70>; 246 reg = <0xef600a00 0x00000070>;
245 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 247 local-mac-address = [000000000000]; /* Filled in by U-Boot */
246 mal-device = <&MAL0>; 248 mal-device = <&MAL0>;
247 mal-tx-channel = <1>; 249 mal-tx-channel = <1>;
248 mal-rx-channel = <1>; 250 mal-rx-channel = <1>;
249 cell-index = <1>; 251 cell-index = <1>;
250 max-frame-size = <2328>; 252 max-frame-size = <9000>;
251 rx-fifo-size = <1000>; 253 rx-fifo-size = <4096>;
252 tx-fifo-size = <800>; 254 tx-fifo-size = <2048>;
253 phy-mode = "rgmii"; 255 phy-mode = "rgmii";
254 phy-map = <00000000>; 256 phy-map = <0x00000000>;
255 rgmii-device = <&RGMII0>; 257 rgmii-device = <&RGMII0>;
256 rgmii-channel = <1>; 258 rgmii-channel = <1>;
257 has-inverted-stacr-oc; 259 has-inverted-stacr-oc;
@@ -266,23 +268,23 @@
266 #address-cells = <3>; 268 #address-cells = <3>;
267 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 269 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
268 primary; 270 primary;
269 port = <0>; /* port number */ 271 port = <0x0>; /* port number */
270 reg = <a0000000 20000000 /* Config space access */ 272 reg = <0xa0000000 0x20000000 /* Config space access */
271 ef000000 00001000>; /* Registers */ 273 0xef000000 0x00001000>; /* Registers */
272 dcr-reg = <040 020>; 274 dcr-reg = <0x040 0x020>;
273 sdr-base = <400>; 275 sdr-base = <0x400>;
274 276
275 /* Outbound ranges, one memory and one IO, 277 /* Outbound ranges, one memory and one IO,
276 * later cannot be changed 278 * later cannot be changed
277 */ 279 */
278 ranges = <02000000 0 80000000 90000000 0 08000000 280 ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
279 01000000 0 00000000 e0000000 0 00010000>; 281 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
280 282
281 /* Inbound 2GB range starting at 0 */ 283 /* Inbound 2GB range starting at 0 */
282 dma-ranges = <42000000 0 0 0 0 80000000>; 284 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
283 285
284 /* This drives busses 0x00 to 0x3f */ 286 /* This drives busses 0x00 to 0x3f */
285 bus-range = <00 3f>; 287 bus-range = <0x0 0x3f>;
286 288
287 /* Legacy interrupts (note the weird polarity, the bridge seems 289 /* Legacy interrupts (note the weird polarity, the bridge seems
288 * to invert PCIe legacy interrupts). 290 * to invert PCIe legacy interrupts).
@@ -292,12 +294,12 @@
292 * below are basically de-swizzled numbers. 294 * below are basically de-swizzled numbers.
293 * The real slot is on idsel 0, so the swizzling is 1:1 295 * The real slot is on idsel 0, so the swizzling is 1:1
294 */ 296 */
295 interrupt-map-mask = <0000 0 0 7>; 297 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
296 interrupt-map = < 298 interrupt-map = <
297 0000 0 0 1 &UIC2 0 4 /* swizzled int A */ 299 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
298 0000 0 0 2 &UIC2 1 4 /* swizzled int B */ 300 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
299 0000 0 0 3 &UIC2 2 4 /* swizzled int C */ 301 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
300 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>; 302 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
301 }; 303 };
302 304
303 PCIE1: pciex@0c0000000 { 305 PCIE1: pciex@0c0000000 {
@@ -307,23 +309,23 @@
307 #address-cells = <3>; 309 #address-cells = <3>;
308 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 310 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
309 primary; 311 primary;
310 port = <1>; /* port number */ 312 port = <0x1>; /* port number */
311 reg = <c0000000 20000000 /* Config space access */ 313 reg = <0xc0000000 0x20000000 /* Config space access */
312 ef001000 00001000>; /* Registers */ 314 0xef001000 0x00001000>; /* Registers */
313 dcr-reg = <060 020>; 315 dcr-reg = <0x060 0x020>;
314 sdr-base = <440>; 316 sdr-base = <0x440>;
315 317
316 /* Outbound ranges, one memory and one IO, 318 /* Outbound ranges, one memory and one IO,
317 * later cannot be changed 319 * later cannot be changed
318 */ 320 */
319 ranges = <02000000 0 80000000 98000000 0 08000000 321 ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
320 01000000 0 00000000 e0010000 0 00010000>; 322 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;
321 323
322 /* Inbound 2GB range starting at 0 */ 324 /* Inbound 2GB range starting at 0 */
323 dma-ranges = <42000000 0 0 0 0 80000000>; 325 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
324 326
325 /* This drives busses 0x40 to 0x7f */ 327 /* This drives busses 0x40 to 0x7f */
326 bus-range = <40 7f>; 328 bus-range = <0x40 0x7f>;
327 329
328 /* Legacy interrupts (note the weird polarity, the bridge seems 330 /* Legacy interrupts (note the weird polarity, the bridge seems
329 * to invert PCIe legacy interrupts). 331 * to invert PCIe legacy interrupts).
@@ -333,12 +335,12 @@
333 * below are basically de-swizzled numbers. 335 * below are basically de-swizzled numbers.
334 * The real slot is on idsel 0, so the swizzling is 1:1 336 * The real slot is on idsel 0, so the swizzling is 1:1
335 */ 337 */
336 interrupt-map-mask = <0000 0 0 7>; 338 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
337 interrupt-map = < 339 interrupt-map = <
338 0000 0 0 1 &UIC2 b 4 /* swizzled int A */ 340 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
339 0000 0 0 2 &UIC2 c 4 /* swizzled int B */ 341 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
340 0000 0 0 3 &UIC2 d 4 /* swizzled int C */ 342 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
341 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>; 343 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
342 }; 344 };
343 }; 345 };
344}; 346};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-09 23:04:10 -0500