1 files changed, 155 insertions, 0 deletions

diff --git a/arch/powerpc/boot/dts/iss4xx-mpic.dts b/arch/powerpc/boot/dts/iss4xx-mpic.dts
new file mode 100644
index 000000000000..23e9d9b7e400
--- /dev/null
+++ b/arch/powerpc/boot/dts/iss4xx-mpic.dts
@@ -0,0 +1,155 @@
+/*
+ * Device Tree Source for IBM Embedded PPC 476 Platform
+ *
+ * Copyright 2010 Torez Smith, IBM Corporation.
+ *
+ * Based on earlier code:
+ *     Copyright (c) 2006, 2007 IBM Corp.
+ *     Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x01f00000 0x00100000;
+
+/ {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        model = "ibm,iss-4xx";
+        compatible = "ibm,iss-4xx";
+        dcr-parent = <&{/cpus/cpu@0}>;
+
+        aliases {
+                serial0 = &UART0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        model = "PowerPC,4xx"; // real CPU changed in sim
+                        reg = <0>;
+                        clock-frequency = <100000000>; // 100Mhz :-)
+                        timebase-frequency = <100000000>;
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                        status = "ok";
+                };
+                cpu@1 {
+                        device_type = "cpu";
+                        model = "PowerPC,4xx"; // real CPU changed in sim
+                        reg = <1>;
+                        clock-frequency = <100000000>; // 100Mhz :-)
+                        timebase-frequency = <100000000>;
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                        status = "disabled";
+                        enable-method = "spin-table";
+                        cpu-release-addr = <0 0x01f00100>;
+                };
+                cpu@2 {
+                        device_type = "cpu";
+                        model = "PowerPC,4xx"; // real CPU changed in sim
+                        reg = <2>;
+                        clock-frequency = <100000000>; // 100Mhz :-)
+                        timebase-frequency = <100000000>;
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                        status = "disabled";
+                        enable-method = "spin-table";
+                        cpu-release-addr = <0 0x01f00200>;
+                };
+                cpu@3 {
+                        device_type = "cpu";
+                        model = "PowerPC,4xx"; // real CPU changed in sim
+                        reg = <3>;
+                        clock-frequency = <100000000>; // 100Mhz :-)
+                        timebase-frequency = <100000000>;
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                        status = "disabled";
+                        enable-method = "spin-table";
+                        cpu-release-addr = <0 0x01f00300>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg =  <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
+
+        };
+
+        MPIC: interrupt-controller {
+                compatible = "chrp,open-pic";
+                interrupt-controller;
+                dcr-reg = <0xffc00000 0x00030000>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+
+        };
+
+        plb {
+                compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6, doesn't matter */
+                #address-cells = <2>;
+                #size-cells = <1>;
+                ranges;
+                clock-frequency = <0>; // Filled in by zImage
+
+                POB0: opb {
+                        compatible = "ibm,opb-4xx", "ibm,opb";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        /* Wish there was a nicer way of specifying a full 32-bit
+                           range */
+                        ranges = <0x00000000 0x00000001 0x00000000 0x80000000
+                                  0x80000000 0x00000001 0x80000000 0x80000000>;
+                        clock-frequency = <0>; // Filled in by zImage
+                        UART0: serial@40000200 {
+                                device_type = "serial";
+                                compatible = "ns16550a";
+                                reg = <0x40000200 0x00000008>;
+                                virtual-reg = <0xe0000200>;
+                                clock-frequency = <11059200>;
+                                current-speed = <115200>;
+                                interrupt-parent = <&MPIC>;
+                                interrupts = <0x0 0x2>;
+                        };
+                };
+        };
+
+        nvrtc {
+                compatible = "ds1743-nvram", "ds1743", "rtc-ds1743";
+                reg = <0 0xEF703000 0x2000>;
+        };
+        iss-block {
+                compatible = "ibm,iss-sim-block-device";
+                reg = <0 0xEF701000 0x1000>;
+        };
+
+        chosen {
+                linux,stdout-path = "/plb/opb/serial@40000200";
+        };
+};