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-rw-r--r--arch/powerpc/boot/dts/glacier.dts262
1 files changed, 132 insertions, 130 deletions
diff --git a/arch/powerpc/boot/dts/glacier.dts b/arch/powerpc/boot/dts/glacier.dts
index 0f2fc077d8db..24cf0dba120c 100644
--- a/arch/powerpc/boot/dts/glacier.dts
+++ b/arch/powerpc/boot/dts/glacier.dts
@@ -8,12 +8,14 @@
8 * any warranty of any kind, whether express or implied. 8 * any warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11/dts-v1/;
12
11/ { 13/ {
12 #address-cells = <2>; 14 #address-cells = <2>;
13 #size-cells = <1>; 15 #size-cells = <1>;
14 model = "amcc,glacier"; 16 model = "amcc,glacier";
15 compatible = "amcc,glacier", "amcc,canyonlands"; 17 compatible = "amcc,glacier", "amcc,canyonlands";
16 dcr-parent = <&/cpus/cpu@0>; 18 dcr-parent = <&{/cpus/cpu@0}>;
17 19
18 aliases { 20 aliases {
19 ethernet0 = &EMAC0; 21 ethernet0 = &EMAC0;
@@ -31,13 +33,13 @@
31 cpu@0 { 33 cpu@0 {
32 device_type = "cpu"; 34 device_type = "cpu";
33 model = "PowerPC,460GT"; 35 model = "PowerPC,460GT";
34 reg = <0>; 36 reg = <0x00000000>;
35 clock-frequency = <0>; /* Filled in by U-Boot */ 37 clock-frequency = <0>; /* Filled in by U-Boot */
36 timebase-frequency = <0>; /* Filled in by U-Boot */ 38 timebase-frequency = <0>; /* Filled in by U-Boot */
37 i-cache-line-size = <20>; 39 i-cache-line-size = <32>;
38 d-cache-line-size = <20>; 40 d-cache-line-size = <32>;
39 i-cache-size = <8000>; 41 i-cache-size = <32768>;
40 d-cache-size = <8000>; 42 d-cache-size = <32768>;
41 dcr-controller; 43 dcr-controller;
42 dcr-access-method = "native"; 44 dcr-access-method = "native";
43 }; 45 };
@@ -45,14 +47,14 @@
45 47
46 memory { 48 memory {
47 device_type = "memory"; 49 device_type = "memory";
48 reg = <0 0 0>; /* Filled in by U-Boot */ 50 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
49 }; 51 };
50 52
51 UIC0: interrupt-controller0 { 53 UIC0: interrupt-controller0 {
52 compatible = "ibm,uic-460gt","ibm,uic"; 54 compatible = "ibm,uic-460gt","ibm,uic";
53 interrupt-controller; 55 interrupt-controller;
54 cell-index = <0>; 56 cell-index = <0>;
55 dcr-reg = <0c0 009>; 57 dcr-reg = <0x0c0 0x009>;
56 #address-cells = <0>; 58 #address-cells = <0>;
57 #size-cells = <0>; 59 #size-cells = <0>;
58 #interrupt-cells = <2>; 60 #interrupt-cells = <2>;
@@ -62,11 +64,11 @@
62 compatible = "ibm,uic-460gt","ibm,uic"; 64 compatible = "ibm,uic-460gt","ibm,uic";
63 interrupt-controller; 65 interrupt-controller;
64 cell-index = <1>; 66 cell-index = <1>;
65 dcr-reg = <0d0 009>; 67 dcr-reg = <0x0d0 0x009>;
66 #address-cells = <0>; 68 #address-cells = <0>;
67 #size-cells = <0>; 69 #size-cells = <0>;
68 #interrupt-cells = <2>; 70 #interrupt-cells = <2>;
69 interrupts = <1e 4 1f 4>; /* cascade */ 71 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
70 interrupt-parent = <&UIC0>; 72 interrupt-parent = <&UIC0>;
71 }; 73 };
72 74
@@ -74,11 +76,11 @@
74 compatible = "ibm,uic-460gt","ibm,uic"; 76 compatible = "ibm,uic-460gt","ibm,uic";
75 interrupt-controller; 77 interrupt-controller;
76 cell-index = <2>; 78 cell-index = <2>;
77 dcr-reg = <0e0 009>; 79 dcr-reg = <0x0e0 0x009>;
78 #address-cells = <0>; 80 #address-cells = <0>;
79 #size-cells = <0>; 81 #size-cells = <0>;
80 #interrupt-cells = <2>; 82 #interrupt-cells = <2>;
81 interrupts = <a 4 b 4>; /* cascade */ 83 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
82 interrupt-parent = <&UIC0>; 84 interrupt-parent = <&UIC0>;
83 }; 85 };
84 86
@@ -86,22 +88,22 @@
86 compatible = "ibm,uic-460gt","ibm,uic"; 88 compatible = "ibm,uic-460gt","ibm,uic";
87 interrupt-controller; 89 interrupt-controller;
88 cell-index = <3>; 90 cell-index = <3>;
89 dcr-reg = <0f0 009>; 91 dcr-reg = <0x0f0 0x009>;
90 #address-cells = <0>; 92 #address-cells = <0>;
91 #size-cells = <0>; 93 #size-cells = <0>;
92 #interrupt-cells = <2>; 94 #interrupt-cells = <2>;
93 interrupts = <10 4 11 4>; /* cascade */ 95 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
94 interrupt-parent = <&UIC0>; 96 interrupt-parent = <&UIC0>;
95 }; 97 };
96 98
97 SDR0: sdr { 99 SDR0: sdr {
98 compatible = "ibm,sdr-460gt"; 100 compatible = "ibm,sdr-460gt";
99 dcr-reg = <00e 002>; 101 dcr-reg = <0x00e 0x002>;
100 }; 102 };
101 103
102 CPR0: cpr { 104 CPR0: cpr {
103 compatible = "ibm,cpr-460gt"; 105 compatible = "ibm,cpr-460gt";
104 dcr-reg = <00c 002>; 106 dcr-reg = <0x00c 0x002>;
105 }; 107 };
106 108
107 plb { 109 plb {
@@ -113,75 +115,75 @@
113 115
114 SDRAM0: sdram { 116 SDRAM0: sdram {
115 compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; 117 compatible = "ibm,sdram-460gt", "ibm,sdram-405gp";
116 dcr-reg = <010 2>; 118 dcr-reg = <0x010 0x002>;
117 }; 119 };
118 120
119 MAL0: mcmal { 121 MAL0: mcmal {
120 compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; 122 compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
121 dcr-reg = <180 62>; 123 dcr-reg = <0x180 0x062>;
122 num-tx-chans = <4>; 124 num-tx-chans = <4>;
123 num-rx-chans = <20>; 125 num-rx-chans = <32>;
124 #address-cells = <0>; 126 #address-cells = <0>;
125 #size-cells = <0>; 127 #size-cells = <0>;
126 interrupt-parent = <&UIC2>; 128 interrupt-parent = <&UIC2>;
127 interrupts = < /*TXEOB*/ 6 4 129 interrupts = < /*TXEOB*/ 0x6 0x4
128 /*RXEOB*/ 7 4 130 /*RXEOB*/ 0x7 0x4
129 /*SERR*/ 3 4 131 /*SERR*/ 0x3 0x4
130 /*TXDE*/ 4 4 132 /*TXDE*/ 0x4 0x4
131 /*RXDE*/ 5 4>; 133 /*RXDE*/ 0x5 0x4>;
132 desc-base-addr-high = <8>; 134 desc-base-addr-high = <0x8>;
133 }; 135 };
134 136
135 POB0: opb { 137 POB0: opb {
136 compatible = "ibm,opb-460gt", "ibm,opb"; 138 compatible = "ibm,opb-460gt", "ibm,opb";
137 #address-cells = <1>; 139 #address-cells = <1>;
138 #size-cells = <1>; 140 #size-cells = <1>;
139 ranges = <b0000000 4 b0000000 50000000>; 141 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
140 clock-frequency = <0>; /* Filled in by U-Boot */ 142 clock-frequency = <0>; /* Filled in by U-Boot */
141 143
142 EBC0: ebc { 144 EBC0: ebc {
143 compatible = "ibm,ebc-460gt", "ibm,ebc"; 145 compatible = "ibm,ebc-460gt", "ibm,ebc";
144 dcr-reg = <012 2>; 146 dcr-reg = <0x012 0x002>;
145 #address-cells = <2>; 147 #address-cells = <2>;
146 #size-cells = <1>; 148 #size-cells = <1>;
147 clock-frequency = <0>; /* Filled in by U-Boot */ 149 clock-frequency = <0>; /* Filled in by U-Boot */
148 /* ranges property is supplied by U-Boot */ 150 /* ranges property is supplied by U-Boot */
149 interrupts = <6 4>; 151 interrupts = <0x6 0x4>;
150 interrupt-parent = <&UIC1>; 152 interrupt-parent = <&UIC1>;
151 153
152 nor_flash@0,0 { 154 nor_flash@0,0 {
153 compatible = "amd,s29gl512n", "cfi-flash"; 155 compatible = "amd,s29gl512n", "cfi-flash";
154 bank-width = <2>; 156 bank-width = <2>;
155 reg = <0 000000 4000000>; 157 reg = <0x00000000 0x00000000 0x04000000>;
156 #address-cells = <1>; 158 #address-cells = <1>;
157 #size-cells = <1>; 159 #size-cells = <1>;
158 partition@0 { 160 partition@0 {
159 label = "kernel"; 161 label = "kernel";
160 reg = <0 1e0000>; 162 reg = <0x00000000 0x001e0000>;
161 }; 163 };
162 partition@1e0000 { 164 partition@1e0000 {
163 label = "dtb"; 165 label = "dtb";
164 reg = <1e0000 20000>; 166 reg = <0x001e0000 0x00020000>;
165 }; 167 };
166 partition@200000 { 168 partition@200000 {
167 label = "ramdisk"; 169 label = "ramdisk";
168 reg = <200000 1400000>; 170 reg = <0x00200000 0x01400000>;
169 }; 171 };
170 partition@1600000 { 172 partition@1600000 {
171 label = "jffs2"; 173 label = "jffs2";
172 reg = <1600000 400000>; 174 reg = <0x01600000 0x00400000>;
173 }; 175 };
174 partition@1a00000 { 176 partition@1a00000 {
175 label = "user"; 177 label = "user";
176 reg = <1a00000 2560000>; 178 reg = <0x01a00000 0x02560000>;
177 }; 179 };
178 partition@3f60000 { 180 partition@3f60000 {
179 label = "env"; 181 label = "env";
180 reg = <3f60000 40000>; 182 reg = <0x03f60000 0x00040000>;
181 }; 183 };
182 partition@3fa0000 { 184 partition@3fa0000 {
183 label = "u-boot"; 185 label = "u-boot";
184 reg = <3fa0000 60000>; 186 reg = <0x03fa0000 0x00060000>;
185 }; 187 };
186 }; 188 };
187 }; 189 };
@@ -189,109 +191,109 @@
189 UART0: serial@ef600300 { 191 UART0: serial@ef600300 {
190 device_type = "serial"; 192 device_type = "serial";
191 compatible = "ns16550"; 193 compatible = "ns16550";
192 reg = <ef600300 8>; 194 reg = <0xef600300 0x00000008>;
193 virtual-reg = <ef600300>; 195 virtual-reg = <0xef600300>;
194 clock-frequency = <0>; /* Filled in by U-Boot */ 196 clock-frequency = <0>; /* Filled in by U-Boot */
195 current-speed = <0>; /* Filled in by U-Boot */ 197 current-speed = <0>; /* Filled in by U-Boot */
196 interrupt-parent = <&UIC1>; 198 interrupt-parent = <&UIC1>;
197 interrupts = <1 4>; 199 interrupts = <0x1 0x4>;
198 }; 200 };
199 201
200 UART1: serial@ef600400 { 202 UART1: serial@ef600400 {
201 device_type = "serial"; 203 device_type = "serial";
202 compatible = "ns16550"; 204 compatible = "ns16550";
203 reg = <ef600400 8>; 205 reg = <0xef600400 0x00000008>;
204 virtual-reg = <ef600400>; 206 virtual-reg = <0xef600400>;
205 clock-frequency = <0>; /* Filled in by U-Boot */ 207 clock-frequency = <0>; /* Filled in by U-Boot */
206 current-speed = <0>; /* Filled in by U-Boot */ 208 current-speed = <0>; /* Filled in by U-Boot */
207 interrupt-parent = <&UIC0>; 209 interrupt-parent = <&UIC0>;
208 interrupts = <1 4>; 210 interrupts = <0x1 0x4>;
209 }; 211 };
210 212
211 UART2: serial@ef600500 { 213 UART2: serial@ef600500 {
212 device_type = "serial"; 214 device_type = "serial";
213 compatible = "ns16550"; 215 compatible = "ns16550";
214 reg = <ef600500 8>; 216 reg = <0xef600500 0x00000008>;
215 virtual-reg = <ef600500>; 217 virtual-reg = <0xef600500>;
216 clock-frequency = <0>; /* Filled in by U-Boot */ 218 clock-frequency = <0>; /* Filled in by U-Boot */
217 current-speed = <0>; /* Filled in by U-Boot */ 219 current-speed = <0>; /* Filled in by U-Boot */
218 interrupt-parent = <&UIC1>; 220 interrupt-parent = <&UIC1>;
219 interrupts = <1d 4>; 221 interrupts = <0x1d 0x4>;
220 }; 222 };
221 223
222 UART3: serial@ef600600 { 224 UART3: serial@ef600600 {
223 device_type = "serial"; 225 device_type = "serial";
224 compatible = "ns16550"; 226 compatible = "ns16550";
225 reg = <ef600600 8>; 227 reg = <0xef600600 0x00000008>;
226 virtual-reg = <ef600600>; 228 virtual-reg = <0xef600600>;
227 clock-frequency = <0>; /* Filled in by U-Boot */ 229 clock-frequency = <0>; /* Filled in by U-Boot */
228 current-speed = <0>; /* Filled in by U-Boot */ 230 current-speed = <0>; /* Filled in by U-Boot */
229 interrupt-parent = <&UIC1>; 231 interrupt-parent = <&UIC1>;
230 interrupts = <1e 4>; 232 interrupts = <0x1e 0x4>;
231 }; 233 };
232 234
233 IIC0: i2c@ef600700 { 235 IIC0: i2c@ef600700 {
234 compatible = "ibm,iic-460gt", "ibm,iic"; 236 compatible = "ibm,iic-460gt", "ibm,iic";
235 reg = <ef600700 14>; 237 reg = <0xef600700 0x00000014>;
236 interrupt-parent = <&UIC0>; 238 interrupt-parent = <&UIC0>;
237 interrupts = <2 4>; 239 interrupts = <0x2 0x4>;
238 }; 240 };
239 241
240 IIC1: i2c@ef600800 { 242 IIC1: i2c@ef600800 {
241 compatible = "ibm,iic-460gt", "ibm,iic"; 243 compatible = "ibm,iic-460gt", "ibm,iic";
242 reg = <ef600800 14>; 244 reg = <0xef600800 0x00000014>;
243 interrupt-parent = <&UIC0>; 245 interrupt-parent = <&UIC0>;
244 interrupts = <3 4>; 246 interrupts = <0x3 0x4>;
245 }; 247 };
246 248
247 ZMII0: emac-zmii@ef600d00 { 249 ZMII0: emac-zmii@ef600d00 {
248 compatible = "ibm,zmii-460gt", "ibm,zmii"; 250 compatible = "ibm,zmii-460gt", "ibm,zmii";
249 reg = <ef600d00 c>; 251 reg = <0xef600d00 0x0000000c>;
250 }; 252 };
251 253
252 RGMII0: emac-rgmii@ef601500 { 254 RGMII0: emac-rgmii@ef601500 {
253 compatible = "ibm,rgmii-460gt", "ibm,rgmii"; 255 compatible = "ibm,rgmii-460gt", "ibm,rgmii";
254 reg = <ef601500 8>; 256 reg = <0xef601500 0x00000008>;
255 has-mdio; 257 has-mdio;
256 }; 258 };
257 259
258 RGMII1: emac-rgmii@ef601600 { 260 RGMII1: emac-rgmii@ef601600 {
259 compatible = "ibm,rgmii-460gt", "ibm,rgmii"; 261 compatible = "ibm,rgmii-460gt", "ibm,rgmii";
260 reg = <ef601600 8>; 262 reg = <0xef601600 0x00000008>;
261 has-mdio; 263 has-mdio;
262 }; 264 };
263 265
264 TAH0: emac-tah@ef601350 { 266 TAH0: emac-tah@ef601350 {
265 compatible = "ibm,tah-460gt", "ibm,tah"; 267 compatible = "ibm,tah-460gt", "ibm,tah";
266 reg = <ef601350 30>; 268 reg = <0xef601350 0x00000030>;
267 }; 269 };
268 270
269 TAH1: emac-tah@ef601450 { 271 TAH1: emac-tah@ef601450 {
270 compatible = "ibm,tah-460gt", "ibm,tah"; 272 compatible = "ibm,tah-460gt", "ibm,tah";
271 reg = <ef601450 30>; 273 reg = <0xef601450 0x00000030>;
272 }; 274 };
273 275
274 EMAC0: ethernet@ef600e00 { 276 EMAC0: ethernet@ef600e00 {
275 device_type = "network"; 277 device_type = "network";
276 compatible = "ibm,emac-460gt", "ibm,emac4"; 278 compatible = "ibm,emac-460gt", "ibm,emac4";
277 interrupt-parent = <&EMAC0>; 279 interrupt-parent = <&EMAC0>;
278 interrupts = <0 1>; 280 interrupts = <0x0 0x1>;
279 #interrupt-cells = <1>; 281 #interrupt-cells = <1>;
280 #address-cells = <0>; 282 #address-cells = <0>;
281 #size-cells = <0>; 283 #size-cells = <0>;
282 interrupt-map = </*Status*/ 0 &UIC2 10 4 284 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
283 /*Wake*/ 1 &UIC2 14 4>; 285 /*Wake*/ 0x1 &UIC2 0x14 0x4>;
284 reg = <ef600e00 70>; 286 reg = <0xef600e00 0x00000074>;
285 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 287 local-mac-address = [000000000000]; /* Filled in by U-Boot */
286 mal-device = <&MAL0>; 288 mal-device = <&MAL0>;
287 mal-tx-channel = <0>; 289 mal-tx-channel = <0>;
288 mal-rx-channel = <0>; 290 mal-rx-channel = <0>;
289 cell-index = <0>; 291 cell-index = <0>;
290 max-frame-size = <2328>; 292 max-frame-size = <9000>;
291 rx-fifo-size = <1000>; 293 rx-fifo-size = <4096>;
292 tx-fifo-size = <800>; 294 tx-fifo-size = <2048>;
293 phy-mode = "rgmii"; 295 phy-mode = "rgmii";
294 phy-map = <00000000>; 296 phy-map = <0x00000000>;
295 rgmii-device = <&RGMII0>; 297 rgmii-device = <&RGMII0>;
296 rgmii-channel = <0>; 298 rgmii-channel = <0>;
297 tah-device = <&TAH0>; 299 tah-device = <&TAH0>;
@@ -304,23 +306,23 @@
304 device_type = "network"; 306 device_type = "network";
305 compatible = "ibm,emac-460gt", "ibm,emac4"; 307 compatible = "ibm,emac-460gt", "ibm,emac4";
306 interrupt-parent = <&EMAC1>; 308 interrupt-parent = <&EMAC1>;
307 interrupts = <0 1>; 309 interrupts = <0x0 0x1>;
308 #interrupt-cells = <1>; 310 #interrupt-cells = <1>;
309 #address-cells = <0>; 311 #address-cells = <0>;
310 #size-cells = <0>; 312 #size-cells = <0>;
311 interrupt-map = </*Status*/ 0 &UIC2 11 4 313 interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
312 /*Wake*/ 1 &UIC2 15 4>; 314 /*Wake*/ 0x1 &UIC2 0x15 0x4>;
313 reg = <ef600f00 70>; 315 reg = <0xef600f00 0x00000074>;
314 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 316 local-mac-address = [000000000000]; /* Filled in by U-Boot */
315 mal-device = <&MAL0>; 317 mal-device = <&MAL0>;
316 mal-tx-channel = <1>; 318 mal-tx-channel = <1>;
317 mal-rx-channel = <8>; 319 mal-rx-channel = <8>;
318 cell-index = <1>; 320 cell-index = <1>;
319 max-frame-size = <2328>; 321 max-frame-size = <9000>;
320 rx-fifo-size = <1000>; 322 rx-fifo-size = <4096>;
321 tx-fifo-size = <800>; 323 tx-fifo-size = <2048>;
322 phy-mode = "rgmii"; 324 phy-mode = "rgmii";
323 phy-map = <00000000>; 325 phy-map = <0x00000000>;
324 rgmii-device = <&RGMII0>; 326 rgmii-device = <&RGMII0>;
325 rgmii-channel = <1>; 327 rgmii-channel = <1>;
326 tah-device = <&TAH1>; 328 tah-device = <&TAH1>;
@@ -334,23 +336,23 @@
334 device_type = "network"; 336 device_type = "network";
335 compatible = "ibm,emac-460gt", "ibm,emac4"; 337 compatible = "ibm,emac-460gt", "ibm,emac4";
336 interrupt-parent = <&EMAC2>; 338 interrupt-parent = <&EMAC2>;
337 interrupts = <0 1>; 339 interrupts = <0x0 0x1>;
338 #interrupt-cells = <1>; 340 #interrupt-cells = <1>;
339 #address-cells = <0>; 341 #address-cells = <0>;
340 #size-cells = <0>; 342 #size-cells = <0>;
341 interrupt-map = </*Status*/ 0 &UIC2 12 4 343 interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4
342 /*Wake*/ 1 &UIC2 16 4>; 344 /*Wake*/ 0x1 &UIC2 0x16 0x4>;
343 reg = <ef601100 70>; 345 reg = <0xef601100 0x00000074>;
344 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 346 local-mac-address = [000000000000]; /* Filled in by U-Boot */
345 mal-device = <&MAL0>; 347 mal-device = <&MAL0>;
346 mal-tx-channel = <2>; 348 mal-tx-channel = <2>;
347 mal-rx-channel = <10>; 349 mal-rx-channel = <16>;
348 cell-index = <2>; 350 cell-index = <2>;
349 max-frame-size = <2328>; 351 max-frame-size = <9000>;
350 rx-fifo-size = <1000>; 352 rx-fifo-size = <4096>;
351 tx-fifo-size = <800>; 353 tx-fifo-size = <2048>;
352 phy-mode = "rgmii"; 354 phy-mode = "rgmii";
353 phy-map = <00000000>; 355 phy-map = <0x00000000>;
354 rgmii-device = <&RGMII1>; 356 rgmii-device = <&RGMII1>;
355 rgmii-channel = <0>; 357 rgmii-channel = <0>;
356 has-inverted-stacr-oc; 358 has-inverted-stacr-oc;
@@ -362,23 +364,23 @@
362 device_type = "network"; 364 device_type = "network";
363 compatible = "ibm,emac-460gt", "ibm,emac4"; 365 compatible = "ibm,emac-460gt", "ibm,emac4";
364 interrupt-parent = <&EMAC3>; 366 interrupt-parent = <&EMAC3>;
365 interrupts = <0 1>; 367 interrupts = <0x0 0x1>;
366 #interrupt-cells = <1>; 368 #interrupt-cells = <1>;
367 #address-cells = <0>; 369 #address-cells = <0>;
368 #size-cells = <0>; 370 #size-cells = <0>;
369 interrupt-map = </*Status*/ 0 &UIC2 13 4 371 interrupt-map = </*Status*/ 0x0 &UIC2 0x13 0x4
370 /*Wake*/ 1 &UIC2 17 4>; 372 /*Wake*/ 0x1 &UIC2 0x17 0x4>;
371 reg = <ef601200 70>; 373 reg = <0xef601200 0x00000074>;
372 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 374 local-mac-address = [000000000000]; /* Filled in by U-Boot */
373 mal-device = <&MAL0>; 375 mal-device = <&MAL0>;
374 mal-tx-channel = <3>; 376 mal-tx-channel = <3>;
375 mal-rx-channel = <18>; 377 mal-rx-channel = <24>;
376 cell-index = <3>; 378 cell-index = <3>;
377 max-frame-size = <2328>; 379 max-frame-size = <9000>;
378 rx-fifo-size = <1000>; 380 rx-fifo-size = <4096>;
379 tx-fifo-size = <800>; 381 tx-fifo-size = <2048>;
380 phy-mode = "rgmii"; 382 phy-mode = "rgmii";
381 phy-map = <00000000>; 383 phy-map = <0x00000000>;
382 rgmii-device = <&RGMII1>; 384 rgmii-device = <&RGMII1>;
383 rgmii-channel = <1>; 385 rgmii-channel = <1>;
384 has-inverted-stacr-oc; 386 has-inverted-stacr-oc;
@@ -396,27 +398,27 @@
396 primary; 398 primary;
397 large-inbound-windows; 399 large-inbound-windows;
398 enable-msi-hole; 400 enable-msi-hole;
399 reg = <c 0ec00000 8 /* Config space access */ 401 reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
400 0 0 0 /* no IACK cycles */ 402 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
401 c 0ed00000 4 /* Special cycles */ 403 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
402 c 0ec80000 100 /* Internal registers */ 404 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
403 c 0ec80100 fc>; /* Internal messaging registers */ 405 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
404 406
405 /* Outbound ranges, one memory and one IO, 407 /* Outbound ranges, one memory and one IO,
406 * later cannot be changed 408 * later cannot be changed
407 */ 409 */
408 ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 410 ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
409 01000000 0 00000000 0000000c 08000000 0 00010000>; 411 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
410 412
411 /* Inbound 2GB range starting at 0 */ 413 /* Inbound 2GB range starting at 0 */
412 dma-ranges = <42000000 0 0 0 0 0 80000000>; 414 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
413 415
414 /* This drives busses 0 to 0x3f */ 416 /* This drives busses 0 to 0x3f */
415 bus-range = <0 3f>; 417 bus-range = <0x0 0x3f>;
416 418
417 /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ 419 /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
418 interrupt-map-mask = <0000 0 0 0>; 420 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
419 interrupt-map = < 0000 0 0 0 &UIC1 0 8 >; 421 interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >;
420 }; 422 };
421 423
422 PCIE0: pciex@d00000000 { 424 PCIE0: pciex@d00000000 {
@@ -426,23 +428,23 @@
426 #address-cells = <3>; 428 #address-cells = <3>;
427 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; 429 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
428 primary; 430 primary;
429 port = <0>; /* port number */ 431 port = <0x0>; /* port number */
430 reg = <d 00000000 20000000 /* Config space access */ 432 reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
431 c 08010000 00001000>; /* Registers */ 433 0x0000000c 0x08010000 0x00001000>; /* Registers */
432 dcr-reg = <100 020>; 434 dcr-reg = <0x100 0x020>;
433 sdr-base = <300>; 435 sdr-base = <0x300>;
434 436
435 /* Outbound ranges, one memory and one IO, 437 /* Outbound ranges, one memory and one IO,
436 * later cannot be changed 438 * later cannot be changed
437 */ 439 */
438 ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 440 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
439 01000000 0 00000000 0000000f 80000000 0 00010000>; 441 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
440 442
441 /* Inbound 2GB range starting at 0 */ 443 /* Inbound 2GB range starting at 0 */
442 dma-ranges = <42000000 0 0 0 0 0 80000000>; 444 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
443 445
444 /* This drives busses 40 to 0x7f */ 446 /* This drives busses 40 to 0x7f */
445 bus-range = <40 7f>; 447 bus-range = <0x40 0x7f>;
446 448
447 /* Legacy interrupts (note the weird polarity, the bridge seems 449 /* Legacy interrupts (note the weird polarity, the bridge seems
448 * to invert PCIe legacy interrupts). 450 * to invert PCIe legacy interrupts).
@@ -452,12 +454,12 @@
452 * below are basically de-swizzled numbers. 454 * below are basically de-swizzled numbers.
453 * The real slot is on idsel 0, so the swizzling is 1:1 455 * The real slot is on idsel 0, so the swizzling is 1:1
454 */ 456 */
455 interrupt-map-mask = <0000 0 0 7>; 457 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
456 interrupt-map = < 458 interrupt-map = <
457 0000 0 0 1 &UIC3 c 4 /* swizzled int A */ 459 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
458 0000 0 0 2 &UIC3 d 4 /* swizzled int B */ 460 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
459 0000 0 0 3 &UIC3 e 4 /* swizzled int C */ 461 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
460 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>; 462 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
461 }; 463 };
462 464
463 PCIE1: pciex@d20000000 { 465 PCIE1: pciex@d20000000 {
@@ -467,23 +469,23 @@
467 #address-cells = <3>; 469 #address-cells = <3>;
468 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; 470 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
469 primary; 471 primary;
470 port = <1>; /* port number */ 472 port = <0x1>; /* port number */
471 reg = <d 20000000 20000000 /* Config space access */ 473 reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
472 c 08011000 00001000>; /* Registers */ 474 0x0000000c 0x08011000 0x00001000>; /* Registers */
473 dcr-reg = <120 020>; 475 dcr-reg = <0x120 0x020>;
474 sdr-base = <340>; 476 sdr-base = <0x340>;
475 477
476 /* Outbound ranges, one memory and one IO, 478 /* Outbound ranges, one memory and one IO,
477 * later cannot be changed 479 * later cannot be changed
478 */ 480 */
479 ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 481 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
480 01000000 0 00000000 0000000f 80010000 0 00010000>; 482 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
481 483
482 /* Inbound 2GB range starting at 0 */ 484 /* Inbound 2GB range starting at 0 */
483 dma-ranges = <42000000 0 0 0 0 0 80000000>; 485 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
484 486
485 /* This drives busses 80 to 0xbf */ 487 /* This drives busses 80 to 0xbf */
486 bus-range = <80 bf>; 488 bus-range = <0x80 0xbf>;
487 489
488 /* Legacy interrupts (note the weird polarity, the bridge seems 490 /* Legacy interrupts (note the weird polarity, the bridge seems
489 * to invert PCIe legacy interrupts). 491 * to invert PCIe legacy interrupts).
@@ -493,12 +495,12 @@
493 * below are basically de-swizzled numbers. 495 * below are basically de-swizzled numbers.
494 * The real slot is on idsel 0, so the swizzling is 1:1 496 * The real slot is on idsel 0, so the swizzling is 1:1
495 */ 497 */
496 interrupt-map-mask = <0000 0 0 7>; 498 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
497 interrupt-map = < 499 interrupt-map = <
498 0000 0 0 1 &UIC3 10 4 /* swizzled int A */ 500 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */
499 0000 0 0 2 &UIC3 11 4 /* swizzled int B */ 501 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */
500 0000 0 0 3 &UIC3 12 4 /* swizzled int C */ 502 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */
501 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>; 503 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>;
502 }; 504 };
503 }; 505 };
504}; 506};
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 15:02:57 -0500