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-rw-r--r--arch/powerpc/boot/dts/cm5200.dts98
1 files changed, 47 insertions, 51 deletions
diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts
index c6ca6319e4f7..2f74cc4e093e 100644
--- a/arch/powerpc/boot/dts/cm5200.dts
+++ b/arch/powerpc/boot/dts/cm5200.dts
@@ -10,11 +10,7 @@
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13/* 13/dts-v1/;
14 * WARNING: Do not depend on this tree layout remaining static just yet.
15 * The MPC5200 device tree conventions are still in flux
16 * Keep an eye on the linuxppc-dev mailing list for more details
17 */
18 14
19/ { 15/ {
20 model = "schindler,cm5200"; 16 model = "schindler,cm5200";
@@ -29,10 +25,10 @@
29 PowerPC,5200@0 { 25 PowerPC,5200@0 {
30 device_type = "cpu"; 26 device_type = "cpu";
31 reg = <0>; 27 reg = <0>;
32 d-cache-line-size = <20>; 28 d-cache-line-size = <32>;
33 i-cache-line-size = <20>; 29 i-cache-line-size = <32>;
34 d-cache-size = <4000>; // L1, 16K 30 d-cache-size = <0x4000>; // L1, 16K
35 i-cache-size = <4000>; // L1, 16K 31 i-cache-size = <0x4000>; // L1, 16K
36 timebase-frequency = <0>; // from bootloader 32 timebase-frequency = <0>; // from bootloader
37 bus-frequency = <0>; // from bootloader 33 bus-frequency = <0>; // from bootloader
38 clock-frequency = <0>; // from bootloader 34 clock-frequency = <0>; // from bootloader
@@ -41,34 +37,34 @@
41 37
42 memory { 38 memory {
43 device_type = "memory"; 39 device_type = "memory";
44 reg = <00000000 04000000>; // 64MB 40 reg = <0x00000000 0x04000000>; // 64MB
45 }; 41 };
46 42
47 soc5200@f0000000 { 43 soc5200@f0000000 {
48 #address-cells = <1>; 44 #address-cells = <1>;
49 #size-cells = <1>; 45 #size-cells = <1>;
50 compatible = "fsl,mpc5200b-immr"; 46 compatible = "fsl,mpc5200b-immr";
51 ranges = <0 f0000000 0000c000>; 47 ranges = <0 0xf0000000 0x0000c000>;
52 reg = <f0000000 00000100>; 48 reg = <0xf0000000 0x00000100>;
53 bus-frequency = <0>; // from bootloader 49 bus-frequency = <0>; // from bootloader
54 system-frequency = <0>; // from bootloader 50 system-frequency = <0>; // from bootloader
55 51
56 cdm@200 { 52 cdm@200 {
57 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; 53 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
58 reg = <200 38>; 54 reg = <0x200 0x38>;
59 }; 55 };
60 56
61 mpc5200_pic: pic@500 { 57 mpc5200_pic: interrupt-controller@500 {
62 // 5200 interrupts are encoded into two levels; 58 // 5200 interrupts are encoded into two levels;
63 interrupt-controller; 59 interrupt-controller;
64 #interrupt-cells = <3>; 60 #interrupt-cells = <3>;
65 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; 61 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
66 reg = <500 80>; 62 reg = <0x500 0x80>;
67 }; 63 };
68 64
69 timer@600 { // General Purpose Timer 65 timer@600 { // General Purpose Timer
70 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 66 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
71 reg = <600 10>; 67 reg = <0x600 0x10>;
72 interrupts = <1 9 0>; 68 interrupts = <1 9 0>;
73 interrupt-parent = <&mpc5200_pic>; 69 interrupt-parent = <&mpc5200_pic>;
74 fsl,has-wdt; 70 fsl,has-wdt;
@@ -76,108 +72,108 @@
76 72
77 timer@610 { // General Purpose Timer 73 timer@610 { // General Purpose Timer
78 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 74 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
79 reg = <610 10>; 75 reg = <0x610 0x10>;
80 interrupts = <1 a 0>; 76 interrupts = <1 10 0>;
81 interrupt-parent = <&mpc5200_pic>; 77 interrupt-parent = <&mpc5200_pic>;
82 }; 78 };
83 79
84 timer@620 { // General Purpose Timer 80 timer@620 { // General Purpose Timer
85 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 81 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
86 reg = <620 10>; 82 reg = <0x620 0x10>;
87 interrupts = <1 b 0>; 83 interrupts = <1 11 0>;
88 interrupt-parent = <&mpc5200_pic>; 84 interrupt-parent = <&mpc5200_pic>;
89 }; 85 };
90 86
91 timer@630 { // General Purpose Timer 87 timer@630 { // General Purpose Timer
92 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 88 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
93 reg = <630 10>; 89 reg = <0x630 0x10>;
94 interrupts = <1 c 0>; 90 interrupts = <1 12 0>;
95 interrupt-parent = <&mpc5200_pic>; 91 interrupt-parent = <&mpc5200_pic>;
96 }; 92 };
97 93
98 timer@640 { // General Purpose Timer 94 timer@640 { // General Purpose Timer
99 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 95 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
100 reg = <640 10>; 96 reg = <0x640 0x10>;
101 interrupts = <1 d 0>; 97 interrupts = <1 13 0>;
102 interrupt-parent = <&mpc5200_pic>; 98 interrupt-parent = <&mpc5200_pic>;
103 }; 99 };
104 100
105 timer@650 { // General Purpose Timer 101 timer@650 { // General Purpose Timer
106 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 102 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
107 reg = <650 10>; 103 reg = <0x650 0x10>;
108 interrupts = <1 e 0>; 104 interrupts = <1 14 0>;
109 interrupt-parent = <&mpc5200_pic>; 105 interrupt-parent = <&mpc5200_pic>;
110 }; 106 };
111 107
112 timer@660 { // General Purpose Timer 108 timer@660 { // General Purpose Timer
113 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 109 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
114 reg = <660 10>; 110 reg = <0x660 0x10>;
115 interrupts = <1 f 0>; 111 interrupts = <1 15 0>;
116 interrupt-parent = <&mpc5200_pic>; 112 interrupt-parent = <&mpc5200_pic>;
117 }; 113 };
118 114
119 timer@670 { // General Purpose Timer 115 timer@670 { // General Purpose Timer
120 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 116 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
121 reg = <670 10>; 117 reg = <0x670 0x10>;
122 interrupts = <1 10 0>; 118 interrupts = <1 16 0>;
123 interrupt-parent = <&mpc5200_pic>; 119 interrupt-parent = <&mpc5200_pic>;
124 }; 120 };
125 121
126 rtc@800 { // Real time clock 122 rtc@800 { // Real time clock
127 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; 123 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
128 reg = <800 100>; 124 reg = <0x800 0x100>;
129 interrupts = <1 5 0 1 6 0>; 125 interrupts = <1 5 0 1 6 0>;
130 interrupt-parent = <&mpc5200_pic>; 126 interrupt-parent = <&mpc5200_pic>;
131 }; 127 };
132 128
133 gpio@b00 { 129 gpio@b00 {
134 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; 130 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
135 reg = <b00 40>; 131 reg = <0xb00 0x40>;
136 interrupts = <1 7 0>; 132 interrupts = <1 7 0>;
137 interrupt-parent = <&mpc5200_pic>; 133 interrupt-parent = <&mpc5200_pic>;
138 }; 134 };
139 135
140 gpio@c00 { 136 gpio@c00 {
141 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; 137 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
142 reg = <c00 40>; 138 reg = <0xc00 0x40>;
143 interrupts = <1 8 0 0 3 0>; 139 interrupts = <1 8 0 0 3 0>;
144 interrupt-parent = <&mpc5200_pic>; 140 interrupt-parent = <&mpc5200_pic>;
145 }; 141 };
146 142
147 spi@f00 { 143 spi@f00 {
148 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; 144 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
149 reg = <f00 20>; 145 reg = <0xf00 0x20>;
150 interrupts = <2 d 0 2 e 0>; 146 interrupts = <2 13 0 2 14 0>;
151 interrupt-parent = <&mpc5200_pic>; 147 interrupt-parent = <&mpc5200_pic>;
152 }; 148 };
153 149
154 usb@1000 { 150 usb@1000 {
155 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; 151 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
156 reg = <1000 ff>; 152 reg = <0x1000 0xff>;
157 interrupts = <2 6 0>; 153 interrupts = <2 6 0>;
158 interrupt-parent = <&mpc5200_pic>; 154 interrupt-parent = <&mpc5200_pic>;
159 }; 155 };
160 156
161 dma-controller@1200 { 157 dma-controller@1200 {
162 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; 158 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
163 reg = <1200 80>; 159 reg = <0x1200 0x80>;
164 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 160 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
165 3 4 0 3 5 0 3 6 0 3 7 0 161 3 4 0 3 5 0 3 6 0 3 7 0
166 3 8 0 3 9 0 3 a 0 3 b 0 162 3 8 0 3 9 0 3 10 0 3 11 0
167 3 c 0 3 d 0 3 e 0 3 f 0>; 163 3 12 0 3 13 0 3 14 0 3 15 0>;
168 interrupt-parent = <&mpc5200_pic>; 164 interrupt-parent = <&mpc5200_pic>;
169 }; 165 };
170 166
171 xlb@1f00 { 167 xlb@1f00 {
172 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb"; 168 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
173 reg = <1f00 100>; 169 reg = <0x1f00 0x100>;
174 }; 170 };
175 171
176 serial@2000 { // PSC1 172 serial@2000 { // PSC1
177 device_type = "serial"; 173 device_type = "serial";
178 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 174 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
179 port-number = <0>; // Logical port assignment 175 port-number = <0>; // Logical port assignment
180 reg = <2000 100>; 176 reg = <0x2000 0x100>;
181 interrupts = <2 1 0>; 177 interrupts = <2 1 0>;
182 interrupt-parent = <&mpc5200_pic>; 178 interrupt-parent = <&mpc5200_pic>;
183 }; 179 };
@@ -186,7 +182,7 @@
186 device_type = "serial"; 182 device_type = "serial";
187 compatible = "fsl,mpc5200-psc-uart"; 183 compatible = "fsl,mpc5200-psc-uart";
188 port-number = <1>; // Logical port assignment 184 port-number = <1>; // Logical port assignment
189 reg = <2200 100>; 185 reg = <0x2200 0x100>;
190 interrupts = <2 2 0>; 186 interrupts = <2 2 0>;
191 interrupt-parent = <&mpc5200_pic>; 187 interrupt-parent = <&mpc5200_pic>;
192 }; 188 };
@@ -195,7 +191,7 @@
195 device_type = "serial"; 191 device_type = "serial";
196 compatible = "fsl,mpc5200-psc-uart"; 192 compatible = "fsl,mpc5200-psc-uart";
197 port-number = <2>; // Logical port assignment 193 port-number = <2>; // Logical port assignment
198 reg = <2400 100>; 194 reg = <0x2400 0x100>;
199 interrupts = <2 3 0>; 195 interrupts = <2 3 0>;
200 interrupt-parent = <&mpc5200_pic>; 196 interrupt-parent = <&mpc5200_pic>;
201 }; 197 };
@@ -204,7 +200,7 @@
204 device_type = "serial"; 200 device_type = "serial";
205 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 201 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
206 port-number = <5>; // Logical port assignment 202 port-number = <5>; // Logical port assignment
207 reg = <2c00 100>; 203 reg = <0x2c00 0x100>;
208 interrupts = <2 4 0>; 204 interrupts = <2 4 0>;
209 interrupt-parent = <&mpc5200_pic>; 205 interrupt-parent = <&mpc5200_pic>;
210 }; 206 };
@@ -212,7 +208,7 @@
212 ethernet@3000 { 208 ethernet@3000 {
213 device_type = "network"; 209 device_type = "network";
214 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; 210 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
215 reg = <3000 400>; 211 reg = <0x3000 0x400>;
216 local-mac-address = [ 00 00 00 00 00 00 ]; 212 local-mac-address = [ 00 00 00 00 00 00 ];
217 interrupts = <2 5 0>; 213 interrupts = <2 5 0>;
218 interrupt-parent = <&mpc5200_pic>; 214 interrupt-parent = <&mpc5200_pic>;
@@ -223,7 +219,7 @@
223 #address-cells = <1>; 219 #address-cells = <1>;
224 #size-cells = <0>; 220 #size-cells = <0>;
225 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; 221 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
226 reg = <3000 400>; // fec range, since we need to setup fec interrupts 222 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
227 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 223 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
228 interrupt-parent = <&mpc5200_pic>; 224 interrupt-parent = <&mpc5200_pic>;
229 225
@@ -237,15 +233,15 @@
237 #address-cells = <1>; 233 #address-cells = <1>;
238 #size-cells = <0>; 234 #size-cells = <0>;
239 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; 235 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
240 reg = <3d40 40>; 236 reg = <0x3d40 0x40>;
241 interrupts = <2 10 0>; 237 interrupts = <2 16 0>;
242 interrupt-parent = <&mpc5200_pic>; 238 interrupt-parent = <&mpc5200_pic>;
243 fsl5200-clocking; 239 fsl5200-clocking;
244 }; 240 };
245 241
246 sram@8000 { 242 sram@8000 {
247 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; 243 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
248 reg = <8000 4000>; 244 reg = <0x8000 0x4000>;
249 }; 245 };
250 }; 246 };
251 247
@@ -254,12 +250,12 @@
254 compatible = "fsl,lpb"; 250 compatible = "fsl,lpb";
255 #address-cells = <2>; 251 #address-cells = <2>;
256 #size-cells = <1>; 252 #size-cells = <1>;
257 ranges = <0 0 fc000000 2000000>; 253 ranges = <0 0 0xfc000000 0x2000000>;
258 254
259 // 16-bit flash device at LocalPlus Bus CS0 255 // 16-bit flash device at LocalPlus Bus CS0
260 flash@0,0 { 256 flash@0,0 {
261 compatible = "cfi-flash"; 257 compatible = "cfi-flash";
262 reg = <0 0 2000000>; 258 reg = <0 0 0x2000000>;
263 bank-width = <2>; 259 bank-width = <2>;
264 device-width = <2>; 260 device-width = <2>;
265 #size-cells = <1>; 261 #size-cells = <1>;
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-04 19:23:49 -0500