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-rw-r--r--arch/parisc/kernel/vmlinux.lds.S79
1 files changed, 4 insertions, 75 deletions
diff --git a/arch/parisc/kernel/vmlinux.lds.S b/arch/parisc/kernel/vmlinux.lds.S
index aea1784edbd1..3fd66d97fcaa 100644
--- a/arch/parisc/kernel/vmlinux.lds.S
+++ b/arch/parisc/kernel/vmlinux.lds.S
@@ -77,13 +77,7 @@ SECTIONS
77 */ 77 */
78 . = ALIGN(PAGE_SIZE); 78 . = ALIGN(PAGE_SIZE);
79 data_start = .; 79 data_start = .;
80 . = ALIGN(16); 80 EXCEPTION_TABLE(16)
81 /* Exception table */
82 __ex_table : {
83 __start___ex_table = .;
84 *(__ex_table)
85 __stop___ex_table = .;
86 }
87 81
88 NOTES 82 NOTES
89 83
@@ -94,23 +88,8 @@ SECTIONS
94 __stop___unwind = .; 88 __stop___unwind = .;
95 } 89 }
96 90
97 /* rarely changed data like cpu maps */
98 . = ALIGN(16);
99 .data.read_mostly : {
100 *(.data.read_mostly)
101 }
102
103 . = ALIGN(L1_CACHE_BYTES);
104 /* Data */ 91 /* Data */
105 .data : { 92 RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
106 DATA_DATA
107 CONSTRUCTORS
108 }
109
110 . = ALIGN(L1_CACHE_BYTES);
111 .data.cacheline_aligned : {
112 *(.data.cacheline_aligned)
113 }
114 93
115 /* PA-RISC locks requires 16-byte alignment */ 94 /* PA-RISC locks requires 16-byte alignment */
116 . = ALIGN(16); 95 . = ALIGN(16);
@@ -118,17 +97,6 @@ SECTIONS
118 *(.data.lock_aligned) 97 *(.data.lock_aligned)
119 } 98 }
120 99
121 /* nosave data is really only used for software suspend...it's here
122 * just in case we ever implement it
123 */
124 . = ALIGN(PAGE_SIZE);
125 __nosave_begin = .;
126 .data_nosave : {
127 *(.data.nosave)
128 }
129 . = ALIGN(PAGE_SIZE);
130 __nosave_end = .;
131
132 /* End of data section */ 100 /* End of data section */
133 _edata = .; 101 _edata = .;
134 102
@@ -147,14 +115,6 @@ SECTIONS
147 } 115 }
148 __bss_stop = .; 116 __bss_stop = .;
149 117
150
151 /* assembler code expects init_task to be 16k aligned */
152 . = ALIGN(16384);
153 /* init_task */
154 .data.init_task : {
155 *(.data.init_task)
156 }
157
158#ifdef CONFIG_64BIT 118#ifdef CONFIG_64BIT
159 . = ALIGN(16); 119 . = ALIGN(16);
160 /* Linkage tables */ 120 /* Linkage tables */
@@ -172,31 +132,8 @@ SECTIONS
172 /* reserve space for interrupt stack by aligning __init* to 16k */ 132 /* reserve space for interrupt stack by aligning __init* to 16k */
173 . = ALIGN(16384); 133 . = ALIGN(16384);
174 __init_begin = .; 134 __init_begin = .;
175 .init.text : { 135 INIT_TEXT_SECTION(16384)
176 _sinittext = .; 136 INIT_DATA_SECTION(16)
177 INIT_TEXT
178 _einittext = .;
179 }
180 .init.data : {
181 INIT_DATA
182 }
183 . = ALIGN(16);
184 .init.setup : {
185 __setup_start = .;
186 *(.init.setup)
187 __setup_end = .;
188 }
189 .initcall.init : {
190 __initcall_start = .;
191 INITCALLS
192 __initcall_end = .;
193 }
194 .con_initcall.init : {
195 __con_initcall_start = .;
196 *(.con_initcall.init)
197 __con_initcall_end = .;
198 }
199 SECURITY_INIT
200 137
201 /* alternate instruction replacement. This is a mechanism x86 uses 138 /* alternate instruction replacement. This is a mechanism x86 uses
202 * to detect the CPU type and replace generic instruction sequences 139 * to detect the CPU type and replace generic instruction sequences
@@ -222,14 +159,6 @@ SECTIONS
222 .exit.data : { 159 .exit.data : {
223 EXIT_DATA 160 EXIT_DATA
224 } 161 }
225#ifdef CONFIG_BLK_DEV_INITRD
226 . = ALIGN(PAGE_SIZE);
227 .init.ramfs : {
228 __initramfs_start = .;
229 *(.init.ramfs)
230 __initramfs_end = .;
231 }
232#endif
233 162
234 PERCPU(PAGE_SIZE) 163 PERCPU(PAGE_SIZE)
235 . = ALIGN(PAGE_SIZE); 164 . = ALIGN(PAGE_SIZE);