diff options
Diffstat (limited to 'arch/parisc')
-rw-r--r-- | arch/parisc/Kconfig | 1 | ||||
-rw-r--r-- | arch/parisc/kernel/pci.c | 7 |
2 files changed, 5 insertions, 3 deletions
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig index 524d9352f17e..f388dc68f605 100644 --- a/arch/parisc/Kconfig +++ b/arch/parisc/Kconfig | |||
@@ -18,7 +18,6 @@ config PARISC | |||
18 | select BUG | 18 | select BUG |
19 | select HAVE_PERF_EVENTS | 19 | select HAVE_PERF_EVENTS |
20 | select GENERIC_ATOMIC64 if !64BIT | 20 | select GENERIC_ATOMIC64 if !64BIT |
21 | select HAVE_ARCH_TRACEHOOK | ||
22 | help | 21 | help |
23 | The PA-RISC microprocessor is designed by Hewlett-Packard and used | 22 | The PA-RISC microprocessor is designed by Hewlett-Packard and used |
24 | in many of their workstations & servers (HP9000 700 and 800 series, | 23 | in many of their workstations & servers (HP9000 700 and 800 series, |
diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c index 5179e5e6f8fb..38372e7cbb88 100644 --- a/arch/parisc/kernel/pci.c +++ b/arch/parisc/kernel/pci.c | |||
@@ -18,7 +18,6 @@ | |||
18 | 18 | ||
19 | #include <asm/io.h> | 19 | #include <asm/io.h> |
20 | #include <asm/system.h> | 20 | #include <asm/system.h> |
21 | #include <asm/cache.h> /* for L1_CACHE_BYTES */ | ||
22 | #include <asm/superio.h> | 21 | #include <asm/superio.h> |
23 | 22 | ||
24 | #define DEBUG_RESOURCES 0 | 23 | #define DEBUG_RESOURCES 0 |
@@ -123,6 +122,10 @@ static int __init pcibios_init(void) | |||
123 | } else { | 122 | } else { |
124 | printk(KERN_WARNING "pci_bios != NULL but init() is!\n"); | 123 | printk(KERN_WARNING "pci_bios != NULL but init() is!\n"); |
125 | } | 124 | } |
125 | |||
126 | /* Set the CLS for PCI as early as possible. */ | ||
127 | pci_cache_line_size = pci_dfl_cache_line_size; | ||
128 | |||
126 | return 0; | 129 | return 0; |
127 | } | 130 | } |
128 | 131 | ||
@@ -171,7 +174,7 @@ void pcibios_set_master(struct pci_dev *dev) | |||
171 | ** upper byte is PCI_LATENCY_TIMER. | 174 | ** upper byte is PCI_LATENCY_TIMER. |
172 | */ | 175 | */ |
173 | pci_write_config_word(dev, PCI_CACHE_LINE_SIZE, | 176 | pci_write_config_word(dev, PCI_CACHE_LINE_SIZE, |
174 | (0x80 << 8) | (L1_CACHE_BYTES / sizeof(u32))); | 177 | (0x80 << 8) | pci_cache_line_size); |
175 | } | 178 | } |
176 | 179 | ||
177 | 180 | ||