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-rw-r--r--arch/parisc/kernel/vmlinux.lds.S313
1 files changed, 178 insertions, 135 deletions
diff --git a/arch/parisc/kernel/vmlinux.lds.S b/arch/parisc/kernel/vmlinux.lds.S
index ee7a16eb6fdd..40d0ff9b81ab 100644
--- a/arch/parisc/kernel/vmlinux.lds.S
+++ b/arch/parisc/kernel/vmlinux.lds.S
@@ -46,168 +46,211 @@ jiffies = jiffies_64;
46#endif 46#endif
47SECTIONS 47SECTIONS
48{ 48{
49 . = KERNEL_BINARY_TEXT_START;
49 50
50 . = KERNEL_BINARY_TEXT_START; 51 _text = .; /* Text and read-only data */
51 52 .text ALIGN(16) : {
52 _text = .; /* Text and read-only data */ 53 TEXT_TEXT
53 .text ALIGN(16) : { 54 SCHED_TEXT
54 TEXT_TEXT 55 LOCK_TEXT
55 SCHED_TEXT 56 *(.text.do_softirq)
56 LOCK_TEXT 57 *(.text.sys_exit)
57 *(.text.do_softirq) 58 *(.text.do_sigaltstack)
58 *(.text.sys_exit) 59 *(.text.do_fork)
59 *(.text.do_sigaltstack) 60 *(.text.*)
60 *(.text.do_fork) 61 *(.fixup)
61 *(.text.*) 62 *(.lock.text) /* out-of-line lock text */
62 *(.fixup) 63 *(.gnu.warning)
63 *(.lock.text) /* out-of-line lock text */
64 *(.gnu.warning)
65 } = 0 64 } = 0
65 /* End of text section */
66 _etext = .;
66 67
67 _etext = .; /* End of text section */ 68 RODATA
69 BUG_TABLE
68 70
69 RODATA 71 /* writeable */
70 72 /* Make sure this is page aligned so
71 BUG_TABLE 73 * that we can properly leave these
72 74 * as writable
73 /* writeable */ 75 */
74 . = ALIGN(ASM_PAGE_SIZE); /* Make sure this is page aligned so 76 . = ALIGN(PAGE_SIZE);
75 that we can properly leave these 77 data_start = .;
76 as writable */ 78 . = ALIGN(16);
77 data_start = .; 79 /* Exception table */
78 80 __ex_table : {
79 . = ALIGN(16); /* Exception table */ 81 __start___ex_table = .;
80 __start___ex_table = .; 82 *(__ex_table)
81 __ex_table : { *(__ex_table) } 83 __stop___ex_table = .;
82 __stop___ex_table = .; 84 }
83 85
84 NOTES 86 NOTES
85 87
86 __start___unwind = .; /* unwind info */ 88 /* unwind info */
87 .PARISC.unwind : { *(.PARISC.unwind) } 89 .PARISC.unwind : {
88 __stop___unwind = .; 90 __start___unwind = .;
91 *(.PARISC.unwind)
92 __stop___unwind = .;
93 }
89 94
90 /* rarely changed data like cpu maps */ 95 /* rarely changed data like cpu maps */
91 . = ALIGN(16); 96 . = ALIGN(16);
92 .data.read_mostly : { *(.data.read_mostly) } 97 .data.read_mostly : {
98 *(.data.read_mostly)
99 }
93 100
94 . = ALIGN(L1_CACHE_BYTES); 101 . = ALIGN(L1_CACHE_BYTES);
95 .data : { /* Data */ 102 /* Data */
96 DATA_DATA 103 .data : {
97 CONSTRUCTORS 104 DATA_DATA
105 CONSTRUCTORS
98 } 106 }
99 107
100 . = ALIGN(L1_CACHE_BYTES); 108 . = ALIGN(L1_CACHE_BYTES);
101 .data.cacheline_aligned : { *(.data.cacheline_aligned) } 109 .data.cacheline_aligned : {
110 *(.data.cacheline_aligned)
111 }
102 112
103 /* PA-RISC locks requires 16-byte alignment */ 113 /* PA-RISC locks requires 16-byte alignment */
104 . = ALIGN(16); 114 . = ALIGN(16);
105 .data.lock_aligned : { *(.data.lock_aligned) } 115 .data.lock_aligned : {
116 *(.data.lock_aligned)
117 }
106 118
107 . = ALIGN(ASM_PAGE_SIZE); 119 /* nosave data is really only used for software suspend...it's here
108 /* nosave data is really only used for software suspend...it's here 120 * just in case we ever implement it
109 * just in case we ever implement it */ 121 */
110 __nosave_begin = .; 122 . = ALIGN(PAGE_SIZE);
111 .data_nosave : { *(.data.nosave) } 123 __nosave_begin = .;
112 . = ALIGN(ASM_PAGE_SIZE); 124 .data_nosave : {
113 __nosave_end = .; 125 *(.data.nosave)
126 }
127 . = ALIGN(PAGE_SIZE);
128 __nosave_end = .;
114 129
115 _edata = .; /* End of data section */ 130 /* End of data section */
131 _edata = .;
116 132
117 __bss_start = .; /* BSS */ 133 /* BSS */
118 /* page table entries need to be PAGE_SIZE aligned */ 134 __bss_start = .;
119 . = ALIGN(ASM_PAGE_SIZE); 135 /* page table entries need to be PAGE_SIZE aligned */
120 .data.vmpages : { 136 . = ALIGN(PAGE_SIZE);
121 *(.data.vm0.pmd) 137 .data.vmpages : {
122 *(.data.vm0.pgd) 138 *(.data.vm0.pmd)
123 *(.data.vm0.pte) 139 *(.data.vm0.pgd)
140 *(.data.vm0.pte)
124 } 141 }
125 .bss : { *(.bss) *(COMMON) } 142 .bss : {
126 __bss_stop = .; 143 *(.bss)
127 144 *(COMMON)
145 }
146 __bss_stop = .;
128 147
129 /* assembler code expects init_task to be 16k aligned */
130 . = ALIGN(16384); /* init_task */
131 .data.init_task : { *(.data.init_task) }
132 148
133 /* The interrupt stack is currently partially coded, but not yet 149 /* assembler code expects init_task to be 16k aligned */
134 * implemented */ 150 . = ALIGN(16384);
135 . = ALIGN(16384); 151 /* init_task */
136 init_istack : { *(init_istack) } 152 .data.init_task : {
153 *(.data.init_task)
154 }
137 155
138#ifdef CONFIG_64BIT 156#ifdef CONFIG_64BIT
139 . = ALIGN(16); /* Linkage tables */ 157 . = ALIGN(16);
140 .opd : { *(.opd) } PROVIDE (__gp = .); 158 /* Linkage tables */
141 .plt : { *(.plt) } 159 .opd : {
142 .dlt : { *(.dlt) } 160 *(.opd)
161 } PROVIDE (__gp = .);
162 .plt : {
163 *(.plt)
164 }
165 .dlt : {
166 *(.dlt)
167 }
143#endif 168#endif
144 169
145 /* reserve space for interrupt stack by aligning __init* to 16k */ 170 /* reserve space for interrupt stack by aligning __init* to 16k */
146 . = ALIGN(16384); 171 . = ALIGN(16384);
147 __init_begin = .; 172 __init_begin = .;
148 .init.text : { 173 .init.text : {
149 _sinittext = .; 174 _sinittext = .;
150 *(.init.text) 175 *(.init.text)
151 _einittext = .; 176 _einittext = .;
152 } 177 }
153 .init.data : { *(.init.data) } 178 .init.data : {
154 . = ALIGN(16); 179 *(.init.data)
155 __setup_start = .; 180 }
156 .init.setup : { *(.init.setup) } 181 . = ALIGN(16);
157 __setup_end = .; 182 .init.setup : {
158 __initcall_start = .; 183 __setup_start = .;
159 .initcall.init : { 184 *(.init.setup)
160 INITCALLS 185 __setup_end = .;
161 } 186 }
162 __initcall_end = .; 187 .initcall.init : {
163 __con_initcall_start = .; 188 __initcall_start = .;
164 .con_initcall.init : { *(.con_initcall.init) } 189 INITCALLS
165 __con_initcall_end = .; 190 __initcall_end = .;
166 SECURITY_INIT 191 }
167 /* alternate instruction replacement. This is a mechanism x86 uses 192 .con_initcall.init : {
168 * to detect the CPU type and replace generic instruction sequences 193 __con_initcall_start = .;
169 * with CPU specific ones. We don't currently do this in PA, but 194 *(.con_initcall.init)
170 * it seems like a good idea... */ 195 __con_initcall_end = .;
171 . = ALIGN(4); 196 }
172 __alt_instructions = .; 197 SECURITY_INIT
173 .altinstructions : { *(.altinstructions) } 198
174 __alt_instructions_end = .; 199 /* alternate instruction replacement. This is a mechanism x86 uses
175 .altinstr_replacement : { *(.altinstr_replacement) } 200 * to detect the CPU type and replace generic instruction sequences
176 /* .exit.text is discard at runtime, not link time, to deal with references 201 * with CPU specific ones. We don't currently do this in PA, but
177 from .altinstructions and .eh_frame */ 202 * it seems like a good idea...
178 .exit.text : { *(.exit.text) } 203 */
179 .exit.data : { *(.exit.data) } 204 . = ALIGN(4);
205 .altinstructions : {
206 __alt_instructions = .;
207 *(.altinstructions)
208 __alt_instructions_end = .;
209 }
210 .altinstr_replacement : {
211 *(.altinstr_replacement)
212 }
213
214 /* .exit.text is discard at runtime, not link time, to deal with references
215 * from .altinstructions and .eh_frame
216 */
217 .exit.text : {
218 *(.exit.text)
219 }
220 .exit.data : {
221 *(.exit.data)
222 }
180#ifdef CONFIG_BLK_DEV_INITRD 223#ifdef CONFIG_BLK_DEV_INITRD
181 . = ALIGN(ASM_PAGE_SIZE); 224 . = ALIGN(PAGE_SIZE);
182 __initramfs_start = .; 225 .init.ramfs : {
183 .init.ramfs : { *(.init.ramfs) } 226 __initramfs_start = .;
184 __initramfs_end = .; 227 *(.init.ramfs)
228 __initramfs_end = .;
229 }
185#endif 230#endif
186 231
187 PERCPU(ASM_PAGE_SIZE) 232 PERCPU(PAGE_SIZE)
233 . = ALIGN(PAGE_SIZE);
234 __init_end = .;
235 /* freed after init ends here */
236 _end = . ;
188 237
189 . = ALIGN(ASM_PAGE_SIZE); 238 /* Sections to be discarded */
190 __init_end = .; 239 /DISCARD/ : {
191 /* freed after init ends here */ 240 *(.exitcall.exit)
192
193 _end = . ;
194
195 /* Sections to be discarded */
196 /DISCARD/ : {
197 *(.exitcall.exit)
198#ifdef CONFIG_64BIT 241#ifdef CONFIG_64BIT
199 /* temporary hack until binutils is fixed to not emit these 242 /* temporary hack until binutils is fixed to not emit these
200 for static binaries */ 243 * for static binaries
201 *(.interp) 244 */
202 *(.dynsym) 245 *(.interp)
203 *(.dynstr) 246 *(.dynsym)
204 *(.dynamic) 247 *(.dynstr)
205 *(.hash) 248 *(.dynamic)
206 *(.gnu.hash) 249 *(.hash)
250 *(.gnu.hash)
207#endif 251#endif
208 } 252 }
209 253
210 STABS_DEBUG 254 STABS_DEBUG
211 .note 0 : { *(.note) } 255 .note 0 : { *(.note) }
212
213} 256}