diff options
Diffstat (limited to 'arch/parisc/kernel/irq.c')
-rw-r--r-- | arch/parisc/kernel/irq.c | 41 |
1 files changed, 18 insertions, 23 deletions
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index efbcee5d2220..5024f643b3b1 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c | |||
@@ -52,7 +52,7 @@ static volatile unsigned long cpu_eiem = 0; | |||
52 | */ | 52 | */ |
53 | static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL; | 53 | static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL; |
54 | 54 | ||
55 | static void cpu_disable_irq(unsigned int irq) | 55 | static void cpu_mask_irq(unsigned int irq) |
56 | { | 56 | { |
57 | unsigned long eirr_bit = EIEM_MASK(irq); | 57 | unsigned long eirr_bit = EIEM_MASK(irq); |
58 | 58 | ||
@@ -63,7 +63,7 @@ static void cpu_disable_irq(unsigned int irq) | |||
63 | * then gets disabled */ | 63 | * then gets disabled */ |
64 | } | 64 | } |
65 | 65 | ||
66 | static void cpu_enable_irq(unsigned int irq) | 66 | static void cpu_unmask_irq(unsigned int irq) |
67 | { | 67 | { |
68 | unsigned long eirr_bit = EIEM_MASK(irq); | 68 | unsigned long eirr_bit = EIEM_MASK(irq); |
69 | 69 | ||
@@ -75,12 +75,6 @@ static void cpu_enable_irq(unsigned int irq) | |||
75 | smp_send_all_nop(); | 75 | smp_send_all_nop(); |
76 | } | 76 | } |
77 | 77 | ||
78 | static unsigned int cpu_startup_irq(unsigned int irq) | ||
79 | { | ||
80 | cpu_enable_irq(irq); | ||
81 | return 0; | ||
82 | } | ||
83 | |||
84 | void no_ack_irq(unsigned int irq) { } | 78 | void no_ack_irq(unsigned int irq) { } |
85 | void no_end_irq(unsigned int irq) { } | 79 | void no_end_irq(unsigned int irq) { } |
86 | 80 | ||
@@ -99,7 +93,7 @@ void cpu_ack_irq(unsigned int irq) | |||
99 | mtctl(mask, 23); | 93 | mtctl(mask, 23); |
100 | } | 94 | } |
101 | 95 | ||
102 | void cpu_end_irq(unsigned int irq) | 96 | void cpu_eoi_irq(unsigned int irq) |
103 | { | 97 | { |
104 | unsigned long mask = EIEM_MASK(irq); | 98 | unsigned long mask = EIEM_MASK(irq); |
105 | int cpu = smp_processor_id(); | 99 | int cpu = smp_processor_id(); |
@@ -146,12 +140,10 @@ static int cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest) | |||
146 | 140 | ||
147 | static struct irq_chip cpu_interrupt_type = { | 141 | static struct irq_chip cpu_interrupt_type = { |
148 | .name = "CPU", | 142 | .name = "CPU", |
149 | .startup = cpu_startup_irq, | 143 | .mask = cpu_mask_irq, |
150 | .shutdown = cpu_disable_irq, | 144 | .unmask = cpu_unmask_irq, |
151 | .enable = cpu_enable_irq, | ||
152 | .disable = cpu_disable_irq, | ||
153 | .ack = cpu_ack_irq, | 145 | .ack = cpu_ack_irq, |
154 | .end = cpu_end_irq, | 146 | .eoi = cpu_eoi_irq, |
155 | #ifdef CONFIG_SMP | 147 | #ifdef CONFIG_SMP |
156 | .set_affinity = cpu_set_affinity_irq, | 148 | .set_affinity = cpu_set_affinity_irq, |
157 | #endif | 149 | #endif |
@@ -247,10 +239,11 @@ int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data) | |||
247 | if (irq_desc[irq].chip != &cpu_interrupt_type) | 239 | if (irq_desc[irq].chip != &cpu_interrupt_type) |
248 | return -EBUSY; | 240 | return -EBUSY; |
249 | 241 | ||
242 | /* for iosapic interrupts */ | ||
250 | if (type) { | 243 | if (type) { |
251 | irq_desc[irq].chip = type; | 244 | set_irq_chip_and_handler(irq, type, handle_level_irq); |
252 | irq_desc[irq].chip_data = data; | 245 | set_irq_chip_data(irq, data); |
253 | cpu_interrupt_type.enable(irq); | 246 | cpu_unmask_irq(irq); |
254 | } | 247 | } |
255 | return 0; | 248 | return 0; |
256 | } | 249 | } |
@@ -368,7 +361,7 @@ void do_cpu_irq_mask(struct pt_regs *regs) | |||
368 | goto set_out; | 361 | goto set_out; |
369 | } | 362 | } |
370 | #endif | 363 | #endif |
371 | __do_IRQ(irq); | 364 | generic_handle_irq(irq); |
372 | 365 | ||
373 | out: | 366 | out: |
374 | irq_exit(); | 367 | irq_exit(); |
@@ -398,14 +391,15 @@ static void claim_cpu_irqs(void) | |||
398 | { | 391 | { |
399 | int i; | 392 | int i; |
400 | for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) { | 393 | for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) { |
401 | irq_desc[i].chip = &cpu_interrupt_type; | 394 | set_irq_chip_and_handler(i, &cpu_interrupt_type, |
395 | handle_level_irq); | ||
402 | } | 396 | } |
403 | 397 | ||
404 | irq_desc[TIMER_IRQ].action = &timer_action; | 398 | set_irq_handler(TIMER_IRQ, handle_percpu_irq); |
405 | irq_desc[TIMER_IRQ].status = IRQ_PER_CPU; | 399 | setup_irq(TIMER_IRQ, &timer_action); |
406 | #ifdef CONFIG_SMP | 400 | #ifdef CONFIG_SMP |
407 | irq_desc[IPI_IRQ].action = &ipi_action; | 401 | set_irq_handler(IPI_IRQ, handle_percpu_irq); |
408 | irq_desc[IPI_IRQ].status = IRQ_PER_CPU; | 402 | setup_irq(IPI_IRQ, &ipi_action); |
409 | #endif | 403 | #endif |
410 | } | 404 | } |
411 | 405 | ||
@@ -423,3 +417,4 @@ void __init init_IRQ(void) | |||
423 | set_eiem(cpu_eiem); /* EIEM : enable all external intr */ | 417 | set_eiem(cpu_eiem); /* EIEM : enable all external intr */ |
424 | 418 | ||
425 | } | 419 | } |
420 | |||