diff options
Diffstat (limited to 'arch/parisc/kernel/irq.c')
-rw-r--r-- | arch/parisc/kernel/irq.c | 82 |
1 files changed, 44 insertions, 38 deletions
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index d7d94b845dc2..c0b1affc06a8 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c | |||
@@ -52,9 +52,9 @@ static volatile unsigned long cpu_eiem = 0; | |||
52 | */ | 52 | */ |
53 | static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL; | 53 | static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL; |
54 | 54 | ||
55 | static void cpu_mask_irq(unsigned int irq) | 55 | static void cpu_mask_irq(struct irq_data *d) |
56 | { | 56 | { |
57 | unsigned long eirr_bit = EIEM_MASK(irq); | 57 | unsigned long eirr_bit = EIEM_MASK(d->irq); |
58 | 58 | ||
59 | cpu_eiem &= ~eirr_bit; | 59 | cpu_eiem &= ~eirr_bit; |
60 | /* Do nothing on the other CPUs. If they get this interrupt, | 60 | /* Do nothing on the other CPUs. If they get this interrupt, |
@@ -63,7 +63,7 @@ static void cpu_mask_irq(unsigned int irq) | |||
63 | * then gets disabled */ | 63 | * then gets disabled */ |
64 | } | 64 | } |
65 | 65 | ||
66 | static void cpu_unmask_irq(unsigned int irq) | 66 | static void __cpu_unmask_irq(unsigned int irq) |
67 | { | 67 | { |
68 | unsigned long eirr_bit = EIEM_MASK(irq); | 68 | unsigned long eirr_bit = EIEM_MASK(irq); |
69 | 69 | ||
@@ -75,9 +75,14 @@ static void cpu_unmask_irq(unsigned int irq) | |||
75 | smp_send_all_nop(); | 75 | smp_send_all_nop(); |
76 | } | 76 | } |
77 | 77 | ||
78 | void cpu_ack_irq(unsigned int irq) | 78 | static void cpu_unmask_irq(struct irq_data *d) |
79 | { | 79 | { |
80 | unsigned long mask = EIEM_MASK(irq); | 80 | __cpu_unmask_irq(d->irq); |
81 | } | ||
82 | |||
83 | void cpu_ack_irq(struct irq_data *d) | ||
84 | { | ||
85 | unsigned long mask = EIEM_MASK(d->irq); | ||
81 | int cpu = smp_processor_id(); | 86 | int cpu = smp_processor_id(); |
82 | 87 | ||
83 | /* Clear in EIEM so we can no longer process */ | 88 | /* Clear in EIEM so we can no longer process */ |
@@ -90,9 +95,9 @@ void cpu_ack_irq(unsigned int irq) | |||
90 | mtctl(mask, 23); | 95 | mtctl(mask, 23); |
91 | } | 96 | } |
92 | 97 | ||
93 | void cpu_eoi_irq(unsigned int irq) | 98 | void cpu_eoi_irq(struct irq_data *d) |
94 | { | 99 | { |
95 | unsigned long mask = EIEM_MASK(irq); | 100 | unsigned long mask = EIEM_MASK(d->irq); |
96 | int cpu = smp_processor_id(); | 101 | int cpu = smp_processor_id(); |
97 | 102 | ||
98 | /* set it in the eiems---it's no longer in process */ | 103 | /* set it in the eiems---it's no longer in process */ |
@@ -103,17 +108,13 @@ void cpu_eoi_irq(unsigned int irq) | |||
103 | } | 108 | } |
104 | 109 | ||
105 | #ifdef CONFIG_SMP | 110 | #ifdef CONFIG_SMP |
106 | int cpu_check_affinity(unsigned int irq, const struct cpumask *dest) | 111 | int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest) |
107 | { | 112 | { |
108 | int cpu_dest; | 113 | int cpu_dest; |
109 | 114 | ||
110 | /* timer and ipi have to always be received on all CPUs */ | 115 | /* timer and ipi have to always be received on all CPUs */ |
111 | if (CHECK_IRQ_PER_CPU(irq)) { | 116 | if (irqd_is_per_cpu(d)) |
112 | /* Bad linux design decision. The mask has already | ||
113 | * been set; we must reset it */ | ||
114 | cpumask_setall(irq_desc[irq].affinity); | ||
115 | return -EINVAL; | 117 | return -EINVAL; |
116 | } | ||
117 | 118 | ||
118 | /* whatever mask they set, we just allow one CPU */ | 119 | /* whatever mask they set, we just allow one CPU */ |
119 | cpu_dest = first_cpu(*dest); | 120 | cpu_dest = first_cpu(*dest); |
@@ -121,33 +122,34 @@ int cpu_check_affinity(unsigned int irq, const struct cpumask *dest) | |||
121 | return cpu_dest; | 122 | return cpu_dest; |
122 | } | 123 | } |
123 | 124 | ||
124 | static int cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest) | 125 | static int cpu_set_affinity_irq(struct irq_data *d, const struct cpumask *dest, |
126 | bool force) | ||
125 | { | 127 | { |
126 | int cpu_dest; | 128 | int cpu_dest; |
127 | 129 | ||
128 | cpu_dest = cpu_check_affinity(irq, dest); | 130 | cpu_dest = cpu_check_affinity(d, dest); |
129 | if (cpu_dest < 0) | 131 | if (cpu_dest < 0) |
130 | return -1; | 132 | return -1; |
131 | 133 | ||
132 | cpumask_copy(irq_desc[irq].affinity, dest); | 134 | cpumask_copy(d->affinity, dest); |
133 | 135 | ||
134 | return 0; | 136 | return 0; |
135 | } | 137 | } |
136 | #endif | 138 | #endif |
137 | 139 | ||
138 | static struct irq_chip cpu_interrupt_type = { | 140 | static struct irq_chip cpu_interrupt_type = { |
139 | .name = "CPU", | 141 | .name = "CPU", |
140 | .mask = cpu_mask_irq, | 142 | .irq_mask = cpu_mask_irq, |
141 | .unmask = cpu_unmask_irq, | 143 | .irq_unmask = cpu_unmask_irq, |
142 | .ack = cpu_ack_irq, | 144 | .irq_ack = cpu_ack_irq, |
143 | .eoi = cpu_eoi_irq, | 145 | .irq_eoi = cpu_eoi_irq, |
144 | #ifdef CONFIG_SMP | 146 | #ifdef CONFIG_SMP |
145 | .set_affinity = cpu_set_affinity_irq, | 147 | .irq_set_affinity = cpu_set_affinity_irq, |
146 | #endif | 148 | #endif |
147 | /* XXX: Needs to be written. We managed without it so far, but | 149 | /* XXX: Needs to be written. We managed without it so far, but |
148 | * we really ought to write it. | 150 | * we really ought to write it. |
149 | */ | 151 | */ |
150 | .retrigger = NULL, | 152 | .irq_retrigger = NULL, |
151 | }; | 153 | }; |
152 | 154 | ||
153 | int show_interrupts(struct seq_file *p, void *v) | 155 | int show_interrupts(struct seq_file *p, void *v) |
@@ -167,10 +169,11 @@ int show_interrupts(struct seq_file *p, void *v) | |||
167 | } | 169 | } |
168 | 170 | ||
169 | if (i < NR_IRQS) { | 171 | if (i < NR_IRQS) { |
172 | struct irq_desc *desc = irq_to_desc(i); | ||
170 | struct irqaction *action; | 173 | struct irqaction *action; |
171 | 174 | ||
172 | raw_spin_lock_irqsave(&irq_desc[i].lock, flags); | 175 | raw_spin_lock_irqsave(&desc->lock, flags); |
173 | action = irq_desc[i].action; | 176 | action = desc->action; |
174 | if (!action) | 177 | if (!action) |
175 | goto skip; | 178 | goto skip; |
176 | seq_printf(p, "%3d: ", i); | 179 | seq_printf(p, "%3d: ", i); |
@@ -181,7 +184,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
181 | seq_printf(p, "%10u ", kstat_irqs(i)); | 184 | seq_printf(p, "%10u ", kstat_irqs(i)); |
182 | #endif | 185 | #endif |
183 | 186 | ||
184 | seq_printf(p, " %14s", irq_desc[i].chip->name); | 187 | seq_printf(p, " %14s", irq_desc_get_chip(desc)->name); |
185 | #ifndef PARISC_IRQ_CR16_COUNTS | 188 | #ifndef PARISC_IRQ_CR16_COUNTS |
186 | seq_printf(p, " %s", action->name); | 189 | seq_printf(p, " %s", action->name); |
187 | 190 | ||
@@ -213,7 +216,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
213 | 216 | ||
214 | seq_putc(p, '\n'); | 217 | seq_putc(p, '\n'); |
215 | skip: | 218 | skip: |
216 | raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); | 219 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
217 | } | 220 | } |
218 | 221 | ||
219 | return 0; | 222 | return 0; |
@@ -231,16 +234,16 @@ int show_interrupts(struct seq_file *p, void *v) | |||
231 | 234 | ||
232 | int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data) | 235 | int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data) |
233 | { | 236 | { |
234 | if (irq_desc[irq].action) | 237 | if (irq_has_action(irq)) |
235 | return -EBUSY; | 238 | return -EBUSY; |
236 | if (irq_desc[irq].chip != &cpu_interrupt_type) | 239 | if (irq_get_chip(irq) != &cpu_interrupt_type) |
237 | return -EBUSY; | 240 | return -EBUSY; |
238 | 241 | ||
239 | /* for iosapic interrupts */ | 242 | /* for iosapic interrupts */ |
240 | if (type) { | 243 | if (type) { |
241 | set_irq_chip_and_handler(irq, type, handle_percpu_irq); | 244 | irq_set_chip_and_handler(irq, type, handle_percpu_irq); |
242 | set_irq_chip_data(irq, data); | 245 | irq_set_chip_data(irq, data); |
243 | cpu_unmask_irq(irq); | 246 | __cpu_unmask_irq(irq); |
244 | } | 247 | } |
245 | return 0; | 248 | return 0; |
246 | } | 249 | } |
@@ -289,7 +292,8 @@ int txn_alloc_irq(unsigned int bits_wide) | |||
289 | unsigned long txn_affinity_addr(unsigned int irq, int cpu) | 292 | unsigned long txn_affinity_addr(unsigned int irq, int cpu) |
290 | { | 293 | { |
291 | #ifdef CONFIG_SMP | 294 | #ifdef CONFIG_SMP |
292 | cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu)); | 295 | struct irq_data *d = irq_get_irq_data(irq); |
296 | cpumask_copy(d->affinity, cpumask_of(cpu)); | ||
293 | #endif | 297 | #endif |
294 | 298 | ||
295 | return per_cpu(cpu_data, cpu).txn_addr; | 299 | return per_cpu(cpu_data, cpu).txn_addr; |
@@ -333,6 +337,7 @@ void do_cpu_irq_mask(struct pt_regs *regs) | |||
333 | unsigned long eirr_val; | 337 | unsigned long eirr_val; |
334 | int irq, cpu = smp_processor_id(); | 338 | int irq, cpu = smp_processor_id(); |
335 | #ifdef CONFIG_SMP | 339 | #ifdef CONFIG_SMP |
340 | struct irq_desc *desc; | ||
336 | cpumask_t dest; | 341 | cpumask_t dest; |
337 | #endif | 342 | #endif |
338 | 343 | ||
@@ -346,8 +351,9 @@ void do_cpu_irq_mask(struct pt_regs *regs) | |||
346 | irq = eirr_to_irq(eirr_val); | 351 | irq = eirr_to_irq(eirr_val); |
347 | 352 | ||
348 | #ifdef CONFIG_SMP | 353 | #ifdef CONFIG_SMP |
349 | cpumask_copy(&dest, irq_desc[irq].affinity); | 354 | desc = irq_to_desc(irq); |
350 | if (CHECK_IRQ_PER_CPU(irq_desc[irq].status) && | 355 | cpumask_copy(&dest, desc->irq_data.affinity); |
356 | if (irqd_is_per_cpu(&desc->irq_data) && | ||
351 | !cpu_isset(smp_processor_id(), dest)) { | 357 | !cpu_isset(smp_processor_id(), dest)) { |
352 | int cpu = first_cpu(dest); | 358 | int cpu = first_cpu(dest); |
353 | 359 | ||
@@ -388,14 +394,14 @@ static void claim_cpu_irqs(void) | |||
388 | { | 394 | { |
389 | int i; | 395 | int i; |
390 | for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) { | 396 | for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) { |
391 | set_irq_chip_and_handler(i, &cpu_interrupt_type, | 397 | irq_set_chip_and_handler(i, &cpu_interrupt_type, |
392 | handle_percpu_irq); | 398 | handle_percpu_irq); |
393 | } | 399 | } |
394 | 400 | ||
395 | set_irq_handler(TIMER_IRQ, handle_percpu_irq); | 401 | irq_set_handler(TIMER_IRQ, handle_percpu_irq); |
396 | setup_irq(TIMER_IRQ, &timer_action); | 402 | setup_irq(TIMER_IRQ, &timer_action); |
397 | #ifdef CONFIG_SMP | 403 | #ifdef CONFIG_SMP |
398 | set_irq_handler(IPI_IRQ, handle_percpu_irq); | 404 | irq_set_handler(IPI_IRQ, handle_percpu_irq); |
399 | setup_irq(IPI_IRQ, &ipi_action); | 405 | setup_irq(IPI_IRQ, &ipi_action); |
400 | #endif | 406 | #endif |
401 | } | 407 | } |