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-rw-r--r--arch/parisc/kernel/entry.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index 2ab16bb160a8..75819617f93b 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -398,7 +398,7 @@
398 * can address up to 1TB 398 * can address up to 1TB
399 */ 399 */
400 .macro L2_ptep pmd,pte,index,va,fault 400 .macro L2_ptep pmd,pte,index,va,fault
401#if PT_NLEVELS == 3 401#if CONFIG_PGTABLE_LEVELS == 3
402 extru \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index 402 extru \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index
403#else 403#else
404# if defined(CONFIG_64BIT) 404# if defined(CONFIG_64BIT)
@@ -436,7 +436,7 @@
436 * all ILP32 processes and all the kernel for machines with 436 * all ILP32 processes and all the kernel for machines with
437 * under 4GB of memory) */ 437 * under 4GB of memory) */
438 .macro L3_ptep pgd,pte,index,va,fault 438 .macro L3_ptep pgd,pte,index,va,fault
439#if PT_NLEVELS == 3 /* we might have a 2-Level scheme, e.g. with 16kb page size */ 439#if CONFIG_PGTABLE_LEVELS == 3 /* we might have a 2-Level scheme, e.g. with 16kb page size */
440 extrd,u \va,63-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index 440 extrd,u \va,63-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index
441 copy %r0,\pte 441 copy %r0,\pte
442 extrd,u,*= \va,63-ASM_PGDIR_SHIFT,64-ASM_PGDIR_SHIFT,%r0 442 extrd,u,*= \va,63-ASM_PGDIR_SHIFT,64-ASM_PGDIR_SHIFT,%r0