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-rw-r--r--arch/mn10300/unit-asb2364/include/unit/clock.h29
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/fpga-regs.h52
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/irq.h35
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/leds.h54
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/serial.h151
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/smsc911x.h171
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/timex.h159
7 files changed, 651 insertions, 0 deletions
diff --git a/arch/mn10300/unit-asb2364/include/unit/clock.h b/arch/mn10300/unit-asb2364/include/unit/clock.h
new file mode 100644
index 000000000000..d34ac9a7508b
--- /dev/null
+++ b/arch/mn10300/unit-asb2364/include/unit/clock.h
@@ -0,0 +1,29 @@
1/* clock.h: unit-specific clocks
2 *
3 * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * Modified by Matsushita Electric Industrial Co., Ltd.
7 * Modifications:
8 * 23-Feb-2007 MEI Add define for watchdog timer.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16#ifndef _ASM_UNIT_CLOCK_H
17#define _ASM_UNIT_CLOCK_H
18
19#ifndef __ASSEMBLY__
20
21#define MN10300_IOCLK 100000000UL /* for DDR800 */
22/*#define MN10300_IOCLK 83333333UL */ /* for DDR667 */
23#define MN10300_IOBCLK MN10300_IOCLK /* IOBCLK is equal to IOCLK */
24
25#endif /* !__ASSEMBLY__ */
26
27#define MN10300_WDCLK 27000000UL
28
29#endif /* _ASM_UNIT_CLOCK_H */
diff --git a/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h b/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h
new file mode 100644
index 000000000000..7cf12054db65
--- /dev/null
+++ b/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h
@@ -0,0 +1,52 @@
1/* ASB2364 FPGA registers
2 */
3
4#ifndef _ASM_UNIT_FPGA_REGS_H
5#define _ASM_UNIT_FPGA_REGS_H
6
7#include <asm/cpu-regs.h>
8
9#ifdef __KERNEL__
10
11#define ASB2364_FPGA_REG_RESET_LAN __SYSREG(0xa9001300, u16)
12#define ASB2364_FPGA_REG_RESET_UART __SYSREG(0xa9001304, u16)
13#define ASB2364_FPGA_REG_RESET_I2C __SYSREG(0xa9001308, u16)
14#define ASB2364_FPGA_REG_RESET_USB __SYSREG(0xa900130c, u16)
15#define ASB2364_FPGA_REG_RESET_AV __SYSREG(0xa9001310, u16)
16
17#define ASB2364_FPGA_REG_IRQ(X) __SYSREG(0xa9001590+((X)*4), u16)
18#define ASB2364_FPGA_REG_IRQ_LAN ASB2364_FPGA_REG_IRQ(0)
19#define ASB2364_FPGA_REG_IRQ_UART ASB2364_FPGA_REG_IRQ(1)
20#define ASB2364_FPGA_REG_IRQ_I2C ASB2364_FPGA_REG_IRQ(2)
21#define ASB2364_FPGA_REG_IRQ_USB ASB2364_FPGA_REG_IRQ(3)
22#define ASB2364_FPGA_REG_IRQ_FPGA ASB2364_FPGA_REG_IRQ(5)
23
24#define ASB2364_FPGA_REG_MASK(X) __SYSREG(0xa9001590+((X)*4), u16)
25#define ASB2364_FPGA_REG_MASK_LAN ASB2364_FPGA_REG_MASK(0)
26#define ASB2364_FPGA_REG_MASK_UART ASB2364_FPGA_REG_MASK(1)
27#define ASB2364_FPGA_REG_MASK_I2C ASB2364_FPGA_REG_MASK(2)
28#define ASB2364_FPGA_REG_MASK_USB ASB2364_FPGA_REG_MASK(3)
29#define ASB2364_FPGA_REG_MASK_FPGA ASB2364_FPGA_REG_MASK(5)
30
31#define ASB2364_FPGA_REG_CPLD5_SET1 __SYSREG(0xa9002500, u16)
32#define ASB2364_FPGA_REG_CPLD5_SET2 __SYSREG(0xa9002504, u16)
33#define ASB2364_FPGA_REG_CPLD6_SET1 __SYSREG(0xa9002600, u16)
34#define ASB2364_FPGA_REG_CPLD6_SET2 __SYSREG(0xa9002604, u16)
35#define ASB2364_FPGA_REG_CPLD7_SET1 __SYSREG(0xa9002700, u16)
36#define ASB2364_FPGA_REG_CPLD7_SET2 __SYSREG(0xa9002704, u16)
37#define ASB2364_FPGA_REG_CPLD8_SET1 __SYSREG(0xa9002800, u16)
38#define ASB2364_FPGA_REG_CPLD8_SET2 __SYSREG(0xa9002804, u16)
39#define ASB2364_FPGA_REG_CPLD9_SET1 __SYSREG(0xa9002900, u16)
40#define ASB2364_FPGA_REG_CPLD9_SET2 __SYSREG(0xa9002904, u16)
41#define ASB2364_FPGA_REG_CPLD10_SET1 __SYSREG(0xa9002a00, u16)
42#define ASB2364_FPGA_REG_CPLD10_SET2 __SYSREG(0xa9002a04, u16)
43
44#define SyncExBus() \
45 do { \
46 unsigned short w; \
47 w = *(volatile short *)0xa9000000; \
48 } while (0)
49
50#endif /* __KERNEL__ */
51
52#endif /* _ASM_UNIT_FPGA_REGS_H */
diff --git a/arch/mn10300/unit-asb2364/include/unit/irq.h b/arch/mn10300/unit-asb2364/include/unit/irq.h
new file mode 100644
index 000000000000..786148e46565
--- /dev/null
+++ b/arch/mn10300/unit-asb2364/include/unit/irq.h
@@ -0,0 +1,35 @@
1/* ASB2364 FPGA irq numbers
2 *
3 * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _UNIT_IRQ_H
12#define _UNIT_IRQ_H
13
14#ifndef __ASSEMBLY__
15
16#ifdef CONFIG_SMP
17#define NR_CPU_IRQS GxICR_NUM_EXT_IRQS
18#else
19#define NR_CPU_IRQS GxICR_NUM_IRQS
20#endif
21
22enum {
23 FPGA_LAN_IRQ = NR_CPU_IRQS,
24 FPGA_UART_IRQ,
25 FPGA_I2C_IRQ,
26 FPGA_USB_IRQ,
27 FPGA_RESERVED_IRQ,
28 FPGA_FPGA_IRQ,
29 NR_IRQS
30};
31
32extern void __init irq_fpga_init(void);
33
34#endif /* !__ASSEMBLY__ */
35#endif /* _UNIT_IRQ_H */
diff --git a/arch/mn10300/unit-asb2364/include/unit/leds.h b/arch/mn10300/unit-asb2364/include/unit/leds.h
new file mode 100644
index 000000000000..03a3933ad323
--- /dev/null
+++ b/arch/mn10300/unit-asb2364/include/unit/leds.h
@@ -0,0 +1,54 @@
1/* Unit-specific leds
2 *
3 * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_LEDS_H
13#define _ASM_UNIT_LEDS_H
14
15#include <asm/pio-regs.h>
16#include <asm/cpu-regs.h>
17#include <asm/exceptions.h>
18
19#define MN10300_USE_7SEGLEDS 0
20
21#define ASB2364_7SEGLEDS __SYSREG(0xA9001630, u32)
22
23/*
24 * use the 7-segment LEDs to indicate states
25 */
26
27#if MN10300_USE_7SEGLEDS
28/* flip the 7-segment LEDs between "Gdb-" and "----" */
29#define mn10300_set_gdbleds(ONOFF) \
30 do { \
31 ASB2364_7SEGLEDS = (ONOFF) ? 0x8543077f : 0x7f7f7f7f; \
32 } while (0)
33#else
34#define mn10300_set_gdbleds(ONOFF) do {} while (0)
35#endif
36
37#if MN10300_USE_7SEGLEDS
38/* indicate double-fault by displaying "db-f" on the LEDs */
39#define mn10300_set_dbfleds \
40 mov 0x43077f1d,d0 ; \
41 mov d0,(ASB2364_7SEGLEDS)
42#else
43#define mn10300_set_dbfleds
44#endif
45
46#ifndef __ASSEMBLY__
47extern void peripheral_leds_display_exception(enum exception_code);
48extern void peripheral_leds_led_chase(void);
49extern void peripheral_leds7x4_display_dec(unsigned int, unsigned int);
50extern void peripheral_leds7x4_display_hex(unsigned int, unsigned int);
51extern void debug_to_serial(const char *, int);
52#endif /* __ASSEMBLY__ */
53
54#endif /* _ASM_UNIT_LEDS_H */
diff --git a/arch/mn10300/unit-asb2364/include/unit/serial.h b/arch/mn10300/unit-asb2364/include/unit/serial.h
new file mode 100644
index 000000000000..7f048bbfdfd7
--- /dev/null
+++ b/arch/mn10300/unit-asb2364/include/unit/serial.h
@@ -0,0 +1,151 @@
1/* Unit-specific 8250 serial ports
2 *
3 * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_UNIT_SERIAL_H
13#define _ASM_UNIT_SERIAL_H
14
15#include <asm/cpu-regs.h>
16#include <proc/irq.h>
17#include <unit/fpga-regs.h>
18#include <linux/serial_reg.h>
19
20#define SERIAL_PORT0_BASE_ADDRESS 0xA8200000
21
22#define SERIAL_IRQ XIRQ1 /* single serial (TL16C550C) (Lo) */
23
24/*
25 * The ASB2364 has an 12.288 MHz clock
26 * for your UART.
27 *
28 * It'd be nice if someone built a serial card with a 24.576 MHz
29 * clock, since the 16550A is capable of handling a top speed of 1.5
30 * megabits/second; but this requires the faster clock.
31 */
32#define BASE_BAUD (12288000 / 16)
33
34/*
35 * dispose of the /dev/ttyS0 and /dev/ttyS1 serial ports
36 */
37#ifndef CONFIG_GDBSTUB_ON_TTYSx
38
39#define SERIAL_PORT_DFNS \
40 { \
41 .baud_base = BASE_BAUD, \
42 .irq = SERIAL_IRQ, \
43 .flags = STD_COM_FLAGS, \
44 .iomem_base = (u8 *) SERIAL_PORT0_BASE_ADDRESS, \
45 .iomem_reg_shift = 1, \
46 .io_type = SERIAL_IO_MEM, \
47 },
48
49#ifndef __ASSEMBLY__
50
51static inline void __debug_to_serial(const char *p, int n)
52{
53}
54
55#endif /* !__ASSEMBLY__ */
56
57#else /* CONFIG_GDBSTUB_ON_TTYSx */
58
59#define SERIAL_PORT_DFNS /* stolen by gdb-stub */
60
61#if defined(CONFIG_GDBSTUB_ON_TTYS0)
62#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)
63#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
64#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
65#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
66#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
67#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
68#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
69#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
70#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
71#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
72#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
73#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)
74#define GDBPORT_SERIAL_IRQ SERIAL_IRQ
75
76#elif defined(CONFIG_GDBSTUB_ON_TTYS1)
77#error The ASB2364 does not have a /dev/ttyS1
78#endif
79
80#ifndef __ASSEMBLY__
81
82static inline void __debug_to_serial(const char *p, int n)
83{
84 char ch;
85
86#define LSR_WAIT_FOR(STATE) \
87 do {} while (!(GDBPORT_SERIAL_LSR & UART_LSR_##STATE))
88#define FLOWCTL_QUERY(LINE) \
89 ({ GDBPORT_SERIAL_MSR & UART_MSR_##LINE; })
90#define FLOWCTL_WAIT_FOR(LINE) \
91 do {} while (!(GDBPORT_SERIAL_MSR & UART_MSR_##LINE))
92#define FLOWCTL_CLEAR(LINE) \
93 do { GDBPORT_SERIAL_MCR &= ~UART_MCR_##LINE; } while (0)
94#define FLOWCTL_SET(LINE) \
95 do { GDBPORT_SERIAL_MCR |= UART_MCR_##LINE; } while (0)
96
97 FLOWCTL_SET(DTR);
98
99 for (; n > 0; n--) {
100 LSR_WAIT_FOR(THRE);
101 FLOWCTL_WAIT_FOR(CTS);
102
103 ch = *p++;
104 if (ch == 0x0a) {
105 GDBPORT_SERIAL_TX = 0x0d;
106 LSR_WAIT_FOR(THRE);
107 FLOWCTL_WAIT_FOR(CTS);
108 }
109 GDBPORT_SERIAL_TX = ch;
110 }
111
112 FLOWCTL_CLEAR(DTR);
113}
114
115#endif /* !__ASSEMBLY__ */
116
117#endif /* CONFIG_GDBSTUB_ON_TTYSx */
118
119#define SERIAL_INITIALIZE \
120do { \
121 /* release reset */ \
122 ASB2364_FPGA_REG_RESET_UART = 0x0001; \
123 SyncExBus(); \
124} while (0)
125
126#define SERIAL_CHECK_INTERRUPT \
127do { \
128 if ((ASB2364_FPGA_REG_IRQ_UART & 0x0001) == 0x0001) { \
129 return IRQ_NONE; \
130 } \
131} while (0)
132
133#define SERIAL_CLEAR_INTERRUPT \
134do { \
135 ASB2364_FPGA_REG_IRQ_UART = 0x0001; \
136 SyncExBus(); \
137} while (0)
138
139#define SERIAL_SET_INT_MASK \
140do { \
141 ASB2364_FPGA_REG_MASK_UART = 0x0001; \
142 SyncExBus(); \
143} while (0)
144
145#define SERIAL_CLEAR_INT_MASK \
146do { \
147 ASB2364_FPGA_REG_MASK_UART = 0x0000; \
148 SyncExBus(); \
149} while (0)
150
151#endif /* _ASM_UNIT_SERIAL_H */
diff --git a/arch/mn10300/unit-asb2364/include/unit/smsc911x.h b/arch/mn10300/unit-asb2364/include/unit/smsc911x.h
new file mode 100644
index 000000000000..4c1ede535fa9
--- /dev/null
+++ b/arch/mn10300/unit-asb2364/include/unit/smsc911x.h
@@ -0,0 +1,171 @@
1/* Support for the SMSC911x NIC
2 *
3 * Copyright (C) 2006 Matsushita Electric Industrial Co., Ltd.
4 * All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_SMSC911X_H
12#define _ASM_UNIT_SMSC911X_H
13
14#include <linux/netdevice.h>
15#include <proc/irq.h>
16#include <unit/fpga-regs.h>
17
18#define MN10300_USE_EXT_EEPROM
19
20
21#define SMSC911X_BASE 0xA8000000UL
22#define SMSC911X_BASE_END 0xA8000100UL
23#define SMSC911X_IRQ FPGA_LAN_IRQ
24
25/*
26 * Allow the FPGA to be initialised by the SMSC911x driver
27 */
28#undef SMSC_INITIALIZE
29#define SMSC_INITIALIZE() \
30do { \
31 /* release reset */ \
32 ASB2364_FPGA_REG_RESET_LAN = 0x0001; \
33 SyncExBus(); \
34} while (0)
35
36#ifdef MN10300_USE_EXT_EEPROM
37#include <linux/delay.h>
38#include <unit/clock.h>
39
40#define EEPROM_ADDRESS 0xA0
41#define MAC_OFFSET 0x0008
42#define USE_IIC_CH 0 /* 0 or 1 */
43#define IIC_OFFSET (0x80000 * USE_IIC_CH)
44#define IIC_DTRM __SYSREG(0xd8400000 + IIC_OFFSET, u32)
45#define IIC_DREC __SYSREG(0xd8400004 + IIC_OFFSET, u32)
46#define IIC_MYADD __SYSREG(0xd8400008 + IIC_OFFSET, u32)
47#define IIC_CLK __SYSREG(0xd840000c + IIC_OFFSET, u32)
48#define IIC_BRST __SYSREG(0xd8400010 + IIC_OFFSET, u32)
49#define IIC_HOLD __SYSREG(0xd8400014 + IIC_OFFSET, u32)
50#define IIC_BSTS __SYSREG(0xd8400018 + IIC_OFFSET, u32)
51#define IIC_ICR __SYSREG(0xd4000080 + 4 * USE_IIC_CH, u16)
52
53#define IIC_CLK_PLS ((unsigned short)(MN10300_IOCLK / 100000 - 1))
54#define IIC_CLK_LOW ((unsigned short)(IIC_CLK_PLS / 2))
55
56#define SYS_IIC_DTRM_Bit_STA ((unsigned short)0x0400)
57#define SYS_IIC_DTRM_Bit_STO ((unsigned short)0x0200)
58#define SYS_IIC_DTRM_Bit_ACK ((unsigned short)0x0100)
59#define SYS_IIC_DTRM_Bit_DATA ((unsigned short)0x00FF)
60
61static inline void POLL_INT_REQ(volatile u16 *icr)
62{
63 unsigned long flags;
64 u16 tmp;
65
66 while (!(*icr & GxICR_REQUEST))
67 ;
68 flags = arch_local_cli_save();
69 tmp = *icr;
70 *icr = (tmp & GxICR_LEVEL) | GxICR_DETECT;
71 tmp = *icr;
72 arch_local_irq_restore(flags);
73}
74
75/*
76 * Implement the SMSC911x hook for MAC address retrieval
77 */
78#undef smsc_get_mac
79static inline int smsc_get_mac(struct net_device *dev)
80{
81 unsigned char *mac_buf = dev->dev_addr;
82 int i;
83 unsigned short value;
84 unsigned int data;
85 int mac_length = 6;
86 int check;
87 u16 orig_gicr, tmp;
88 unsigned long flags;
89
90 /* save original GnICR and clear GnICR.IE */
91 flags = arch_local_cli_save();
92 orig_gicr = IIC_ICR;
93 IIC_ICR = orig_gicr & GxICR_LEVEL;
94 tmp = IIC_ICR;
95 arch_local_irq_restore(flags);
96
97 IIC_MYADD = 0x00000008;
98 IIC_CLK = (IIC_CLK_LOW << 16) + (IIC_CLK_PLS);
99 /* bus hung recovery */
100
101 while (1) {
102 check = 0;
103 for (i = 0; i < 3; i++) {
104 if ((IIC_BSTS & 0x00000003) == 0x00000003)
105 check++;
106 udelay(3);
107 }
108
109 if (check == 3) {
110 IIC_BRST = 0x00000003;
111 break;
112 } else {
113 for (i = 0; i < 3; i++) {
114 IIC_BRST = 0x00000002;
115 udelay(8);
116 IIC_BRST = 0x00000003;
117 udelay(8);
118 }
119 }
120 }
121
122 IIC_BRST = 0x00000002;
123 IIC_BRST = 0x00000003;
124
125 value = SYS_IIC_DTRM_Bit_STA | SYS_IIC_DTRM_Bit_ACK;
126 value |= (((unsigned short)EEPROM_ADDRESS & SYS_IIC_DTRM_Bit_DATA) |
127 (unsigned short)0x0000);
128 IIC_DTRM = value;
129 POLL_INT_REQ(&IIC_ICR);
130
131 /** send offset of MAC address in EEPROM **/
132 IIC_DTRM = (unsigned char)((MAC_OFFSET & 0xFF00) >> 8);
133 POLL_INT_REQ(&IIC_ICR);
134
135 IIC_DTRM = (unsigned char)(MAC_OFFSET & 0x00FF);
136 POLL_INT_REQ(&IIC_ICR);
137
138 udelay(1000);
139
140 value = SYS_IIC_DTRM_Bit_STA;
141 value |= (((unsigned short)EEPROM_ADDRESS & SYS_IIC_DTRM_Bit_DATA) |
142 (unsigned short)0x0001);
143 IIC_DTRM = value;
144 POLL_INT_REQ(&IIC_ICR);
145
146 IIC_DTRM = 0x00000000;
147 while (mac_length > 0) {
148 POLL_INT_REQ(&IIC_ICR);
149
150 data = IIC_DREC;
151 mac_length--;
152 if (mac_length == 0)
153 value = 0x00000300; /* stop IIC bus */
154 else if (mac_length == 1)
155 value = 0x00000100; /* no ack */
156 else
157 value = 0x00000000; /* ack */
158 IIC_DTRM = value;
159 *mac_buf++ = (unsigned char)(data & 0xff);
160 }
161
162 /* restore GnICR.LV and GnICR.IE */
163 flags = arch_local_cli_save();
164 IIC_ICR = (orig_gicr & (GxICR_LEVEL | GxICR_ENABLE));
165 tmp = IIC_ICR;
166 arch_local_irq_restore(flags);
167
168 return 0;
169}
170#endif /* MN10300_USE_EXT_EEPROM */
171#endif /* _ASM_UNIT_SMSC911X_H */
diff --git a/arch/mn10300/unit-asb2364/include/unit/timex.h b/arch/mn10300/unit-asb2364/include/unit/timex.h
new file mode 100644
index 000000000000..ddb7ed010706
--- /dev/null
+++ b/arch/mn10300/unit-asb2364/include/unit/timex.h
@@ -0,0 +1,159 @@
1/* timex.h: MN2WS0038 architecture timer specifications
2 *
3 * Copyright (C) 2002, 2010 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#ifndef _ASM_UNIT_TIMEX_H
12#define _ASM_UNIT_TIMEX_H
13
14#ifndef __ASSEMBLY__
15#include <linux/irq.h>
16#endif /* __ASSEMBLY__ */
17
18#include <asm/timer-regs.h>
19#include <unit/clock.h>
20#include <asm/param.h>
21
22/*
23 * jiffies counter specifications
24 */
25
26#define TMJCBR_MAX 0xffffff /* 24bit */
27#define TMJCIRQ TMTIRQ
28
29#ifndef __ASSEMBLY__
30
31#define MN10300_SRC_IOBCLK MN10300_IOBCLK
32
33#ifndef HZ
34# error HZ undeclared.
35#endif /* !HZ */
36
37#define MN10300_JCCLK (MN10300_SRC_IOBCLK)
38#define MN10300_TSCCLK (MN10300_SRC_IOBCLK)
39
40#define MN10300_JC_PER_HZ ((MN10300_JCCLK + HZ / 2) / HZ)
41#define MN10300_TSC_PER_HZ ((MN10300_TSCCLK + HZ / 2) / HZ)
42
43/* Check bit width of MTM interval value that sets base register */
44#if (MN10300_JC_PER_HZ - 1) > TMJCBR_MAX
45# error MTM tick timer interval value is overflow.
46#endif
47
48static inline void stop_jiffies_counter(void)
49{
50 u16 tmp;
51 TMTMD = 0;
52 tmp = TMTMD;
53}
54
55static inline void reload_jiffies_counter(u32 cnt)
56{
57 u32 tmp;
58
59 TMTBR = cnt;
60 tmp = TMTBR;
61
62 TMTMD = TMTMD_TMTLDE;
63 TMTMD = TMTMD_TMTCNE;
64 tmp = TMTMD;
65}
66
67#if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_CLOCKEVENTS) && \
68 !defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
69/*
70 * If we aren't using broadcasting, each core needs its own event timer.
71 * Since CPU0 uses the tick timer which is 24-bits, we use timer 4 & 5
72 * cascaded to 32-bits for CPU1 (but only really use 24-bits to match
73 * CPU0).
74 */
75
76#define TMJC1IRQ TM5IRQ
77
78static inline void stop_jiffies_counter1(void)
79{
80 u8 tmp;
81 TM4MD = 0;
82 TM5MD = 0;
83 tmp = TM4MD;
84 tmp = TM5MD;
85}
86
87static inline void reload_jiffies_counter1(u32 cnt)
88{
89 u32 tmp;
90
91 TM45BR = cnt;
92 tmp = TM45BR;
93
94 TM4MD = TM4MD_INIT_COUNTER;
95 tmp = TM4MD;
96
97 TM5MD = TM5MD_SRC_TM4CASCADE | TM5MD_INIT_COUNTER;
98 TM5MD = TM5MD_SRC_TM4CASCADE | TM5MD_COUNT_ENABLE;
99 tmp = TM5MD;
100
101 TM4MD = TM4MD_COUNT_ENABLE;
102 tmp = TM4MD;
103}
104#endif /* CONFIG_SMP&GENERIC_CLOCKEVENTS&!GENERIC_CLOCKEVENTS_BROADCAST */
105
106#endif /* !__ASSEMBLY__ */
107
108
109/*
110 * timestamp counter specifications
111 */
112#define TMTSCBR_MAX 0xffffffff
113
114#ifndef __ASSEMBLY__
115
116/* Use 32-bit timestamp counter */
117#define TMTSCMD TMSMD
118#define TMTSCBR TMSBR
119#define TMTSCBC TMSBC
120#define TMTSCICR TMSICR
121
122static inline void startup_timestamp_counter(void)
123{
124 u32 sync;
125
126 /* set up TMS(Timestamp) 32bit timer register to count real time
127 * - count down from 4Gig-1 to 0 and wrap at IOBCLK rate
128 */
129
130 TMTSCBR = TMTSCBR_MAX;
131 sync = TMTSCBR;
132
133 TMTSCICR = 0;
134 sync = TMTSCICR;
135
136 TMTSCMD = TMTMD_TMTLDE;
137 TMTSCMD = TMTMD_TMTCNE;
138 sync = TMTSCMD;
139}
140
141static inline void shutdown_timestamp_counter(void)
142{
143 TMTSCMD = 0;
144}
145
146/*
147 * we use a cascaded pair of 16-bit down-counting timers to count I/O
148 * clock cycles for the purposes of time keeping
149 */
150typedef unsigned long cycles_t;
151
152static inline cycles_t read_timestamp_counter(void)
153{
154 return (cycles_t)~TMTSCBC;
155}
156
157#endif /* !__ASSEMBLY__ */
158
159#endif /* _ASM_UNIT_TIMEX_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-25 05:13:31 -0500