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-rw-r--r--arch/mn10300/kernel/mn10300-serial.h126
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1/* MN10300 On-chip serial port driver definitions
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#ifndef _MN10300_SERIAL_H
12#define _MN10300_SERIAL_H
13
14#ifndef __ASSEMBLY__
15#include <linux/serial_core.h>
16#include <linux/termios.h>
17#endif
18
19#include <asm/page.h>
20#include <asm/serial-regs.h>
21
22#define NR_PORTS 3 /* should be set 3 or 9 or 16 */
23
24#define MNSC_BUFFER_SIZE +(PAGE_SIZE / 2)
25
26/* intr_flags bits */
27#define MNSCx_RX_AVAIL 0x01
28#define MNSCx_RX_OVERF 0x02
29#define MNSCx_TX_SPACE 0x04
30#define MNSCx_TX_EMPTY 0x08
31
32#ifndef __ASSEMBLY__
33
34struct mn10300_serial_port {
35 char *rx_buffer; /* reception buffer base */
36 unsigned rx_inp; /* pointer to rx input offset */
37 unsigned rx_outp; /* pointer to rx output offset */
38 u8 tx_xchar; /* high-priority XON/XOFF buffer */
39 u8 tx_break; /* transmit break request */
40 u8 intr_flags; /* interrupt flags */
41 volatile u16 *rx_icr; /* Rx interrupt control register */
42 volatile u16 *tx_icr; /* Tx interrupt control register */
43 int rx_irq; /* reception IRQ */
44 int tx_irq; /* transmission IRQ */
45 int tm_irq; /* timer IRQ */
46
47 const char *name; /* name of serial port */
48 const char *rx_name; /* Rx interrupt handler name of serial port */
49 const char *tx_name; /* Tx interrupt handler name of serial port */
50 const char *tm_name; /* Timer interrupt handler name */
51 unsigned short type; /* type of serial port */
52 unsigned char isconsole; /* T if it's a console */
53 volatile void *_iobase; /* pointer to base of I/O control regs */
54 volatile u16 *_control; /* control register pointer */
55 volatile u8 *_status; /* status register pointer */
56 volatile u8 *_intr; /* interrupt register pointer */
57 volatile void *_rxb; /* receive buffer register pointer */
58 volatile void *_txb; /* transmit buffer register pointer */
59 volatile u16 *_tmicr; /* timer interrupt control register */
60 volatile u8 *_tmxmd; /* baud rate timer mode register */
61 volatile u16 *_tmxbr; /* baud rate timer base register */
62
63 /* this must come down here so that assembly can use BSET to access the
64 * above fields */
65 struct uart_port uart;
66
67 unsigned short rx_brk; /* current break reception status */
68 u16 tx_cts; /* current CTS status */
69 int gdbstub; /* preemptively stolen by GDB stub */
70
71 u8 clock_src; /* clock source */
72#define MNSCx_CLOCK_SRC_IOCLK 0
73#define MNSCx_CLOCK_SRC_IOBCLK 1
74
75 u8 div_timer; /* timer used as divisor */
76#define MNSCx_DIV_TIMER_16BIT 0
77#define MNSCx_DIV_TIMER_8BIT 1
78
79 u16 options; /* options */
80#define MNSCx_OPT_CTS 0x0001
81
82 unsigned long ioclk; /* base clock rate */
83};
84
85#ifdef CONFIG_MN10300_TTYSM0
86extern struct mn10300_serial_port mn10300_serial_port_sif0;
87#endif
88
89#ifdef CONFIG_MN10300_TTYSM1
90extern struct mn10300_serial_port mn10300_serial_port_sif1;
91#endif
92
93#ifdef CONFIG_MN10300_TTYSM2
94extern struct mn10300_serial_port mn10300_serial_port_sif2;
95#endif
96
97extern struct mn10300_serial_port *mn10300_serial_ports[];
98
99struct mn10300_serial_int {
100 struct mn10300_serial_port *port;
101 asmlinkage void (*vdma)(void);
102};
103
104extern struct mn10300_serial_int mn10300_serial_int_tbl[];
105
106extern asmlinkage void mn10300_serial_vdma_interrupt(void);
107extern asmlinkage void mn10300_serial_vdma_rx_handler(void);
108extern asmlinkage void mn10300_serial_vdma_tx_handler(void);
109
110#endif /* __ASSEMBLY__ */
111
112#if defined(CONFIG_GDBSTUB_ON_TTYSM0)
113#define SCgSTR SC0STR
114#define SCgRXB SC0RXB
115#define SCgRXIRQ SC0RXIRQ
116#elif defined(CONFIG_GDBSTUB_ON_TTYSM1)
117#define SCgSTR SC1STR
118#define SCgRXB SC1RXB
119#define SCgRXIRQ SC1RXIRQ
120#elif defined(CONFIG_GDBSTUB_ON_TTYSM2)
121#define SCgSTR SC2STR
122#define SCgRXB SC2RXB
123#define SCgRXIRQ SC2RXIRQ
124#endif
125
126#endif /* _MN10300_SERIAL_H */