diff options
Diffstat (limited to 'arch/mn10300/kernel/mn10300-serial.c')
-rw-r--r-- | arch/mn10300/kernel/mn10300-serial.c | 210 |
1 files changed, 181 insertions, 29 deletions
diff --git a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c index db509dd80565..996384dba45d 100644 --- a/arch/mn10300/kernel/mn10300-serial.c +++ b/arch/mn10300/kernel/mn10300-serial.c | |||
@@ -44,6 +44,11 @@ static const char serial_revdate[] = "2007-11-06"; | |||
44 | #include <unit/timex.h> | 44 | #include <unit/timex.h> |
45 | #include "mn10300-serial.h" | 45 | #include "mn10300-serial.h" |
46 | 46 | ||
47 | #ifdef CONFIG_SMP | ||
48 | #undef GxICR | ||
49 | #define GxICR(X) CROSS_GxICR(X, 0) | ||
50 | #endif /* CONFIG_SMP */ | ||
51 | |||
47 | #define kenter(FMT, ...) \ | 52 | #define kenter(FMT, ...) \ |
48 | printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__) | 53 | printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__) |
49 | #define _enter(FMT, ...) \ | 54 | #define _enter(FMT, ...) \ |
@@ -57,6 +62,11 @@ static const char serial_revdate[] = "2007-11-06"; | |||
57 | #define _proto(FMT, ...) \ | 62 | #define _proto(FMT, ...) \ |
58 | no_printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__) | 63 | no_printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__) |
59 | 64 | ||
65 | #ifndef CODMSB | ||
66 | /* c_cflag bit meaning */ | ||
67 | #define CODMSB 004000000000 /* change Transfer bit-order */ | ||
68 | #endif | ||
69 | |||
60 | #define NR_UARTS 3 | 70 | #define NR_UARTS 3 |
61 | 71 | ||
62 | #ifdef CONFIG_MN10300_TTYSM_CONSOLE | 72 | #ifdef CONFIG_MN10300_TTYSM_CONSOLE |
@@ -152,26 +162,35 @@ struct mn10300_serial_port mn10300_serial_port_sif0 = { | |||
152 | .name = "ttySM0", | 162 | .name = "ttySM0", |
153 | ._iobase = &SC0CTR, | 163 | ._iobase = &SC0CTR, |
154 | ._control = &SC0CTR, | 164 | ._control = &SC0CTR, |
155 | ._status = (volatile u8 *) &SC0STR, | 165 | ._status = (volatile u8 *)&SC0STR, |
156 | ._intr = &SC0ICR, | 166 | ._intr = &SC0ICR, |
157 | ._rxb = &SC0RXB, | 167 | ._rxb = &SC0RXB, |
158 | ._txb = &SC0TXB, | 168 | ._txb = &SC0TXB, |
159 | .rx_name = "ttySM0:Rx", | 169 | .rx_name = "ttySM0:Rx", |
160 | .tx_name = "ttySM0:Tx", | 170 | .tx_name = "ttySM0:Tx", |
161 | #ifdef CONFIG_MN10300_TTYSM0_TIMER8 | 171 | #if defined(CONFIG_MN10300_TTYSM0_TIMER8) |
162 | .tm_name = "ttySM0:Timer8", | 172 | .tm_name = "ttySM0:Timer8", |
163 | ._tmxmd = &TM8MD, | 173 | ._tmxmd = &TM8MD, |
164 | ._tmxbr = &TM8BR, | 174 | ._tmxbr = &TM8BR, |
165 | ._tmicr = &TM8ICR, | 175 | ._tmicr = &TM8ICR, |
166 | .tm_irq = TM8IRQ, | 176 | .tm_irq = TM8IRQ, |
167 | .div_timer = MNSCx_DIV_TIMER_16BIT, | 177 | .div_timer = MNSCx_DIV_TIMER_16BIT, |
168 | #else /* CONFIG_MN10300_TTYSM0_TIMER2 */ | 178 | #elif defined(CONFIG_MN10300_TTYSM0_TIMER0) |
179 | .tm_name = "ttySM0:Timer0", | ||
180 | ._tmxmd = &TM0MD, | ||
181 | ._tmxbr = (volatile u16 *)&TM0BR, | ||
182 | ._tmicr = &TM0ICR, | ||
183 | .tm_irq = TM0IRQ, | ||
184 | .div_timer = MNSCx_DIV_TIMER_8BIT, | ||
185 | #elif defined(CONFIG_MN10300_TTYSM0_TIMER2) | ||
169 | .tm_name = "ttySM0:Timer2", | 186 | .tm_name = "ttySM0:Timer2", |
170 | ._tmxmd = &TM2MD, | 187 | ._tmxmd = &TM2MD, |
171 | ._tmxbr = (volatile u16 *) &TM2BR, | 188 | ._tmxbr = (volatile u16 *)&TM2BR, |
172 | ._tmicr = &TM2ICR, | 189 | ._tmicr = &TM2ICR, |
173 | .tm_irq = TM2IRQ, | 190 | .tm_irq = TM2IRQ, |
174 | .div_timer = MNSCx_DIV_TIMER_8BIT, | 191 | .div_timer = MNSCx_DIV_TIMER_8BIT, |
192 | #else | ||
193 | #error "Unknown config for ttySM0" | ||
175 | #endif | 194 | #endif |
176 | .rx_irq = SC0RXIRQ, | 195 | .rx_irq = SC0RXIRQ, |
177 | .tx_irq = SC0TXIRQ, | 196 | .tx_irq = SC0TXIRQ, |
@@ -205,26 +224,35 @@ struct mn10300_serial_port mn10300_serial_port_sif1 = { | |||
205 | .name = "ttySM1", | 224 | .name = "ttySM1", |
206 | ._iobase = &SC1CTR, | 225 | ._iobase = &SC1CTR, |
207 | ._control = &SC1CTR, | 226 | ._control = &SC1CTR, |
208 | ._status = (volatile u8 *) &SC1STR, | 227 | ._status = (volatile u8 *)&SC1STR, |
209 | ._intr = &SC1ICR, | 228 | ._intr = &SC1ICR, |
210 | ._rxb = &SC1RXB, | 229 | ._rxb = &SC1RXB, |
211 | ._txb = &SC1TXB, | 230 | ._txb = &SC1TXB, |
212 | .rx_name = "ttySM1:Rx", | 231 | .rx_name = "ttySM1:Rx", |
213 | .tx_name = "ttySM1:Tx", | 232 | .tx_name = "ttySM1:Tx", |
214 | #ifdef CONFIG_MN10300_TTYSM1_TIMER9 | 233 | #if defined(CONFIG_MN10300_TTYSM1_TIMER9) |
215 | .tm_name = "ttySM1:Timer9", | 234 | .tm_name = "ttySM1:Timer9", |
216 | ._tmxmd = &TM9MD, | 235 | ._tmxmd = &TM9MD, |
217 | ._tmxbr = &TM9BR, | 236 | ._tmxbr = &TM9BR, |
218 | ._tmicr = &TM9ICR, | 237 | ._tmicr = &TM9ICR, |
219 | .tm_irq = TM9IRQ, | 238 | .tm_irq = TM9IRQ, |
220 | .div_timer = MNSCx_DIV_TIMER_16BIT, | 239 | .div_timer = MNSCx_DIV_TIMER_16BIT, |
221 | #else /* CONFIG_MN10300_TTYSM1_TIMER3 */ | 240 | #elif defined(CONFIG_MN10300_TTYSM1_TIMER3) |
222 | .tm_name = "ttySM1:Timer3", | 241 | .tm_name = "ttySM1:Timer3", |
223 | ._tmxmd = &TM3MD, | 242 | ._tmxmd = &TM3MD, |
224 | ._tmxbr = (volatile u16 *) &TM3BR, | 243 | ._tmxbr = (volatile u16 *)&TM3BR, |
225 | ._tmicr = &TM3ICR, | 244 | ._tmicr = &TM3ICR, |
226 | .tm_irq = TM3IRQ, | 245 | .tm_irq = TM3IRQ, |
227 | .div_timer = MNSCx_DIV_TIMER_8BIT, | 246 | .div_timer = MNSCx_DIV_TIMER_8BIT, |
247 | #elif defined(CONFIG_MN10300_TTYSM1_TIMER12) | ||
248 | .tm_name = "ttySM1/Timer12", | ||
249 | ._tmxmd = &TM12MD, | ||
250 | ._tmxbr = &TM12BR, | ||
251 | ._tmicr = &TM12ICR, | ||
252 | .tm_irq = TM12IRQ, | ||
253 | .div_timer = MNSCx_DIV_TIMER_16BIT, | ||
254 | #else | ||
255 | #error "Unknown config for ttySM1" | ||
228 | #endif | 256 | #endif |
229 | .rx_irq = SC1RXIRQ, | 257 | .rx_irq = SC1RXIRQ, |
230 | .tx_irq = SC1TXIRQ, | 258 | .tx_irq = SC1TXIRQ, |
@@ -260,20 +288,45 @@ struct mn10300_serial_port mn10300_serial_port_sif2 = { | |||
260 | .uart.lock = | 288 | .uart.lock = |
261 | __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif2.uart.lock), | 289 | __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif2.uart.lock), |
262 | .name = "ttySM2", | 290 | .name = "ttySM2", |
263 | .rx_name = "ttySM2:Rx", | ||
264 | .tx_name = "ttySM2:Tx", | ||
265 | .tm_name = "ttySM2:Timer10", | ||
266 | ._iobase = &SC2CTR, | 291 | ._iobase = &SC2CTR, |
267 | ._control = &SC2CTR, | 292 | ._control = &SC2CTR, |
268 | ._status = &SC2STR, | 293 | ._status = (volatile u8 *)&SC2STR, |
269 | ._intr = &SC2ICR, | 294 | ._intr = &SC2ICR, |
270 | ._rxb = &SC2RXB, | 295 | ._rxb = &SC2RXB, |
271 | ._txb = &SC2TXB, | 296 | ._txb = &SC2TXB, |
297 | .rx_name = "ttySM2:Rx", | ||
298 | .tx_name = "ttySM2:Tx", | ||
299 | #if defined(CONFIG_MN10300_TTYSM2_TIMER10) | ||
300 | .tm_name = "ttySM2/Timer10", | ||
272 | ._tmxmd = &TM10MD, | 301 | ._tmxmd = &TM10MD, |
273 | ._tmxbr = &TM10BR, | 302 | ._tmxbr = &TM10BR, |
274 | ._tmicr = &TM10ICR, | 303 | ._tmicr = &TM10ICR, |
275 | .tm_irq = TM10IRQ, | 304 | .tm_irq = TM10IRQ, |
276 | .div_timer = MNSCx_DIV_TIMER_16BIT, | 305 | .div_timer = MNSCx_DIV_TIMER_16BIT, |
306 | #elif defined(CONFIG_MN10300_TTYSM2_TIMER9) | ||
307 | .tm_name = "ttySM2/Timer9", | ||
308 | ._tmxmd = &TM9MD, | ||
309 | ._tmxbr = &TM9BR, | ||
310 | ._tmicr = &TM9ICR, | ||
311 | .tm_irq = TM9IRQ, | ||
312 | .div_timer = MNSCx_DIV_TIMER_16BIT, | ||
313 | #elif defined(CONFIG_MN10300_TTYSM2_TIMER1) | ||
314 | .tm_name = "ttySM2/Timer1", | ||
315 | ._tmxmd = &TM1MD, | ||
316 | ._tmxbr = (volatile u16 *)&TM1BR, | ||
317 | ._tmicr = &TM1ICR, | ||
318 | .tm_irq = TM1IRQ, | ||
319 | .div_timer = MNSCx_DIV_TIMER_8BIT, | ||
320 | #elif defined(CONFIG_MN10300_TTYSM2_TIMER3) | ||
321 | .tm_name = "ttySM2/Timer3", | ||
322 | ._tmxmd = &TM3MD, | ||
323 | ._tmxbr = (volatile u16 *)&TM3BR, | ||
324 | ._tmicr = &TM3ICR, | ||
325 | .tm_irq = TM3IRQ, | ||
326 | .div_timer = MNSCx_DIV_TIMER_8BIT, | ||
327 | #else | ||
328 | #error "Unknown config for ttySM2" | ||
329 | #endif | ||
277 | .rx_irq = SC2RXIRQ, | 330 | .rx_irq = SC2RXIRQ, |
278 | .tx_irq = SC2TXIRQ, | 331 | .tx_irq = SC2TXIRQ, |
279 | .rx_icr = &GxICR(SC2RXIRQ), | 332 | .rx_icr = &GxICR(SC2RXIRQ), |
@@ -322,9 +375,13 @@ struct mn10300_serial_port *mn10300_serial_ports[NR_UARTS + 1] = { | |||
322 | */ | 375 | */ |
323 | static void mn10300_serial_mask_ack(unsigned int irq) | 376 | static void mn10300_serial_mask_ack(unsigned int irq) |
324 | { | 377 | { |
378 | unsigned long flags; | ||
325 | u16 tmp; | 379 | u16 tmp; |
380 | |||
381 | flags = arch_local_cli_save(); | ||
326 | GxICR(irq) = GxICR_LEVEL_6; | 382 | GxICR(irq) = GxICR_LEVEL_6; |
327 | tmp = GxICR(irq); /* flush write buffer */ | 383 | tmp = GxICR(irq); /* flush write buffer */ |
384 | arch_local_irq_restore(flags); | ||
328 | } | 385 | } |
329 | 386 | ||
330 | static void mn10300_serial_nop(unsigned int irq) | 387 | static void mn10300_serial_nop(unsigned int irq) |
@@ -348,23 +405,36 @@ struct mn10300_serial_int mn10300_serial_int_tbl[NR_IRQS]; | |||
348 | 405 | ||
349 | static void mn10300_serial_dis_tx_intr(struct mn10300_serial_port *port) | 406 | static void mn10300_serial_dis_tx_intr(struct mn10300_serial_port *port) |
350 | { | 407 | { |
408 | unsigned long flags; | ||
351 | u16 x; | 409 | u16 x; |
352 | *port->tx_icr = GxICR_LEVEL_1 | GxICR_DETECT; | 410 | |
411 | flags = arch_local_cli_save(); | ||
412 | *port->tx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL); | ||
353 | x = *port->tx_icr; | 413 | x = *port->tx_icr; |
414 | arch_local_irq_restore(flags); | ||
354 | } | 415 | } |
355 | 416 | ||
356 | static void mn10300_serial_en_tx_intr(struct mn10300_serial_port *port) | 417 | static void mn10300_serial_en_tx_intr(struct mn10300_serial_port *port) |
357 | { | 418 | { |
419 | unsigned long flags; | ||
358 | u16 x; | 420 | u16 x; |
359 | *port->tx_icr = GxICR_LEVEL_1 | GxICR_ENABLE; | 421 | |
422 | flags = arch_local_cli_save(); | ||
423 | *port->tx_icr = | ||
424 | NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL) | GxICR_ENABLE; | ||
360 | x = *port->tx_icr; | 425 | x = *port->tx_icr; |
426 | arch_local_irq_restore(flags); | ||
361 | } | 427 | } |
362 | 428 | ||
363 | static void mn10300_serial_dis_rx_intr(struct mn10300_serial_port *port) | 429 | static void mn10300_serial_dis_rx_intr(struct mn10300_serial_port *port) |
364 | { | 430 | { |
431 | unsigned long flags; | ||
365 | u16 x; | 432 | u16 x; |
366 | *port->rx_icr = GxICR_LEVEL_1 | GxICR_DETECT; | 433 | |
434 | flags = arch_local_cli_save(); | ||
435 | *port->rx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL); | ||
367 | x = *port->rx_icr; | 436 | x = *port->rx_icr; |
437 | arch_local_irq_restore(flags); | ||
368 | } | 438 | } |
369 | 439 | ||
370 | /* | 440 | /* |
@@ -650,7 +720,7 @@ static unsigned int mn10300_serial_tx_empty(struct uart_port *_port) | |||
650 | static void mn10300_serial_set_mctrl(struct uart_port *_port, | 720 | static void mn10300_serial_set_mctrl(struct uart_port *_port, |
651 | unsigned int mctrl) | 721 | unsigned int mctrl) |
652 | { | 722 | { |
653 | struct mn10300_serial_port *port = | 723 | struct mn10300_serial_port *port __attribute__ ((unused)) = |
654 | container_of(_port, struct mn10300_serial_port, uart); | 724 | container_of(_port, struct mn10300_serial_port, uart); |
655 | 725 | ||
656 | _enter("%s,%x", port->name, mctrl); | 726 | _enter("%s,%x", port->name, mctrl); |
@@ -706,6 +776,7 @@ static void mn10300_serial_start_tx(struct uart_port *_port) | |||
706 | UART_XMIT_SIZE)); | 776 | UART_XMIT_SIZE)); |
707 | 777 | ||
708 | /* kick the virtual DMA controller */ | 778 | /* kick the virtual DMA controller */ |
779 | arch_local_cli(); | ||
709 | x = *port->tx_icr; | 780 | x = *port->tx_icr; |
710 | x |= GxICR_ENABLE; | 781 | x |= GxICR_ENABLE; |
711 | 782 | ||
@@ -716,10 +787,14 @@ static void mn10300_serial_start_tx(struct uart_port *_port) | |||
716 | 787 | ||
717 | _debug("CTR=%04hx ICR=%02hx STR=%04x TMD=%02hx TBR=%04hx ICR=%04hx", | 788 | _debug("CTR=%04hx ICR=%02hx STR=%04x TMD=%02hx TBR=%04hx ICR=%04hx", |
718 | *port->_control, *port->_intr, *port->_status, | 789 | *port->_control, *port->_intr, *port->_status, |
719 | *port->_tmxmd, *port->_tmxbr, *port->tx_icr); | 790 | *port->_tmxmd, |
791 | (port->div_timer == MNSCx_DIV_TIMER_8BIT) ? | ||
792 | *(volatile u8 *)port->_tmxbr : *port->_tmxbr, | ||
793 | *port->tx_icr); | ||
720 | 794 | ||
721 | *port->tx_icr = x; | 795 | *port->tx_icr = x; |
722 | x = *port->tx_icr; | 796 | x = *port->tx_icr; |
797 | arch_local_sti(); | ||
723 | } | 798 | } |
724 | 799 | ||
725 | /* | 800 | /* |
@@ -842,8 +917,10 @@ static int mn10300_serial_startup(struct uart_port *_port) | |||
842 | pint->port = port; | 917 | pint->port = port; |
843 | pint->vdma = mn10300_serial_vdma_tx_handler; | 918 | pint->vdma = mn10300_serial_vdma_tx_handler; |
844 | 919 | ||
845 | set_intr_level(port->rx_irq, GxICR_LEVEL_1); | 920 | set_intr_level(port->rx_irq, |
846 | set_intr_level(port->tx_irq, GxICR_LEVEL_1); | 921 | NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL)); |
922 | set_intr_level(port->tx_irq, | ||
923 | NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL)); | ||
847 | set_irq_chip(port->tm_irq, &mn10300_serial_pic); | 924 | set_irq_chip(port->tm_irq, &mn10300_serial_pic); |
848 | 925 | ||
849 | if (request_irq(port->rx_irq, mn10300_serial_interrupt, | 926 | if (request_irq(port->rx_irq, mn10300_serial_interrupt, |
@@ -876,6 +953,7 @@ error: | |||
876 | */ | 953 | */ |
877 | static void mn10300_serial_shutdown(struct uart_port *_port) | 954 | static void mn10300_serial_shutdown(struct uart_port *_port) |
878 | { | 955 | { |
956 | u16 x; | ||
879 | struct mn10300_serial_port *port = | 957 | struct mn10300_serial_port *port = |
880 | container_of(_port, struct mn10300_serial_port, uart); | 958 | container_of(_port, struct mn10300_serial_port, uart); |
881 | 959 | ||
@@ -897,8 +975,12 @@ static void mn10300_serial_shutdown(struct uart_port *_port) | |||
897 | free_irq(port->rx_irq, port); | 975 | free_irq(port->rx_irq, port); |
898 | free_irq(port->tx_irq, port); | 976 | free_irq(port->tx_irq, port); |
899 | 977 | ||
900 | *port->rx_icr = GxICR_LEVEL_1; | 978 | arch_local_cli(); |
901 | *port->tx_icr = GxICR_LEVEL_1; | 979 | *port->rx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL); |
980 | x = *port->rx_icr; | ||
981 | *port->tx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL); | ||
982 | x = *port->tx_icr; | ||
983 | arch_local_sti(); | ||
902 | } | 984 | } |
903 | 985 | ||
904 | /* | 986 | /* |
@@ -947,11 +1029,66 @@ static void mn10300_serial_change_speed(struct mn10300_serial_port *port, | |||
947 | /* Determine divisor based on baud rate */ | 1029 | /* Determine divisor based on baud rate */ |
948 | battempt = 0; | 1030 | battempt = 0; |
949 | 1031 | ||
950 | if (div_timer == MNSCx_DIV_TIMER_16BIT) | 1032 | switch (port->uart.line) { |
951 | scxctr |= SC0CTR_CK_TM8UFLOW_8; /* ( == SC1CTR_CK_TM9UFLOW_8 | 1033 | #ifdef CONFIG_MN10300_TTYSM0 |
952 | * == SC2CTR_CK_TM10UFLOW) */ | 1034 | case 0: /* ttySM0 */ |
953 | else if (div_timer == MNSCx_DIV_TIMER_8BIT) | 1035 | #if defined(CONFIG_MN10300_TTYSM0_TIMER8) |
1036 | scxctr |= SC0CTR_CK_TM8UFLOW_8; | ||
1037 | #elif defined(CONFIG_MN10300_TTYSM0_TIMER0) | ||
1038 | scxctr |= SC0CTR_CK_TM0UFLOW_8; | ||
1039 | #elif defined(CONFIG_MN10300_TTYSM0_TIMER2) | ||
954 | scxctr |= SC0CTR_CK_TM2UFLOW_8; | 1040 | scxctr |= SC0CTR_CK_TM2UFLOW_8; |
1041 | #else | ||
1042 | #error "Unknown config for ttySM0" | ||
1043 | #endif | ||
1044 | break; | ||
1045 | #endif /* CONFIG_MN10300_TTYSM0 */ | ||
1046 | |||
1047 | #ifdef CONFIG_MN10300_TTYSM1 | ||
1048 | case 1: /* ttySM1 */ | ||
1049 | #if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3) | ||
1050 | #if defined(CONFIG_MN10300_TTYSM1_TIMER9) | ||
1051 | scxctr |= SC1CTR_CK_TM9UFLOW_8; | ||
1052 | #elif defined(CONFIG_MN10300_TTYSM1_TIMER3) | ||
1053 | scxctr |= SC1CTR_CK_TM3UFLOW_8; | ||
1054 | #else | ||
1055 | #error "Unknown config for ttySM1" | ||
1056 | #endif | ||
1057 | #else /* CONFIG_AM33_2 || CONFIG_AM33_3 */ | ||
1058 | #if defined(CONFIG_MN10300_TTYSM1_TIMER12) | ||
1059 | scxctr |= SC1CTR_CK_TM12UFLOW_8; | ||
1060 | #else | ||
1061 | #error "Unknown config for ttySM1" | ||
1062 | #endif | ||
1063 | #endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */ | ||
1064 | break; | ||
1065 | #endif /* CONFIG_MN10300_TTYSM1 */ | ||
1066 | |||
1067 | #ifdef CONFIG_MN10300_TTYSM2 | ||
1068 | case 2: /* ttySM2 */ | ||
1069 | #if defined(CONFIG_AM33_2) | ||
1070 | #if defined(CONFIG_MN10300_TTYSM2_TIMER10) | ||
1071 | scxctr |= SC2CTR_CK_TM10UFLOW; | ||
1072 | #else | ||
1073 | #error "Unknown config for ttySM2" | ||
1074 | #endif | ||
1075 | #else /* CONFIG_AM33_2 */ | ||
1076 | #if defined(CONFIG_MN10300_TTYSM2_TIMER9) | ||
1077 | scxctr |= SC2CTR_CK_TM9UFLOW_8; | ||
1078 | #elif defined(CONFIG_MN10300_TTYSM2_TIMER1) | ||
1079 | scxctr |= SC2CTR_CK_TM1UFLOW_8; | ||
1080 | #elif defined(CONFIG_MN10300_TTYSM2_TIMER3) | ||
1081 | scxctr |= SC2CTR_CK_TM3UFLOW_8; | ||
1082 | #else | ||
1083 | #error "Unknown config for ttySM2" | ||
1084 | #endif | ||
1085 | #endif /* CONFIG_AM33_2 */ | ||
1086 | break; | ||
1087 | #endif /* CONFIG_MN10300_TTYSM2 */ | ||
1088 | |||
1089 | default: | ||
1090 | break; | ||
1091 | } | ||
955 | 1092 | ||
956 | try_alternative: | 1093 | try_alternative: |
957 | baud = uart_get_baud_rate(&port->uart, new, old, 0, | 1094 | baud = uart_get_baud_rate(&port->uart, new, old, 0, |
@@ -1195,6 +1332,12 @@ static void mn10300_serial_set_termios(struct uart_port *_port, | |||
1195 | ctr &= ~SC2CTR_TWE; | 1332 | ctr &= ~SC2CTR_TWE; |
1196 | *port->_control = ctr; | 1333 | *port->_control = ctr; |
1197 | } | 1334 | } |
1335 | |||
1336 | /* change Transfer bit-order (LSB/MSB) */ | ||
1337 | if (new->c_cflag & CODMSB) | ||
1338 | *port->_control |= SC01CTR_OD_MSBFIRST; /* MSB MODE */ | ||
1339 | else | ||
1340 | *port->_control &= ~SC01CTR_OD_MSBFIRST; /* LSB MODE */ | ||
1198 | } | 1341 | } |
1199 | 1342 | ||
1200 | /* | 1343 | /* |
@@ -1302,11 +1445,16 @@ static int __init mn10300_serial_init(void) | |||
1302 | printk(KERN_INFO "%s version %s (%s)\n", | 1445 | printk(KERN_INFO "%s version %s (%s)\n", |
1303 | serial_name, serial_version, serial_revdate); | 1446 | serial_name, serial_version, serial_revdate); |
1304 | 1447 | ||
1305 | #ifdef CONFIG_MN10300_TTYSM2 | 1448 | #if defined(CONFIG_MN10300_TTYSM2) && defined(CONFIG_AM33_2) |
1306 | SC2TIM = 8; /* make the baud base of timer 2 IOCLK/8 */ | 1449 | { |
1450 | int tmp; | ||
1451 | SC2TIM = 8; /* make the baud base of timer 2 IOCLK/8 */ | ||
1452 | tmp = SC2TIM; | ||
1453 | } | ||
1307 | #endif | 1454 | #endif |
1308 | 1455 | ||
1309 | set_intr_stub(EXCEP_IRQ_LEVEL1, mn10300_serial_vdma_interrupt); | 1456 | set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL), |
1457 | mn10300_serial_vdma_interrupt); | ||
1310 | 1458 | ||
1311 | ret = uart_register_driver(&mn10300_serial_driver); | 1459 | ret = uart_register_driver(&mn10300_serial_driver); |
1312 | if (!ret) { | 1460 | if (!ret) { |
@@ -1366,9 +1514,11 @@ static void mn10300_serial_console_write(struct console *co, | |||
1366 | port = mn10300_serial_ports[co->index]; | 1514 | port = mn10300_serial_ports[co->index]; |
1367 | 1515 | ||
1368 | /* firstly hijack the serial port from the "virtual DMA" controller */ | 1516 | /* firstly hijack the serial port from the "virtual DMA" controller */ |
1517 | arch_local_cli(); | ||
1369 | txicr = *port->tx_icr; | 1518 | txicr = *port->tx_icr; |
1370 | *port->tx_icr = GxICR_LEVEL_1; | 1519 | *port->tx_icr = NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL); |
1371 | tmp = *port->tx_icr; | 1520 | tmp = *port->tx_icr; |
1521 | arch_local_sti(); | ||
1372 | 1522 | ||
1373 | /* the transmitter may be disabled */ | 1523 | /* the transmitter may be disabled */ |
1374 | scxctr = *port->_control; | 1524 | scxctr = *port->_control; |
@@ -1422,8 +1572,10 @@ static void mn10300_serial_console_write(struct console *co, | |||
1422 | if (!(scxctr & SC01CTR_TXE)) | 1572 | if (!(scxctr & SC01CTR_TXE)) |
1423 | *port->_control = scxctr; | 1573 | *port->_control = scxctr; |
1424 | 1574 | ||
1575 | arch_local_cli(); | ||
1425 | *port->tx_icr = txicr; | 1576 | *port->tx_icr = txicr; |
1426 | tmp = *port->tx_icr; | 1577 | tmp = *port->tx_icr; |
1578 | arch_local_sti(); | ||
1427 | } | 1579 | } |
1428 | 1580 | ||
1429 | /* | 1581 | /* |