diff options
Diffstat (limited to 'arch/mn10300/include/asm/cache.h')
| -rw-r--r-- | arch/mn10300/include/asm/cache.h | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/arch/mn10300/include/asm/cache.h b/arch/mn10300/include/asm/cache.h index 781bf613366d..f29cde2cfc91 100644 --- a/arch/mn10300/include/asm/cache.h +++ b/arch/mn10300/include/asm/cache.h | |||
| @@ -43,14 +43,18 @@ | |||
| 43 | 43 | ||
| 44 | /* instruction cache access registers */ | 44 | /* instruction cache access registers */ |
| 45 | #define ICACHE_DATA(WAY, ENTRY, OFF) \ | 45 | #define ICACHE_DATA(WAY, ENTRY, OFF) \ |
| 46 | __SYSREG(0xc8000000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32) | 46 | __SYSREG(0xc8000000 + (WAY) * L1_CACHE_WAYDISP + \ |
| 47 | (ENTRY) * L1_CACHE_BYTES + (OFF) * 4, u32) | ||
| 47 | #define ICACHE_TAG(WAY, ENTRY) \ | 48 | #define ICACHE_TAG(WAY, ENTRY) \ |
| 48 | __SYSREG(0xc8100000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32) | 49 | __SYSREG(0xc8100000 + (WAY) * L1_CACHE_WAYDISP + \ |
| 50 | (ENTRY) * L1_CACHE_BYTES, u32) | ||
| 49 | 51 | ||
| 50 | /* instruction cache access registers */ | 52 | /* data cache access registers */ |
| 51 | #define DCACHE_DATA(WAY, ENTRY, OFF) \ | 53 | #define DCACHE_DATA(WAY, ENTRY, OFF) \ |
| 52 | __SYSREG(0xc8200000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32) | 54 | __SYSREG(0xc8200000 + (WAY) * L1_CACHE_WAYDISP + \ |
| 55 | (ENTRY) * L1_CACHE_BYTES + (OFF) * 4, u32) | ||
| 53 | #define DCACHE_TAG(WAY, ENTRY) \ | 56 | #define DCACHE_TAG(WAY, ENTRY) \ |
| 54 | __SYSREG(0xc8300000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32) | 57 | __SYSREG(0xc8300000 + (WAY) * L1_CACHE_WAYDISP + \ |
| 58 | (ENTRY) * L1_CACHE_BYTES, u32) | ||
| 55 | 59 | ||
| 56 | #endif /* _ASM_CACHE_H */ | 60 | #endif /* _ASM_CACHE_H */ |