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-rw-r--r--arch/mn10300/boot/compressed/head.S86
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diff --git a/arch/mn10300/boot/compressed/head.S b/arch/mn10300/boot/compressed/head.S
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1/* Boot entry point for a compressed MN10300 kernel
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11 .section .text
12
13#define DEBUG
14
15#include <linux/linkage.h>
16#include <asm/cpu-regs.h>
17
18 .globl startup_32
19startup_32:
20 # first save off parameters from bootloader
21 mov param_save_area,a0
22 mov d0,(a0)
23 mov d1,(4,a0)
24 mov d2,(8,a0)
25
26 mov sp,a3
27 mov decomp_stack+0x2000-4,a0
28 mov a0,sp
29
30 # invalidate and enable both of the caches
31 mov CHCTR,a0
32 clr d0
33 movhu d0,(a0) # turn off first
34 mov CHCTR_ICINV|CHCTR_DCINV,d0
35 movhu d0,(a0)
36 setlb
37 mov (a0),d0
38 btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy
39 lne
40 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD,d0 # writethru dcache
41 movhu d0,(a0) # enable
42
43 # clear the BSS area
44 mov __bss_start,a0
45 mov _end,a1
46 clr d0
47bssclear:
48 cmp a1,a0
49 bge bssclear_end
50 movbu d0,(a0)
51 inc a0
52 bra bssclear
53bssclear_end:
54
55 # decompress the kernel
56 call decompress_kernel[],0
57
58 # disable caches again
59 mov CHCTR,a0
60 clr d0
61 movhu d0,(a0)
62 setlb
63 mov (a0),d0
64 btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy
65 lne
66
67 mov param_save_area,a0
68 mov (a0),d0
69 mov (4,a0),d1
70 mov (8,a0),d2
71
72 mov a3,sp
73 mov CONFIG_KERNEL_TEXT_ADDRESS,a0
74 jmp (a0)
75
76 .data
77 .align 4
78param_save_area:
79 .rept 3
80 .word 0
81 .endr
82
83 .section .bss
84 .align 4
85decomp_stack:
86 .space 0x2000