diff options
Diffstat (limited to 'arch/mips')
25 files changed, 110 insertions, 73 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index dcae3a7035db..95fa1f1d5c8b 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -1776,12 +1776,12 @@ endchoice | |||
1776 | 1776 | ||
1777 | config FORCE_MAX_ZONEORDER | 1777 | config FORCE_MAX_ZONEORDER |
1778 | int "Maximum zone order" | 1778 | int "Maximum zone order" |
1779 | range 14 64 if HUGETLB_PAGE && PAGE_SIZE_64KB | 1779 | range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB |
1780 | default "14" if HUGETLB_PAGE && PAGE_SIZE_64KB | 1780 | default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB |
1781 | range 13 64 if HUGETLB_PAGE && PAGE_SIZE_32KB | 1781 | range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB |
1782 | default "13" if HUGETLB_PAGE && PAGE_SIZE_32KB | 1782 | default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB |
1783 | range 12 64 if HUGETLB_PAGE && PAGE_SIZE_16KB | 1783 | range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB |
1784 | default "12" if HUGETLB_PAGE && PAGE_SIZE_16KB | 1784 | default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB |
1785 | range 11 64 | 1785 | range 11 64 |
1786 | default "11" | 1786 | default "11" |
1787 | help | 1787 | help |
@@ -2353,9 +2353,8 @@ config SECCOMP | |||
2353 | If unsure, say Y. Only embedded should say N here. | 2353 | If unsure, say Y. Only embedded should say N here. |
2354 | 2354 | ||
2355 | config MIPS_O32_FP64_SUPPORT | 2355 | config MIPS_O32_FP64_SUPPORT |
2356 | bool "Support for O32 binaries using 64-bit FP" | 2356 | bool "Support for O32 binaries using 64-bit FP (EXPERIMENTAL)" |
2357 | depends on 32BIT || MIPS32_O32 | 2357 | depends on 32BIT || MIPS32_O32 |
2358 | default y | ||
2359 | help | 2358 | help |
2360 | When this is enabled, the kernel will support use of 64-bit floating | 2359 | When this is enabled, the kernel will support use of 64-bit floating |
2361 | point registers with binaries using the O32 ABI along with the | 2360 | point registers with binaries using the O32 ABI along with the |
@@ -2367,7 +2366,14 @@ config MIPS_O32_FP64_SUPPORT | |||
2367 | of your kernel & potentially improve FP emulation performance by | 2366 | of your kernel & potentially improve FP emulation performance by |
2368 | saying N here. | 2367 | saying N here. |
2369 | 2368 | ||
2370 | If unsure, say Y. | 2369 | Although binutils currently supports use of this flag the details |
2370 | concerning its effect upon the O32 ABI in userland are still being | ||
2371 | worked on. In order to avoid userland becoming dependant upon current | ||
2372 | behaviour before the details have been finalised, this option should | ||
2373 | be considered experimental and only enabled by those working upon | ||
2374 | said details. | ||
2375 | |||
2376 | If unsure, say N. | ||
2371 | 2377 | ||
2372 | config USE_OF | 2378 | config USE_OF |
2373 | bool | 2379 | bool |
diff --git a/arch/mips/alchemy/board-gpr.c b/arch/mips/alchemy/board-gpr.c index 9edc35ff8cf1..acf9a2a37f5a 100644 --- a/arch/mips/alchemy/board-gpr.c +++ b/arch/mips/alchemy/board-gpr.c | |||
@@ -53,10 +53,8 @@ void __init prom_init(void) | |||
53 | prom_init_cmdline(); | 53 | prom_init_cmdline(); |
54 | 54 | ||
55 | memsize_str = prom_getenv("memsize"); | 55 | memsize_str = prom_getenv("memsize"); |
56 | if (!memsize_str) | 56 | if (!memsize_str || kstrtoul(memsize_str, 0, &memsize)) |
57 | memsize = 0x04000000; | 57 | memsize = 0x04000000; |
58 | else | ||
59 | strict_strtoul(memsize_str, 0, &memsize); | ||
60 | add_memory_region(0, memsize, BOOT_MEM_RAM); | 58 | add_memory_region(0, memsize, BOOT_MEM_RAM); |
61 | } | 59 | } |
62 | 60 | ||
diff --git a/arch/mips/alchemy/board-mtx1.c b/arch/mips/alchemy/board-mtx1.c index 9969dbab19e3..25a59a23547e 100644 --- a/arch/mips/alchemy/board-mtx1.c +++ b/arch/mips/alchemy/board-mtx1.c | |||
@@ -52,10 +52,8 @@ void __init prom_init(void) | |||
52 | prom_init_cmdline(); | 52 | prom_init_cmdline(); |
53 | 53 | ||
54 | memsize_str = prom_getenv("memsize"); | 54 | memsize_str = prom_getenv("memsize"); |
55 | if (!memsize_str) | 55 | if (!memsize_str || kstrtoul(memsize_str, 0, &memsize)) |
56 | memsize = 0x04000000; | 56 | memsize = 0x04000000; |
57 | else | ||
58 | strict_strtoul(memsize_str, 0, &memsize); | ||
59 | add_memory_region(0, memsize, BOOT_MEM_RAM); | 57 | add_memory_region(0, memsize, BOOT_MEM_RAM); |
60 | } | 58 | } |
61 | 59 | ||
diff --git a/arch/mips/alchemy/devboards/db1000.c b/arch/mips/alchemy/devboards/db1000.c index 11f3ad20321c..5483906e0f86 100644 --- a/arch/mips/alchemy/devboards/db1000.c +++ b/arch/mips/alchemy/devboards/db1000.c | |||
@@ -534,13 +534,10 @@ static int __init db1000_dev_init(void) | |||
534 | s0 = AU1100_GPIO1_INT; | 534 | s0 = AU1100_GPIO1_INT; |
535 | s1 = AU1100_GPIO4_INT; | 535 | s1 = AU1100_GPIO4_INT; |
536 | 536 | ||
537 | gpio_request(19, "sd0_cd"); | ||
538 | gpio_request(20, "sd1_cd"); | ||
537 | gpio_direction_input(19); /* sd0 cd# */ | 539 | gpio_direction_input(19); /* sd0 cd# */ |
538 | gpio_direction_input(20); /* sd1 cd# */ | 540 | gpio_direction_input(20); /* sd1 cd# */ |
539 | gpio_direction_input(21); /* touch pendown# */ | ||
540 | gpio_direction_input(207); /* SPI MISO */ | ||
541 | gpio_direction_output(208, 0); /* SPI MOSI */ | ||
542 | gpio_direction_output(209, 1); /* SPI SCK */ | ||
543 | gpio_direction_output(210, 1); /* SPI CS# */ | ||
544 | 541 | ||
545 | /* spi_gpio on SSI0 pins */ | 542 | /* spi_gpio on SSI0 pins */ |
546 | pfc = __raw_readl((void __iomem *)SYS_PINFUNC); | 543 | pfc = __raw_readl((void __iomem *)SYS_PINFUNC); |
diff --git a/arch/mips/bcm47xx/board.c b/arch/mips/bcm47xx/board.c index 6d612e2b949b..cdd8246f92b3 100644 --- a/arch/mips/bcm47xx/board.c +++ b/arch/mips/bcm47xx/board.c | |||
@@ -1,3 +1,4 @@ | |||
1 | #include <linux/errno.h> | ||
1 | #include <linux/export.h> | 2 | #include <linux/export.h> |
2 | #include <linux/string.h> | 3 | #include <linux/string.h> |
3 | #include <bcm47xx_board.h> | 4 | #include <bcm47xx_board.h> |
diff --git a/arch/mips/bcm47xx/nvram.c b/arch/mips/bcm47xx/nvram.c index 6decb27cf48b..2bed73a684ae 100644 --- a/arch/mips/bcm47xx/nvram.c +++ b/arch/mips/bcm47xx/nvram.c | |||
@@ -196,7 +196,7 @@ int bcm47xx_nvram_gpio_pin(const char *name) | |||
196 | char nvram_var[10]; | 196 | char nvram_var[10]; |
197 | char buf[30]; | 197 | char buf[30]; |
198 | 198 | ||
199 | for (i = 0; i < 16; i++) { | 199 | for (i = 0; i < 32; i++) { |
200 | err = snprintf(nvram_var, sizeof(nvram_var), "gpio%i", i); | 200 | err = snprintf(nvram_var, sizeof(nvram_var), "gpio%i", i); |
201 | if (err <= 0) | 201 | if (err <= 0) |
202 | continue; | 202 | continue; |
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index 25fbfae06c1f..c2bb4f896ce7 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c | |||
@@ -975,10 +975,6 @@ static int octeon_irq_ciu_xlat(struct irq_domain *d, | |||
975 | if (ciu > 1 || bit > 63) | 975 | if (ciu > 1 || bit > 63) |
976 | return -EINVAL; | 976 | return -EINVAL; |
977 | 977 | ||
978 | /* These are the GPIO lines */ | ||
979 | if (ciu == 0 && bit >= 16 && bit < 32) | ||
980 | return -EINVAL; | ||
981 | |||
982 | *out_hwirq = (ciu << 6) | bit; | 978 | *out_hwirq = (ciu << 6) | bit; |
983 | *out_type = 0; | 979 | *out_type = 0; |
984 | 980 | ||
@@ -1007,6 +1003,10 @@ static int octeon_irq_ciu_map(struct irq_domain *d, | |||
1007 | if (!octeon_irq_virq_in_range(virq)) | 1003 | if (!octeon_irq_virq_in_range(virq)) |
1008 | return -EINVAL; | 1004 | return -EINVAL; |
1009 | 1005 | ||
1006 | /* Don't map irq if it is reserved for GPIO. */ | ||
1007 | if (line == 0 && bit >= 16 && bit <32) | ||
1008 | return 0; | ||
1009 | |||
1010 | if (line > 1 || octeon_irq_ciu_to_irq[line][bit] != 0) | 1010 | if (line > 1 || octeon_irq_ciu_to_irq[line][bit] != 0) |
1011 | return -EINVAL; | 1011 | return -EINVAL; |
1012 | 1012 | ||
@@ -1525,10 +1525,6 @@ static int octeon_irq_ciu2_xlat(struct irq_domain *d, | |||
1525 | ciu = intspec[0]; | 1525 | ciu = intspec[0]; |
1526 | bit = intspec[1]; | 1526 | bit = intspec[1]; |
1527 | 1527 | ||
1528 | /* Line 7 are the GPIO lines */ | ||
1529 | if (ciu > 6 || bit > 63) | ||
1530 | return -EINVAL; | ||
1531 | |||
1532 | *out_hwirq = (ciu << 6) | bit; | 1528 | *out_hwirq = (ciu << 6) | bit; |
1533 | *out_type = 0; | 1529 | *out_type = 0; |
1534 | 1530 | ||
@@ -1570,8 +1566,14 @@ static int octeon_irq_ciu2_map(struct irq_domain *d, | |||
1570 | if (!octeon_irq_virq_in_range(virq)) | 1566 | if (!octeon_irq_virq_in_range(virq)) |
1571 | return -EINVAL; | 1567 | return -EINVAL; |
1572 | 1568 | ||
1573 | /* Line 7 are the GPIO lines */ | 1569 | /* |
1574 | if (line > 6 || octeon_irq_ciu_to_irq[line][bit] != 0) | 1570 | * Don't map irq if it is reserved for GPIO. |
1571 | * (Line 7 are the GPIO lines.) | ||
1572 | */ | ||
1573 | if (line == 7) | ||
1574 | return 0; | ||
1575 | |||
1576 | if (line > 7 || octeon_irq_ciu_to_irq[line][bit] != 0) | ||
1575 | return -EINVAL; | 1577 | return -EINVAL; |
1576 | 1578 | ||
1577 | if (octeon_irq_ciu2_is_edge(line, bit)) | 1579 | if (octeon_irq_ciu2_is_edge(line, bit)) |
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h index 3220c93ea981..4225e99bd7bf 100644 --- a/arch/mips/include/asm/asmmacro.h +++ b/arch/mips/include/asm/asmmacro.h | |||
@@ -9,6 +9,7 @@ | |||
9 | #define _ASM_ASMMACRO_H | 9 | #define _ASM_ASMMACRO_H |
10 | 10 | ||
11 | #include <asm/hazards.h> | 11 | #include <asm/hazards.h> |
12 | #include <asm/asm-offsets.h> | ||
12 | 13 | ||
13 | #ifdef CONFIG_32BIT | 14 | #ifdef CONFIG_32BIT |
14 | #include <asm/asmmacro-32.h> | 15 | #include <asm/asmmacro-32.h> |
@@ -54,11 +55,21 @@ | |||
54 | .endm | 55 | .endm |
55 | 56 | ||
56 | .macro local_irq_disable reg=t0 | 57 | .macro local_irq_disable reg=t0 |
58 | #ifdef CONFIG_PREEMPT | ||
59 | lw \reg, TI_PRE_COUNT($28) | ||
60 | addi \reg, \reg, 1 | ||
61 | sw \reg, TI_PRE_COUNT($28) | ||
62 | #endif | ||
57 | mfc0 \reg, CP0_STATUS | 63 | mfc0 \reg, CP0_STATUS |
58 | ori \reg, \reg, 1 | 64 | ori \reg, \reg, 1 |
59 | xori \reg, \reg, 1 | 65 | xori \reg, \reg, 1 |
60 | mtc0 \reg, CP0_STATUS | 66 | mtc0 \reg, CP0_STATUS |
61 | irq_disable_hazard | 67 | irq_disable_hazard |
68 | #ifdef CONFIG_PREEMPT | ||
69 | lw \reg, TI_PRE_COUNT($28) | ||
70 | addi \reg, \reg, -1 | ||
71 | sw \reg, TI_PRE_COUNT($28) | ||
72 | #endif | ||
62 | .endm | 73 | .endm |
63 | #endif /* CONFIG_MIPS_MT_SMTC */ | 74 | #endif /* CONFIG_MIPS_MT_SMTC */ |
64 | 75 | ||
@@ -106,7 +117,7 @@ | |||
106 | .endm | 117 | .endm |
107 | 118 | ||
108 | .macro fpu_save_double thread status tmp | 119 | .macro fpu_save_double thread status tmp |
109 | #if defined(CONFIG_MIPS64) || defined(CONFIG_CPU_MIPS32_R2) | 120 | #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) |
110 | sll \tmp, \status, 5 | 121 | sll \tmp, \status, 5 |
111 | bgez \tmp, 10f | 122 | bgez \tmp, 10f |
112 | fpu_save_16odd \thread | 123 | fpu_save_16odd \thread |
@@ -159,7 +170,7 @@ | |||
159 | .endm | 170 | .endm |
160 | 171 | ||
161 | .macro fpu_restore_double thread status tmp | 172 | .macro fpu_restore_double thread status tmp |
162 | #if defined(CONFIG_MIPS64) || defined(CONFIG_CPU_MIPS32_R2) | 173 | #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) |
163 | sll \tmp, \status, 5 | 174 | sll \tmp, \status, 5 |
164 | bgez \tmp, 10f # 16 register mode? | 175 | bgez \tmp, 10f # 16 register mode? |
165 | 176 | ||
diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h index cfe092fc720d..58e50cbdb1a6 100644 --- a/arch/mips/include/asm/fpu.h +++ b/arch/mips/include/asm/fpu.h | |||
@@ -57,7 +57,7 @@ static inline int __enable_fpu(enum fpu_mode mode) | |||
57 | return 0; | 57 | return 0; |
58 | 58 | ||
59 | case FPU_64BIT: | 59 | case FPU_64BIT: |
60 | #if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_MIPS64)) | 60 | #if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_64BIT)) |
61 | /* we only have a 32-bit FPU */ | 61 | /* we only have a 32-bit FPU */ |
62 | return SIGFPE; | 62 | return SIGFPE; |
63 | #endif | 63 | #endif |
@@ -74,6 +74,8 @@ static inline int __enable_fpu(enum fpu_mode mode) | |||
74 | default: | 74 | default: |
75 | BUG(); | 75 | BUG(); |
76 | } | 76 | } |
77 | |||
78 | return SIGFPE; | ||
77 | } | 79 | } |
78 | 80 | ||
79 | #define __disable_fpu() \ | 81 | #define __disable_fpu() \ |
diff --git a/arch/mips/include/asm/ftrace.h b/arch/mips/include/asm/ftrace.h index ce35c9af0c28..992aaba603b5 100644 --- a/arch/mips/include/asm/ftrace.h +++ b/arch/mips/include/asm/ftrace.h | |||
@@ -22,12 +22,12 @@ extern void _mcount(void); | |||
22 | #define safe_load(load, src, dst, error) \ | 22 | #define safe_load(load, src, dst, error) \ |
23 | do { \ | 23 | do { \ |
24 | asm volatile ( \ | 24 | asm volatile ( \ |
25 | "1: " load " %[" STR(dst) "], 0(%[" STR(src) "])\n"\ | 25 | "1: " load " %[tmp_dst], 0(%[tmp_src])\n" \ |
26 | " li %[" STR(error) "], 0\n" \ | 26 | " li %[tmp_err], 0\n" \ |
27 | "2:\n" \ | 27 | "2:\n" \ |
28 | \ | 28 | \ |
29 | ".section .fixup, \"ax\"\n" \ | 29 | ".section .fixup, \"ax\"\n" \ |
30 | "3: li %[" STR(error) "], 1\n" \ | 30 | "3: li %[tmp_err], 1\n" \ |
31 | " j 2b\n" \ | 31 | " j 2b\n" \ |
32 | ".previous\n" \ | 32 | ".previous\n" \ |
33 | \ | 33 | \ |
@@ -35,8 +35,8 @@ do { \ | |||
35 | STR(PTR) "\t1b, 3b\n\t" \ | 35 | STR(PTR) "\t1b, 3b\n\t" \ |
36 | ".previous\n" \ | 36 | ".previous\n" \ |
37 | \ | 37 | \ |
38 | : [dst] "=&r" (dst), [error] "=r" (error)\ | 38 | : [tmp_dst] "=&r" (dst), [tmp_err] "=r" (error)\ |
39 | : [src] "r" (src) \ | 39 | : [tmp_src] "r" (src) \ |
40 | : "memory" \ | 40 | : "memory" \ |
41 | ); \ | 41 | ); \ |
42 | } while (0) | 42 | } while (0) |
@@ -44,12 +44,12 @@ do { \ | |||
44 | #define safe_store(store, src, dst, error) \ | 44 | #define safe_store(store, src, dst, error) \ |
45 | do { \ | 45 | do { \ |
46 | asm volatile ( \ | 46 | asm volatile ( \ |
47 | "1: " store " %[" STR(src) "], 0(%[" STR(dst) "])\n"\ | 47 | "1: " store " %[tmp_src], 0(%[tmp_dst])\n"\ |
48 | " li %[" STR(error) "], 0\n" \ | 48 | " li %[tmp_err], 0\n" \ |
49 | "2:\n" \ | 49 | "2:\n" \ |
50 | \ | 50 | \ |
51 | ".section .fixup, \"ax\"\n" \ | 51 | ".section .fixup, \"ax\"\n" \ |
52 | "3: li %[" STR(error) "], 1\n" \ | 52 | "3: li %[tmp_err], 1\n" \ |
53 | " j 2b\n" \ | 53 | " j 2b\n" \ |
54 | ".previous\n" \ | 54 | ".previous\n" \ |
55 | \ | 55 | \ |
@@ -57,8 +57,8 @@ do { \ | |||
57 | STR(PTR) "\t1b, 3b\n\t" \ | 57 | STR(PTR) "\t1b, 3b\n\t" \ |
58 | ".previous\n" \ | 58 | ".previous\n" \ |
59 | \ | 59 | \ |
60 | : [error] "=r" (error) \ | 60 | : [tmp_err] "=r" (error) \ |
61 | : [dst] "r" (dst), [src] "r" (src)\ | 61 | : [tmp_dst] "r" (dst), [tmp_src] "r" (src)\ |
62 | : "memory" \ | 62 | : "memory" \ |
63 | ); \ | 63 | ); \ |
64 | } while (0) | 64 | } while (0) |
diff --git a/arch/mips/include/asm/syscall.h b/arch/mips/include/asm/syscall.h index 33e8dbfc1b63..f35b131977e6 100644 --- a/arch/mips/include/asm/syscall.h +++ b/arch/mips/include/asm/syscall.h | |||
@@ -13,6 +13,7 @@ | |||
13 | #ifndef __ASM_MIPS_SYSCALL_H | 13 | #ifndef __ASM_MIPS_SYSCALL_H |
14 | #define __ASM_MIPS_SYSCALL_H | 14 | #define __ASM_MIPS_SYSCALL_H |
15 | 15 | ||
16 | #include <linux/compiler.h> | ||
16 | #include <linux/audit.h> | 17 | #include <linux/audit.h> |
17 | #include <linux/elf-em.h> | 18 | #include <linux/elf-em.h> |
18 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
@@ -39,14 +40,14 @@ static inline unsigned long mips_get_syscall_arg(unsigned long *arg, | |||
39 | 40 | ||
40 | #ifdef CONFIG_32BIT | 41 | #ifdef CONFIG_32BIT |
41 | case 4: case 5: case 6: case 7: | 42 | case 4: case 5: case 6: case 7: |
42 | return get_user(*arg, (int *)usp + 4 * n); | 43 | return get_user(*arg, (int *)usp + n); |
43 | #endif | 44 | #endif |
44 | 45 | ||
45 | #ifdef CONFIG_64BIT | 46 | #ifdef CONFIG_64BIT |
46 | case 4: case 5: case 6: case 7: | 47 | case 4: case 5: case 6: case 7: |
47 | #ifdef CONFIG_MIPS32_O32 | 48 | #ifdef CONFIG_MIPS32_O32 |
48 | if (test_thread_flag(TIF_32BIT_REGS)) | 49 | if (test_thread_flag(TIF_32BIT_REGS)) |
49 | return get_user(*arg, (int *)usp + 4 * n); | 50 | return get_user(*arg, (int *)usp + n); |
50 | else | 51 | else |
51 | #endif | 52 | #endif |
52 | *arg = regs->regs[4 + n]; | 53 | *arg = regs->regs[4 + n]; |
@@ -57,6 +58,8 @@ static inline unsigned long mips_get_syscall_arg(unsigned long *arg, | |||
57 | default: | 58 | default: |
58 | BUG(); | 59 | BUG(); |
59 | } | 60 | } |
61 | |||
62 | unreachable(); | ||
60 | } | 63 | } |
61 | 64 | ||
62 | static inline long syscall_get_return_value(struct task_struct *task, | 65 | static inline long syscall_get_return_value(struct task_struct *task, |
@@ -83,11 +86,10 @@ static inline void syscall_get_arguments(struct task_struct *task, | |||
83 | unsigned int i, unsigned int n, | 86 | unsigned int i, unsigned int n, |
84 | unsigned long *args) | 87 | unsigned long *args) |
85 | { | 88 | { |
86 | unsigned long arg; | ||
87 | int ret; | 89 | int ret; |
88 | 90 | ||
89 | while (n--) | 91 | while (n--) |
90 | ret |= mips_get_syscall_arg(&arg, task, regs, i++); | 92 | ret |= mips_get_syscall_arg(args++, task, regs, i++); |
91 | 93 | ||
92 | /* | 94 | /* |
93 | * No way to communicate an error because this is a void function. | 95 | * No way to communicate an error because this is a void function. |
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h index b39ba25b41cc..f25181b19941 100644 --- a/arch/mips/include/uapi/asm/inst.h +++ b/arch/mips/include/uapi/asm/inst.h | |||
@@ -163,8 +163,8 @@ enum cop1_sdw_func { | |||
163 | */ | 163 | */ |
164 | enum cop1x_func { | 164 | enum cop1x_func { |
165 | lwxc1_op = 0x00, ldxc1_op = 0x01, | 165 | lwxc1_op = 0x00, ldxc1_op = 0x01, |
166 | pfetch_op = 0x07, swxc1_op = 0x08, | 166 | swxc1_op = 0x08, sdxc1_op = 0x09, |
167 | sdxc1_op = 0x09, madd_s_op = 0x20, | 167 | pfetch_op = 0x0f, madd_s_op = 0x20, |
168 | madd_d_op = 0x21, madd_e_op = 0x22, | 168 | madd_d_op = 0x21, madd_e_op = 0x22, |
169 | msub_s_op = 0x28, msub_d_op = 0x29, | 169 | msub_s_op = 0x28, msub_d_op = 0x29, |
170 | msub_e_op = 0x2a, nmadd_s_op = 0x30, | 170 | msub_e_op = 0x2a, nmadd_s_op = 0x30, |
diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h index 1dee279f9665..d6e154a9e6a5 100644 --- a/arch/mips/include/uapi/asm/unistd.h +++ b/arch/mips/include/uapi/asm/unistd.h | |||
@@ -369,16 +369,18 @@ | |||
369 | #define __NR_process_vm_writev (__NR_Linux + 346) | 369 | #define __NR_process_vm_writev (__NR_Linux + 346) |
370 | #define __NR_kcmp (__NR_Linux + 347) | 370 | #define __NR_kcmp (__NR_Linux + 347) |
371 | #define __NR_finit_module (__NR_Linux + 348) | 371 | #define __NR_finit_module (__NR_Linux + 348) |
372 | #define __NR_sched_setattr (__NR_Linux + 349) | ||
373 | #define __NR_sched_getattr (__NR_Linux + 350) | ||
372 | 374 | ||
373 | /* | 375 | /* |
374 | * Offset of the last Linux o32 flavoured syscall | 376 | * Offset of the last Linux o32 flavoured syscall |
375 | */ | 377 | */ |
376 | #define __NR_Linux_syscalls 348 | 378 | #define __NR_Linux_syscalls 350 |
377 | 379 | ||
378 | #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ | 380 | #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ |
379 | 381 | ||
380 | #define __NR_O32_Linux 4000 | 382 | #define __NR_O32_Linux 4000 |
381 | #define __NR_O32_Linux_syscalls 348 | 383 | #define __NR_O32_Linux_syscalls 350 |
382 | 384 | ||
383 | #if _MIPS_SIM == _MIPS_SIM_ABI64 | 385 | #if _MIPS_SIM == _MIPS_SIM_ABI64 |
384 | 386 | ||
@@ -695,16 +697,18 @@ | |||
695 | #define __NR_kcmp (__NR_Linux + 306) | 697 | #define __NR_kcmp (__NR_Linux + 306) |
696 | #define __NR_finit_module (__NR_Linux + 307) | 698 | #define __NR_finit_module (__NR_Linux + 307) |
697 | #define __NR_getdents64 (__NR_Linux + 308) | 699 | #define __NR_getdents64 (__NR_Linux + 308) |
700 | #define __NR_sched_setattr (__NR_Linux + 309) | ||
701 | #define __NR_sched_getattr (__NR_Linux + 310) | ||
698 | 702 | ||
699 | /* | 703 | /* |
700 | * Offset of the last Linux 64-bit flavoured syscall | 704 | * Offset of the last Linux 64-bit flavoured syscall |
701 | */ | 705 | */ |
702 | #define __NR_Linux_syscalls 308 | 706 | #define __NR_Linux_syscalls 310 |
703 | 707 | ||
704 | #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ | 708 | #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ |
705 | 709 | ||
706 | #define __NR_64_Linux 5000 | 710 | #define __NR_64_Linux 5000 |
707 | #define __NR_64_Linux_syscalls 308 | 711 | #define __NR_64_Linux_syscalls 310 |
708 | 712 | ||
709 | #if _MIPS_SIM == _MIPS_SIM_NABI32 | 713 | #if _MIPS_SIM == _MIPS_SIM_NABI32 |
710 | 714 | ||
@@ -1025,15 +1029,17 @@ | |||
1025 | #define __NR_process_vm_writev (__NR_Linux + 310) | 1029 | #define __NR_process_vm_writev (__NR_Linux + 310) |
1026 | #define __NR_kcmp (__NR_Linux + 311) | 1030 | #define __NR_kcmp (__NR_Linux + 311) |
1027 | #define __NR_finit_module (__NR_Linux + 312) | 1031 | #define __NR_finit_module (__NR_Linux + 312) |
1032 | #define __NR_sched_setattr (__NR_Linux + 313) | ||
1033 | #define __NR_sched_getattr (__NR_Linux + 314) | ||
1028 | 1034 | ||
1029 | /* | 1035 | /* |
1030 | * Offset of the last N32 flavoured syscall | 1036 | * Offset of the last N32 flavoured syscall |
1031 | */ | 1037 | */ |
1032 | #define __NR_Linux_syscalls 312 | 1038 | #define __NR_Linux_syscalls 314 |
1033 | 1039 | ||
1034 | #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ | 1040 | #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ |
1035 | 1041 | ||
1036 | #define __NR_N32_Linux 6000 | 1042 | #define __NR_N32_Linux 6000 |
1037 | #define __NR_N32_Linux_syscalls 312 | 1043 | #define __NR_N32_Linux_syscalls 314 |
1038 | 1044 | ||
1039 | #endif /* _UAPI_ASM_UNISTD_H */ | 1045 | #endif /* _UAPI_ASM_UNISTD_H */ |
diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c index 185ba258361b..374ed74cd516 100644 --- a/arch/mips/kernel/ftrace.c +++ b/arch/mips/kernel/ftrace.c | |||
@@ -111,11 +111,10 @@ static int ftrace_modify_code_2(unsigned long ip, unsigned int new_code1, | |||
111 | safe_store_code(new_code1, ip, faulted); | 111 | safe_store_code(new_code1, ip, faulted); |
112 | if (unlikely(faulted)) | 112 | if (unlikely(faulted)) |
113 | return -EFAULT; | 113 | return -EFAULT; |
114 | ip += 4; | 114 | safe_store_code(new_code2, ip + 4, faulted); |
115 | safe_store_code(new_code2, ip, faulted); | ||
116 | if (unlikely(faulted)) | 115 | if (unlikely(faulted)) |
117 | return -EFAULT; | 116 | return -EFAULT; |
118 | flush_icache_range(ip, ip + 8); /* original ip + 12 */ | 117 | flush_icache_range(ip, ip + 8); |
119 | return 0; | 118 | return 0; |
120 | } | 119 | } |
121 | #endif | 120 | #endif |
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S index 253b2fb52026..73b0ddf910d4 100644 --- a/arch/mips/kernel/r4k_fpu.S +++ b/arch/mips/kernel/r4k_fpu.S | |||
@@ -35,9 +35,9 @@ | |||
35 | LEAF(_save_fp_context) | 35 | LEAF(_save_fp_context) |
36 | cfc1 t1, fcr31 | 36 | cfc1 t1, fcr31 |
37 | 37 | ||
38 | #if defined(CONFIG_64BIT) || defined(CONFIG_MIPS32_R2) | 38 | #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) |
39 | .set push | 39 | .set push |
40 | #ifdef CONFIG_MIPS32_R2 | 40 | #ifdef CONFIG_CPU_MIPS32_R2 |
41 | .set mips64r2 | 41 | .set mips64r2 |
42 | mfc0 t0, CP0_STATUS | 42 | mfc0 t0, CP0_STATUS |
43 | sll t0, t0, 5 | 43 | sll t0, t0, 5 |
@@ -146,11 +146,11 @@ LEAF(_save_fp_context32) | |||
146 | * - cp1 status/control register | 146 | * - cp1 status/control register |
147 | */ | 147 | */ |
148 | LEAF(_restore_fp_context) | 148 | LEAF(_restore_fp_context) |
149 | EX lw t0, SC_FPC_CSR(a0) | 149 | EX lw t1, SC_FPC_CSR(a0) |
150 | 150 | ||
151 | #if defined(CONFIG_64BIT) || defined(CONFIG_MIPS32_R2) | 151 | #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) |
152 | .set push | 152 | .set push |
153 | #ifdef CONFIG_MIPS32_R2 | 153 | #ifdef CONFIG_CPU_MIPS32_R2 |
154 | .set mips64r2 | 154 | .set mips64r2 |
155 | mfc0 t0, CP0_STATUS | 155 | mfc0 t0, CP0_STATUS |
156 | sll t0, t0, 5 | 156 | sll t0, t0, 5 |
@@ -191,7 +191,7 @@ LEAF(_restore_fp_context) | |||
191 | EX ldc1 $f26, SC_FPREGS+208(a0) | 191 | EX ldc1 $f26, SC_FPREGS+208(a0) |
192 | EX ldc1 $f28, SC_FPREGS+224(a0) | 192 | EX ldc1 $f28, SC_FPREGS+224(a0) |
193 | EX ldc1 $f30, SC_FPREGS+240(a0) | 193 | EX ldc1 $f30, SC_FPREGS+240(a0) |
194 | ctc1 t0, fcr31 | 194 | ctc1 t1, fcr31 |
195 | jr ra | 195 | jr ra |
196 | li v0, 0 # success | 196 | li v0, 0 # success |
197 | END(_restore_fp_context) | 197 | END(_restore_fp_context) |
@@ -199,7 +199,7 @@ LEAF(_restore_fp_context) | |||
199 | #ifdef CONFIG_MIPS32_COMPAT | 199 | #ifdef CONFIG_MIPS32_COMPAT |
200 | LEAF(_restore_fp_context32) | 200 | LEAF(_restore_fp_context32) |
201 | /* Restore an o32 sigcontext. */ | 201 | /* Restore an o32 sigcontext. */ |
202 | EX lw t0, SC32_FPC_CSR(a0) | 202 | EX lw t1, SC32_FPC_CSR(a0) |
203 | 203 | ||
204 | mfc0 t0, CP0_STATUS | 204 | mfc0 t0, CP0_STATUS |
205 | sll t0, t0, 5 | 205 | sll t0, t0, 5 |
@@ -239,7 +239,7 @@ LEAF(_restore_fp_context32) | |||
239 | EX ldc1 $f26, SC32_FPREGS+208(a0) | 239 | EX ldc1 $f26, SC32_FPREGS+208(a0) |
240 | EX ldc1 $f28, SC32_FPREGS+224(a0) | 240 | EX ldc1 $f28, SC32_FPREGS+224(a0) |
241 | EX ldc1 $f30, SC32_FPREGS+240(a0) | 241 | EX ldc1 $f30, SC32_FPREGS+240(a0) |
242 | ctc1 t0, fcr31 | 242 | ctc1 t1, fcr31 |
243 | jr ra | 243 | jr ra |
244 | li v0, 0 # success | 244 | li v0, 0 # success |
245 | END(_restore_fp_context32) | 245 | END(_restore_fp_context32) |
diff --git a/arch/mips/kernel/rtlx-cmp.c b/arch/mips/kernel/rtlx-cmp.c index 56dc69635153..758fb3cd2326 100644 --- a/arch/mips/kernel/rtlx-cmp.c +++ b/arch/mips/kernel/rtlx-cmp.c | |||
@@ -112,5 +112,8 @@ void __exit rtlx_module_exit(void) | |||
112 | 112 | ||
113 | for (i = 0; i < RTLX_CHANNELS; i++) | 113 | for (i = 0; i < RTLX_CHANNELS; i++) |
114 | device_destroy(mt_class, MKDEV(major, i)); | 114 | device_destroy(mt_class, MKDEV(major, i)); |
115 | |||
115 | unregister_chrdev(major, RTLX_MODULE_NAME); | 116 | unregister_chrdev(major, RTLX_MODULE_NAME); |
117 | |||
118 | aprp_hook = NULL; | ||
116 | } | 119 | } |
diff --git a/arch/mips/kernel/rtlx-mt.c b/arch/mips/kernel/rtlx-mt.c index 91d61ba422b4..9c1aca00fd54 100644 --- a/arch/mips/kernel/rtlx-mt.c +++ b/arch/mips/kernel/rtlx-mt.c | |||
@@ -144,5 +144,8 @@ void __exit rtlx_module_exit(void) | |||
144 | 144 | ||
145 | for (i = 0; i < RTLX_CHANNELS; i++) | 145 | for (i = 0; i < RTLX_CHANNELS; i++) |
146 | device_destroy(mt_class, MKDEV(major, i)); | 146 | device_destroy(mt_class, MKDEV(major, i)); |
147 | |||
147 | unregister_chrdev(major, RTLX_MODULE_NAME); | 148 | unregister_chrdev(major, RTLX_MODULE_NAME); |
149 | |||
150 | aprp_hook = NULL; | ||
148 | } | 151 | } |
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index e8e541b40d86..a5b14f48e1af 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S | |||
@@ -563,3 +563,5 @@ EXPORT(sys_call_table) | |||
563 | PTR sys_process_vm_writev | 563 | PTR sys_process_vm_writev |
564 | PTR sys_kcmp | 564 | PTR sys_kcmp |
565 | PTR sys_finit_module | 565 | PTR sys_finit_module |
566 | PTR sys_sched_setattr | ||
567 | PTR sys_sched_getattr /* 4350 */ | ||
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S index 57e3742fec59..b56e254beb15 100644 --- a/arch/mips/kernel/scall64-64.S +++ b/arch/mips/kernel/scall64-64.S | |||
@@ -425,4 +425,6 @@ EXPORT(sys_call_table) | |||
425 | PTR sys_kcmp | 425 | PTR sys_kcmp |
426 | PTR sys_finit_module | 426 | PTR sys_finit_module |
427 | PTR sys_getdents64 | 427 | PTR sys_getdents64 |
428 | PTR sys_sched_setattr | ||
429 | PTR sys_sched_getattr /* 5310 */ | ||
428 | .size sys_call_table,.-sys_call_table | 430 | .size sys_call_table,.-sys_call_table |
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index 2f48f5934399..f7e5b72cf481 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S | |||
@@ -418,4 +418,6 @@ EXPORT(sysn32_call_table) | |||
418 | PTR compat_sys_process_vm_writev /* 6310 */ | 418 | PTR compat_sys_process_vm_writev /* 6310 */ |
419 | PTR sys_kcmp | 419 | PTR sys_kcmp |
420 | PTR sys_finit_module | 420 | PTR sys_finit_module |
421 | PTR sys_sched_setattr | ||
422 | PTR sys_sched_getattr | ||
421 | .size sysn32_call_table,.-sysn32_call_table | 423 | .size sysn32_call_table,.-sysn32_call_table |
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index f1acdb429f4f..6788727d91af 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S | |||
@@ -541,4 +541,6 @@ EXPORT(sys32_call_table) | |||
541 | PTR compat_sys_process_vm_writev | 541 | PTR compat_sys_process_vm_writev |
542 | PTR sys_kcmp | 542 | PTR sys_kcmp |
543 | PTR sys_finit_module | 543 | PTR sys_finit_module |
544 | PTR sys_sched_setattr | ||
545 | PTR sys_sched_getattr /* 4350 */ | ||
544 | .size sys32_call_table,.-sys32_call_table | 546 | .size sys32_call_table,.-sys32_call_table |
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index 506925b2c3f3..0b4e2e38294b 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c | |||
@@ -1538,10 +1538,10 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, | |||
1538 | break; | 1538 | break; |
1539 | } | 1539 | } |
1540 | 1540 | ||
1541 | case 0x7: /* 7 */ | 1541 | case 0x3: |
1542 | if (MIPSInst_FUNC(ir) != pfetch_op) { | 1542 | if (MIPSInst_FUNC(ir) != pfetch_op) |
1543 | return SIGILL; | 1543 | return SIGILL; |
1544 | } | 1544 | |
1545 | /* ignore prefx operation */ | 1545 | /* ignore prefx operation */ |
1546 | break; | 1546 | break; |
1547 | 1547 | ||
diff --git a/arch/mips/mti-malta/malta-amon.c b/arch/mips/mti-malta/malta-amon.c index 592ac0427426..84ac523b0ce0 100644 --- a/arch/mips/mti-malta/malta-amon.c +++ b/arch/mips/mti-malta/malta-amon.c | |||
@@ -72,7 +72,7 @@ int amon_cpu_start(int cpu, | |||
72 | return 0; | 72 | return 0; |
73 | } | 73 | } |
74 | 74 | ||
75 | #ifdef CONFIG_MIPS_VPE_LOADER | 75 | #ifdef CONFIG_MIPS_VPE_LOADER_CMP |
76 | int vpe_run(struct vpe *v) | 76 | int vpe_run(struct vpe *v) |
77 | { | 77 | { |
78 | struct vpe_notifications *n; | 78 | struct vpe_notifications *n; |
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index ca3e3a46a42f..2242181a6284 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c | |||
@@ -119,7 +119,7 @@ static void malta_hw0_irqdispatch(void) | |||
119 | 119 | ||
120 | do_IRQ(MALTA_INT_BASE + irq); | 120 | do_IRQ(MALTA_INT_BASE + irq); |
121 | 121 | ||
122 | #ifdef MIPS_VPE_APSP_API | 122 | #ifdef CONFIG_MIPS_VPE_APSP_API_MT |
123 | if (aprp_hook) | 123 | if (aprp_hook) |
124 | aprp_hook(); | 124 | aprp_hook(); |
125 | #endif | 125 | #endif |
@@ -310,7 +310,7 @@ static void ipi_call_dispatch(void) | |||
310 | 310 | ||
311 | static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) | 311 | static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) |
312 | { | 312 | { |
313 | #ifdef MIPS_VPE_APSP_API | 313 | #ifdef CONFIG_MIPS_VPE_APSP_API_CMP |
314 | if (aprp_hook) | 314 | if (aprp_hook) |
315 | aprp_hook(); | 315 | aprp_hook(); |
316 | #endif | 316 | #endif |
diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c index d37be36dc659..2b91b0e61566 100644 --- a/arch/mips/pci/msi-octeon.c +++ b/arch/mips/pci/msi-octeon.c | |||
@@ -150,6 +150,7 @@ msi_irq_allocated: | |||
150 | msg.address_lo = | 150 | msg.address_lo = |
151 | ((128ul << 20) + CVMX_PCI_MSI_RCV) & 0xffffffff; | 151 | ((128ul << 20) + CVMX_PCI_MSI_RCV) & 0xffffffff; |
152 | msg.address_hi = ((128ul << 20) + CVMX_PCI_MSI_RCV) >> 32; | 152 | msg.address_hi = ((128ul << 20) + CVMX_PCI_MSI_RCV) >> 32; |
153 | break; | ||
153 | case OCTEON_DMA_BAR_TYPE_BIG: | 154 | case OCTEON_DMA_BAR_TYPE_BIG: |
154 | /* When using big bar, Bar 0 is based at 0 */ | 155 | /* When using big bar, Bar 0 is based at 0 */ |
155 | msg.address_lo = (0 + CVMX_PCI_MSI_RCV) & 0xffffffff; | 156 | msg.address_lo = (0 + CVMX_PCI_MSI_RCV) & 0xffffffff; |