diff options
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/cavium-octeon/octeon-irq.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index 5070e960adde..bc985b7af4d5 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c | |||
@@ -544,7 +544,7 @@ static struct irq_chip octeon_irq_chip_ciu1 = { | |||
544 | 544 | ||
545 | #ifdef CONFIG_PCI_MSI | 545 | #ifdef CONFIG_PCI_MSI |
546 | 546 | ||
547 | static DEFINE_SPINLOCK(octeon_irq_msi_lock); | 547 | static DEFINE_RAW_SPINLOCK(octeon_irq_msi_lock); |
548 | 548 | ||
549 | static void octeon_irq_msi_ack(unsigned int irq) | 549 | static void octeon_irq_msi_ack(unsigned int irq) |
550 | { | 550 | { |
@@ -586,12 +586,12 @@ static void octeon_irq_msi_enable(unsigned int irq) | |||
586 | */ | 586 | */ |
587 | uint64_t en; | 587 | uint64_t en; |
588 | unsigned long flags; | 588 | unsigned long flags; |
589 | spin_lock_irqsave(&octeon_irq_msi_lock, flags); | 589 | raw_spin_lock_irqsave(&octeon_irq_msi_lock, flags); |
590 | en = cvmx_read_csr(CVMX_PEXP_NPEI_MSI_ENB0); | 590 | en = cvmx_read_csr(CVMX_PEXP_NPEI_MSI_ENB0); |
591 | en |= 1ull << (irq - OCTEON_IRQ_MSI_BIT0); | 591 | en |= 1ull << (irq - OCTEON_IRQ_MSI_BIT0); |
592 | cvmx_write_csr(CVMX_PEXP_NPEI_MSI_ENB0, en); | 592 | cvmx_write_csr(CVMX_PEXP_NPEI_MSI_ENB0, en); |
593 | cvmx_read_csr(CVMX_PEXP_NPEI_MSI_ENB0); | 593 | cvmx_read_csr(CVMX_PEXP_NPEI_MSI_ENB0); |
594 | spin_unlock_irqrestore(&octeon_irq_msi_lock, flags); | 594 | raw_spin_unlock_irqrestore(&octeon_irq_msi_lock, flags); |
595 | } | 595 | } |
596 | } | 596 | } |
597 | 597 | ||
@@ -608,12 +608,12 @@ static void octeon_irq_msi_disable(unsigned int irq) | |||
608 | */ | 608 | */ |
609 | uint64_t en; | 609 | uint64_t en; |
610 | unsigned long flags; | 610 | unsigned long flags; |
611 | spin_lock_irqsave(&octeon_irq_msi_lock, flags); | 611 | raw_spin_lock_irqsave(&octeon_irq_msi_lock, flags); |
612 | en = cvmx_read_csr(CVMX_PEXP_NPEI_MSI_ENB0); | 612 | en = cvmx_read_csr(CVMX_PEXP_NPEI_MSI_ENB0); |
613 | en &= ~(1ull << (irq - OCTEON_IRQ_MSI_BIT0)); | 613 | en &= ~(1ull << (irq - OCTEON_IRQ_MSI_BIT0)); |
614 | cvmx_write_csr(CVMX_PEXP_NPEI_MSI_ENB0, en); | 614 | cvmx_write_csr(CVMX_PEXP_NPEI_MSI_ENB0, en); |
615 | cvmx_read_csr(CVMX_PEXP_NPEI_MSI_ENB0); | 615 | cvmx_read_csr(CVMX_PEXP_NPEI_MSI_ENB0); |
616 | spin_unlock_irqrestore(&octeon_irq_msi_lock, flags); | 616 | raw_spin_unlock_irqrestore(&octeon_irq_msi_lock, flags); |
617 | } | 617 | } |
618 | } | 618 | } |
619 | 619 | ||