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-rw-r--r--arch/mips/emma/markeins/irq.c4
-rw-r--r--arch/mips/emma/markeins/irq_markeins.c19
2 files changed, 10 insertions, 13 deletions
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
index c0f9d46c69fd..3577fd52030d 100644
--- a/arch/mips/emma/markeins/irq.c
+++ b/arch/mips/emma/markeins/irq.c
@@ -54,7 +54,7 @@
54 */ 54 */
55 55
56extern void emma2rh_sw_irq_init(void); 56extern void emma2rh_sw_irq_init(void);
57extern void emma2rh_gpio_irq_init(u32 base); 57extern void emma2rh_gpio_irq_init(void);
58extern void emma2rh_irq_init(void); 58extern void emma2rh_irq_init(void);
59extern void emma2rh_irq_dispatch(void); 59extern void emma2rh_irq_dispatch(void);
60 60
@@ -104,7 +104,7 @@ void __init arch_init_irq(void)
104 /* init all controllers */ 104 /* init all controllers */
105 emma2rh_irq_init(); 105 emma2rh_irq_init();
106 emma2rh_sw_irq_init(); 106 emma2rh_sw_irq_init();
107 emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE); 107 emma2rh_gpio_irq_init();
108 mips_cpu_irq_init(); 108 mips_cpu_irq_init();
109 109
110 /* setup cascade interrupts */ 110 /* setup cascade interrupts */
diff --git a/arch/mips/emma/markeins/irq_markeins.c b/arch/mips/emma/markeins/irq_markeins.c
index 18834216d6fa..ea27ec573d95 100644
--- a/arch/mips/emma/markeins/irq_markeins.c
+++ b/arch/mips/emma/markeins/irq_markeins.c
@@ -30,8 +30,6 @@
30#include <asm/debug.h> 30#include <asm/debug.h>
31#include <asm/emma/emma2rh.h> 31#include <asm/emma/emma2rh.h>
32 32
33static int emma2rh_gpio_irq_base = -1;
34
35void ll_emma2rh_sw_irq_enable(int reg); 33void ll_emma2rh_sw_irq_enable(int reg);
36void ll_emma2rh_sw_irq_disable(int reg); 34void ll_emma2rh_sw_irq_disable(int reg);
37void ll_emma2rh_gpio_irq_enable(int reg); 35void ll_emma2rh_gpio_irq_enable(int reg);
@@ -91,17 +89,17 @@ void ll_emma2rh_sw_irq_disable(int irq)
91 89
92static void emma2rh_gpio_irq_enable(unsigned int irq) 90static void emma2rh_gpio_irq_enable(unsigned int irq)
93{ 91{
94 ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base); 92 ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE);
95} 93}
96 94
97static void emma2rh_gpio_irq_disable(unsigned int irq) 95static void emma2rh_gpio_irq_disable(unsigned int irq)
98{ 96{
99 ll_emma2rh_gpio_irq_disable(irq - emma2rh_gpio_irq_base); 97 ll_emma2rh_gpio_irq_disable(irq - EMMA2RH_GPIO_IRQ_BASE);
100} 98}
101 99
102static void emma2rh_gpio_irq_ack(unsigned int irq) 100static void emma2rh_gpio_irq_ack(unsigned int irq)
103{ 101{
104 irq -= emma2rh_gpio_irq_base; 102 irq -= EMMA2RH_GPIO_IRQ_BASE;
105 emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq)); 103 emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
106 ll_emma2rh_gpio_irq_disable(irq); 104 ll_emma2rh_gpio_irq_disable(irq);
107} 105}
@@ -109,7 +107,7 @@ static void emma2rh_gpio_irq_ack(unsigned int irq)
109static void emma2rh_gpio_irq_end(unsigned int irq) 107static void emma2rh_gpio_irq_end(unsigned int irq)
110{ 108{
111 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) 109 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
112 ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base); 110 ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE);
113} 111}
114 112
115struct irq_chip emma2rh_gpio_irq_controller = { 113struct irq_chip emma2rh_gpio_irq_controller = {
@@ -121,14 +119,13 @@ struct irq_chip emma2rh_gpio_irq_controller = {
121 .end = emma2rh_gpio_irq_end, 119 .end = emma2rh_gpio_irq_end,
122}; 120};
123 121
124void emma2rh_gpio_irq_init(u32 irq_base) 122void emma2rh_gpio_irq_init(void)
125{ 123{
126 u32 i; 124 u32 i;
127 125
128 for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++) 126 for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++)
129 set_irq_chip(i, &emma2rh_gpio_irq_controller); 127 set_irq_chip(EMMA2RH_GPIO_IRQ_BASE + i,
130 128 &emma2rh_gpio_irq_controller);
131 emma2rh_gpio_irq_base = irq_base;
132} 129}
133 130
134void ll_emma2rh_gpio_irq_enable(int irq) 131void ll_emma2rh_gpio_irq_enable(int irq)