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-rw-r--r--arch/mips/include/asm/irq.h3
-rw-r--r--arch/mips/include/asm/mach-ip27/topology.h1
-rw-r--r--arch/mips/include/asm/smp.h3
-rw-r--r--arch/mips/jazz/irq.c2
-rw-r--r--arch/mips/kernel/cevt-bcm1480.c4
-rw-r--r--arch/mips/kernel/cevt-ds1287.c2
-rw-r--r--arch/mips/kernel/cevt-gt641xx.c2
-rw-r--r--arch/mips/kernel/cevt-r4k.c2
-rw-r--r--arch/mips/kernel/cevt-sb1250.c4
-rw-r--r--arch/mips/kernel/cevt-smtc.c2
-rw-r--r--arch/mips/kernel/cevt-txx9.c2
-rw-r--r--arch/mips/kernel/i8253.c2
-rw-r--r--arch/mips/kernel/irq-gic.c6
-rw-r--r--arch/mips/kernel/smp-cmp.c6
-rw-r--r--arch/mips/kernel/smp-mt.c2
-rw-r--r--arch/mips/kernel/smp.c7
-rw-r--r--arch/mips/kernel/smtc.c6
-rw-r--r--arch/mips/mti-malta/malta-smtc.c6
-rw-r--r--arch/mips/nxp/pnx8550/common/time.c1
-rw-r--r--arch/mips/pmc-sierra/yosemite/smp.c6
-rw-r--r--arch/mips/sgi-ip27/ip27-smp.c2
-rw-r--r--arch/mips/sgi-ip27/ip27-timer.c2
-rw-r--r--arch/mips/sibyte/bcm1480/irq.c8
-rw-r--r--arch/mips/sibyte/bcm1480/smp.c8
-rw-r--r--arch/mips/sibyte/sb1250/irq.c8
-rw-r--r--arch/mips/sibyte/sb1250/smp.c8
-rw-r--r--arch/mips/sni/time.c2
27 files changed, 50 insertions, 57 deletions
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index a58f0eecc68f..abc62aa744ac 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -49,7 +49,8 @@ static inline void smtc_im_ack_irq(unsigned int irq)
49#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF 49#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
50#include <linux/cpumask.h> 50#include <linux/cpumask.h>
51 51
52extern void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity); 52extern void plat_set_irq_affinity(unsigned int irq,
53 const struct cpumask *affinity);
53extern void smtc_forward_irq(unsigned int irq); 54extern void smtc_forward_irq(unsigned int irq);
54 55
55/* 56/*
diff --git a/arch/mips/include/asm/mach-ip27/topology.h b/arch/mips/include/asm/mach-ip27/topology.h
index 7785bec732f2..1fb959f98982 100644
--- a/arch/mips/include/asm/mach-ip27/topology.h
+++ b/arch/mips/include/asm/mach-ip27/topology.h
@@ -37,7 +37,6 @@ extern unsigned char __node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES];
37 37
38/* sched_domains SD_NODE_INIT for SGI IP27 machines */ 38/* sched_domains SD_NODE_INIT for SGI IP27 machines */
39#define SD_NODE_INIT (struct sched_domain) { \ 39#define SD_NODE_INIT (struct sched_domain) { \
40 .span = CPU_MASK_NONE, \
41 .parent = NULL, \ 40 .parent = NULL, \
42 .child = NULL, \ 41 .child = NULL, \
43 .groups = NULL, \ 42 .groups = NULL, \
diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h
index 0ff5b523ea77..86557b5d1b3f 100644
--- a/arch/mips/include/asm/smp.h
+++ b/arch/mips/include/asm/smp.h
@@ -38,9 +38,6 @@ extern int __cpu_logical_map[NR_CPUS];
38#define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */ 38#define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */
39#define SMP_CALL_FUNCTION 0x2 39#define SMP_CALL_FUNCTION 0x2
40 40
41extern cpumask_t phys_cpu_present_map;
42#define cpu_possible_map phys_cpu_present_map
43
44extern void asmlinkage smp_bootstrap(void); 41extern void asmlinkage smp_bootstrap(void);
45 42
46/* 43/*
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
index d7f8a782aae4..03965cb1b252 100644
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -146,7 +146,7 @@ void __init plat_time_init(void)
146 146
147 BUG_ON(HZ != 100); 147 BUG_ON(HZ != 100);
148 148
149 cd->cpumask = cpumask_of_cpu(cpu); 149 cd->cpumask = cpumask_of(cpu);
150 clockevents_register_device(cd); 150 clockevents_register_device(cd);
151 action->dev_id = cd; 151 action->dev_id = cd;
152 setup_irq(JAZZ_TIMER_IRQ, action); 152 setup_irq(JAZZ_TIMER_IRQ, action);
diff --git a/arch/mips/kernel/cevt-bcm1480.c b/arch/mips/kernel/cevt-bcm1480.c
index 0a57f86945f1..b820661678b0 100644
--- a/arch/mips/kernel/cevt-bcm1480.c
+++ b/arch/mips/kernel/cevt-bcm1480.c
@@ -126,7 +126,7 @@ void __cpuinit sb1480_clockevent_init(void)
126 cd->min_delta_ns = clockevent_delta2ns(2, cd); 126 cd->min_delta_ns = clockevent_delta2ns(2, cd);
127 cd->rating = 200; 127 cd->rating = 200;
128 cd->irq = irq; 128 cd->irq = irq;
129 cd->cpumask = cpumask_of_cpu(cpu); 129 cd->cpumask = cpumask_of(cpu);
130 cd->set_next_event = sibyte_next_event; 130 cd->set_next_event = sibyte_next_event;
131 cd->set_mode = sibyte_set_mode; 131 cd->set_mode = sibyte_set_mode;
132 clockevents_register_device(cd); 132 clockevents_register_device(cd);
@@ -148,6 +148,6 @@ void __cpuinit sb1480_clockevent_init(void)
148 action->name = name; 148 action->name = name;
149 action->dev_id = cd; 149 action->dev_id = cd;
150 150
151 irq_set_affinity(irq, cpumask_of_cpu(cpu)); 151 irq_set_affinity(irq, cpumask_of(cpu));
152 setup_irq(irq, action); 152 setup_irq(irq, action);
153} 153}
diff --git a/arch/mips/kernel/cevt-ds1287.c b/arch/mips/kernel/cevt-ds1287.c
index df4acb68bfb5..1ada45ea0700 100644
--- a/arch/mips/kernel/cevt-ds1287.c
+++ b/arch/mips/kernel/cevt-ds1287.c
@@ -88,7 +88,6 @@ static void ds1287_event_handler(struct clock_event_device *dev)
88static struct clock_event_device ds1287_clockevent = { 88static struct clock_event_device ds1287_clockevent = {
89 .name = "ds1287", 89 .name = "ds1287",
90 .features = CLOCK_EVT_FEAT_PERIODIC, 90 .features = CLOCK_EVT_FEAT_PERIODIC,
91 .cpumask = CPU_MASK_CPU0,
92 .set_next_event = ds1287_set_next_event, 91 .set_next_event = ds1287_set_next_event,
93 .set_mode = ds1287_set_mode, 92 .set_mode = ds1287_set_mode,
94 .event_handler = ds1287_event_handler, 93 .event_handler = ds1287_event_handler,
@@ -122,6 +121,7 @@ int __init ds1287_clockevent_init(int irq)
122 clockevent_set_clock(cd, 32768); 121 clockevent_set_clock(cd, 32768);
123 cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd); 122 cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
124 cd->min_delta_ns = clockevent_delta2ns(0x300, cd); 123 cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
124 cd->cpumask = cpumask_of(0);
125 125
126 clockevents_register_device(&ds1287_clockevent); 126 clockevents_register_device(&ds1287_clockevent);
127 127
diff --git a/arch/mips/kernel/cevt-gt641xx.c b/arch/mips/kernel/cevt-gt641xx.c
index 6e2f58520afb..e9b787feedcb 100644
--- a/arch/mips/kernel/cevt-gt641xx.c
+++ b/arch/mips/kernel/cevt-gt641xx.c
@@ -96,7 +96,6 @@ static void gt641xx_timer0_event_handler(struct clock_event_device *dev)
96static struct clock_event_device gt641xx_timer0_clockevent = { 96static struct clock_event_device gt641xx_timer0_clockevent = {
97 .name = "gt641xx-timer0", 97 .name = "gt641xx-timer0",
98 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 98 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
99 .cpumask = CPU_MASK_CPU0,
100 .irq = GT641XX_TIMER0_IRQ, 99 .irq = GT641XX_TIMER0_IRQ,
101 .set_next_event = gt641xx_timer0_set_next_event, 100 .set_next_event = gt641xx_timer0_set_next_event,
102 .set_mode = gt641xx_timer0_set_mode, 101 .set_mode = gt641xx_timer0_set_mode,
@@ -132,6 +131,7 @@ static int __init gt641xx_timer0_clockevent_init(void)
132 clockevent_set_clock(cd, gt641xx_base_clock); 131 clockevent_set_clock(cd, gt641xx_base_clock);
133 cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd); 132 cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
134 cd->min_delta_ns = clockevent_delta2ns(0x300, cd); 133 cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
134 cd->cpumask = cpumask_of(0);
135 135
136 clockevents_register_device(&gt641xx_timer0_clockevent); 136 clockevents_register_device(&gt641xx_timer0_clockevent);
137 137
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 4a4c59f2737a..e1ec83b68031 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -195,7 +195,7 @@ int __cpuinit mips_clockevent_init(void)
195 195
196 cd->rating = 300; 196 cd->rating = 300;
197 cd->irq = irq; 197 cd->irq = irq;
198 cd->cpumask = cpumask_of_cpu(cpu); 198 cd->cpumask = cpumask_of(cpu);
199 cd->set_next_event = mips_next_event; 199 cd->set_next_event = mips_next_event;
200 cd->set_mode = mips_set_clock_mode; 200 cd->set_mode = mips_set_clock_mode;
201 cd->event_handler = mips_event_handler; 201 cd->event_handler = mips_event_handler;
diff --git a/arch/mips/kernel/cevt-sb1250.c b/arch/mips/kernel/cevt-sb1250.c
index 63ac3ad462bc..a2eebaafda52 100644
--- a/arch/mips/kernel/cevt-sb1250.c
+++ b/arch/mips/kernel/cevt-sb1250.c
@@ -125,7 +125,7 @@ void __cpuinit sb1250_clockevent_init(void)
125 cd->min_delta_ns = clockevent_delta2ns(2, cd); 125 cd->min_delta_ns = clockevent_delta2ns(2, cd);
126 cd->rating = 200; 126 cd->rating = 200;
127 cd->irq = irq; 127 cd->irq = irq;
128 cd->cpumask = cpumask_of_cpu(cpu); 128 cd->cpumask = cpumask_of(cpu);
129 cd->set_next_event = sibyte_next_event; 129 cd->set_next_event = sibyte_next_event;
130 cd->set_mode = sibyte_set_mode; 130 cd->set_mode = sibyte_set_mode;
131 clockevents_register_device(cd); 131 clockevents_register_device(cd);
@@ -147,6 +147,6 @@ void __cpuinit sb1250_clockevent_init(void)
147 action->name = name; 147 action->name = name;
148 action->dev_id = cd; 148 action->dev_id = cd;
149 149
150 irq_set_affinity(irq, cpumask_of_cpu(cpu)); 150 irq_set_affinity(irq, cpumask_of(cpu));
151 setup_irq(irq, action); 151 setup_irq(irq, action);
152} 152}
diff --git a/arch/mips/kernel/cevt-smtc.c b/arch/mips/kernel/cevt-smtc.c
index 5162fe4b5952..6d45e24db5bf 100644
--- a/arch/mips/kernel/cevt-smtc.c
+++ b/arch/mips/kernel/cevt-smtc.c
@@ -292,7 +292,7 @@ int __cpuinit mips_clockevent_init(void)
292 292
293 cd->rating = 300; 293 cd->rating = 300;
294 cd->irq = irq; 294 cd->irq = irq;
295 cd->cpumask = cpumask_of_cpu(cpu); 295 cd->cpumask = cpumask_of(cpu);
296 cd->set_next_event = mips_next_event; 296 cd->set_next_event = mips_next_event;
297 cd->set_mode = mips_set_clock_mode; 297 cd->set_mode = mips_set_clock_mode;
298 cd->event_handler = mips_event_handler; 298 cd->event_handler = mips_event_handler;
diff --git a/arch/mips/kernel/cevt-txx9.c b/arch/mips/kernel/cevt-txx9.c
index b5fc4eb412d2..eccf7d6096bd 100644
--- a/arch/mips/kernel/cevt-txx9.c
+++ b/arch/mips/kernel/cevt-txx9.c
@@ -112,7 +112,6 @@ static struct clock_event_device txx9tmr_clock_event_device = {
112 .name = "TXx9", 112 .name = "TXx9",
113 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 113 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
114 .rating = 200, 114 .rating = 200,
115 .cpumask = CPU_MASK_CPU0,
116 .set_mode = txx9tmr_set_mode, 115 .set_mode = txx9tmr_set_mode,
117 .set_next_event = txx9tmr_set_next_event, 116 .set_next_event = txx9tmr_set_next_event,
118}; 117};
@@ -150,6 +149,7 @@ void __init txx9_clockevent_init(unsigned long baseaddr, int irq,
150 clockevent_delta2ns(0xffffffff >> (32 - TXX9_TIMER_BITS), cd); 149 clockevent_delta2ns(0xffffffff >> (32 - TXX9_TIMER_BITS), cd);
151 cd->min_delta_ns = clockevent_delta2ns(0xf, cd); 150 cd->min_delta_ns = clockevent_delta2ns(0xf, cd);
152 cd->irq = irq; 151 cd->irq = irq;
152 cd->cpumask = cpumask_of(0),
153 clockevents_register_device(cd); 153 clockevents_register_device(cd);
154 setup_irq(irq, &txx9tmr_irq); 154 setup_irq(irq, &txx9tmr_irq);
155 printk(KERN_INFO "TXx9: clockevent device at 0x%lx, irq %d\n", 155 printk(KERN_INFO "TXx9: clockevent device at 0x%lx, irq %d\n",
diff --git a/arch/mips/kernel/i8253.c b/arch/mips/kernel/i8253.c
index b6ac55162b9a..f4d187825f96 100644
--- a/arch/mips/kernel/i8253.c
+++ b/arch/mips/kernel/i8253.c
@@ -115,7 +115,7 @@ void __init setup_pit_timer(void)
115 * Start pit with the boot cpu mask and make it global after the 115 * Start pit with the boot cpu mask and make it global after the
116 * IO_APIC has been initialized. 116 * IO_APIC has been initialized.
117 */ 117 */
118 cd->cpumask = cpumask_of_cpu(cpu); 118 cd->cpumask = cpumask_of(cpu);
119 clockevent_set_clock(cd, CLOCK_TICK_RATE); 119 clockevent_set_clock(cd, CLOCK_TICK_RATE);
120 cd->max_delta_ns = clockevent_delta2ns(0x7FFF, cd); 120 cd->max_delta_ns = clockevent_delta2ns(0x7FFF, cd);
121 cd->min_delta_ns = clockevent_delta2ns(0xF, cd); 121 cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index f0a4bb19e096..494a49a317e9 100644
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -155,7 +155,7 @@ static void gic_unmask_irq(unsigned int irq)
155 155
156static DEFINE_SPINLOCK(gic_lock); 156static DEFINE_SPINLOCK(gic_lock);
157 157
158static void gic_set_affinity(unsigned int irq, cpumask_t cpumask) 158static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
159{ 159{
160 cpumask_t tmp = CPU_MASK_NONE; 160 cpumask_t tmp = CPU_MASK_NONE;
161 unsigned long flags; 161 unsigned long flags;
@@ -164,7 +164,7 @@ static void gic_set_affinity(unsigned int irq, cpumask_t cpumask)
164 pr_debug(KERN_DEBUG "%s called\n", __func__); 164 pr_debug(KERN_DEBUG "%s called\n", __func__);
165 irq -= _irqbase; 165 irq -= _irqbase;
166 166
167 cpus_and(tmp, cpumask, cpu_online_map); 167 cpumask_and(&tmp, cpumask, cpu_online_mask);
168 if (cpus_empty(tmp)) 168 if (cpus_empty(tmp))
169 return; 169 return;
170 170
@@ -187,7 +187,7 @@ static void gic_set_affinity(unsigned int irq, cpumask_t cpumask)
187 set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask); 187 set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
188 188
189 } 189 }
190 irq_desc[irq].affinity = cpumask; 190 irq_desc[irq].affinity = *cpumask;
191 spin_unlock_irqrestore(&gic_lock, flags); 191 spin_unlock_irqrestore(&gic_lock, flags);
192 192
193} 193}
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c
index ca476c4f62a5..f27beca4b26d 100644
--- a/arch/mips/kernel/smp-cmp.c
+++ b/arch/mips/kernel/smp-cmp.c
@@ -51,10 +51,10 @@ static int __init allowcpus(char *str)
51 int len; 51 int len;
52 52
53 cpus_clear(cpu_allow_map); 53 cpus_clear(cpu_allow_map);
54 if (cpulist_parse(str, cpu_allow_map) == 0) { 54 if (cpulist_parse(str, &cpu_allow_map) == 0) {
55 cpu_set(0, cpu_allow_map); 55 cpu_set(0, cpu_allow_map);
56 cpus_and(cpu_possible_map, cpu_possible_map, cpu_allow_map); 56 cpus_and(cpu_possible_map, cpu_possible_map, cpu_allow_map);
57 len = cpulist_scnprintf(buf, sizeof(buf)-1, cpu_possible_map); 57 len = cpulist_scnprintf(buf, sizeof(buf)-1, &cpu_possible_map);
58 buf[len] = '\0'; 58 buf[len] = '\0';
59 pr_debug("Allowable CPUs: %s\n", buf); 59 pr_debug("Allowable CPUs: %s\n", buf);
60 return 1; 60 return 1;
@@ -226,7 +226,7 @@ void __init cmp_smp_setup(void)
226 226
227 for (i = 1; i < NR_CPUS; i++) { 227 for (i = 1; i < NR_CPUS; i++) {
228 if (amon_cpu_avail(i)) { 228 if (amon_cpu_avail(i)) {
229 cpu_set(i, phys_cpu_present_map); 229 cpu_set(i, cpu_possible_map);
230 __cpu_number_map[i] = ++ncpu; 230 __cpu_number_map[i] = ++ncpu;
231 __cpu_logical_map[ncpu] = i; 231 __cpu_logical_map[ncpu] = i;
232 } 232 }
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 87a1816c1f45..6f7ee5ac46ee 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -70,7 +70,7 @@ static unsigned int __init smvp_vpe_init(unsigned int tc, unsigned int mvpconf0,
70 write_vpe_c0_vpeconf0(tmp); 70 write_vpe_c0_vpeconf0(tmp);
71 71
72 /* Record this as available CPU */ 72 /* Record this as available CPU */
73 cpu_set(tc, phys_cpu_present_map); 73 cpu_set(tc, cpu_possible_map);
74 __cpu_number_map[tc] = ++ncpu; 74 __cpu_number_map[tc] = ++ncpu;
75 __cpu_logical_map[ncpu] = tc; 75 __cpu_logical_map[ncpu] = tc;
76 } 76 }
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 8bf88faf5afd..3da94704f816 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -44,15 +44,10 @@
44#include <asm/mipsmtregs.h> 44#include <asm/mipsmtregs.h>
45#endif /* CONFIG_MIPS_MT_SMTC */ 45#endif /* CONFIG_MIPS_MT_SMTC */
46 46
47cpumask_t phys_cpu_present_map; /* Bitmask of available CPUs */
48volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */ 47volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */
49cpumask_t cpu_online_map; /* Bitmask of currently online CPUs */
50int __cpu_number_map[NR_CPUS]; /* Map physical to logical */ 48int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
51int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */ 49int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
52 50
53EXPORT_SYMBOL(phys_cpu_present_map);
54EXPORT_SYMBOL(cpu_online_map);
55
56extern void cpu_idle(void); 51extern void cpu_idle(void);
57 52
58/* Number of TCs (or siblings in Intel speak) per CPU core */ 53/* Number of TCs (or siblings in Intel speak) per CPU core */
@@ -195,7 +190,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
195/* preload SMP state for boot cpu */ 190/* preload SMP state for boot cpu */
196void __devinit smp_prepare_boot_cpu(void) 191void __devinit smp_prepare_boot_cpu(void)
197{ 192{
198 cpu_set(0, phys_cpu_present_map); 193 cpu_set(0, cpu_possible_map);
199 cpu_set(0, cpu_online_map); 194 cpu_set(0, cpu_online_map);
200 cpu_set(0, cpu_callin_map); 195 cpu_set(0, cpu_callin_map);
201} 196}
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 897fb2b4751c..b6cca01ff82b 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -290,7 +290,7 @@ static void smtc_configure_tlb(void)
290 * possibly leave some TCs/VPEs as "slave" processors. 290 * possibly leave some TCs/VPEs as "slave" processors.
291 * 291 *
292 * Use c0_MVPConf0 to find out how many TCs are available, setting up 292 * Use c0_MVPConf0 to find out how many TCs are available, setting up
293 * phys_cpu_present_map and the logical/physical mappings. 293 * cpu_possible_map and the logical/physical mappings.
294 */ 294 */
295 295
296int __init smtc_build_cpu_map(int start_cpu_slot) 296int __init smtc_build_cpu_map(int start_cpu_slot)
@@ -304,7 +304,7 @@ int __init smtc_build_cpu_map(int start_cpu_slot)
304 */ 304 */
305 ntcs = ((read_c0_mvpconf0() & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1; 305 ntcs = ((read_c0_mvpconf0() & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1;
306 for (i=start_cpu_slot; i<NR_CPUS && i<ntcs; i++) { 306 for (i=start_cpu_slot; i<NR_CPUS && i<ntcs; i++) {
307 cpu_set(i, phys_cpu_present_map); 307 cpu_set(i, cpu_possible_map);
308 __cpu_number_map[i] = i; 308 __cpu_number_map[i] = i;
309 __cpu_logical_map[i] = i; 309 __cpu_logical_map[i] = i;
310 } 310 }
@@ -521,7 +521,7 @@ void smtc_prepare_cpus(int cpus)
521 * Pull any physically present but unused TCs out of circulation. 521 * Pull any physically present but unused TCs out of circulation.
522 */ 522 */
523 while (tc < (((val & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1)) { 523 while (tc < (((val & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1)) {
524 cpu_clear(tc, phys_cpu_present_map); 524 cpu_clear(tc, cpu_possible_map);
525 cpu_clear(tc, cpu_present_map); 525 cpu_clear(tc, cpu_present_map);
526 tc++; 526 tc++;
527 } 527 }
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c
index f84a46a8ae6e..aabd7274507b 100644
--- a/arch/mips/mti-malta/malta-smtc.c
+++ b/arch/mips/mti-malta/malta-smtc.c
@@ -114,9 +114,9 @@ struct plat_smp_ops msmtc_smp_ops = {
114 */ 114 */
115 115
116 116
117void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity) 117void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
118{ 118{
119 cpumask_t tmask = affinity; 119 cpumask_t tmask = *affinity;
120 int cpu = 0; 120 int cpu = 0;
121 void smtc_set_irq_affinity(unsigned int irq, cpumask_t aff); 121 void smtc_set_irq_affinity(unsigned int irq, cpumask_t aff);
122 122
@@ -139,7 +139,7 @@ void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity)
139 * be made to forward to an offline "CPU". 139 * be made to forward to an offline "CPU".
140 */ 140 */
141 141
142 for_each_cpu_mask(cpu, affinity) { 142 for_each_cpu(cpu, affinity) {
143 if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu)) 143 if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu))
144 cpu_clear(cpu, tmask); 144 cpu_clear(cpu, tmask);
145 } 145 }
diff --git a/arch/mips/nxp/pnx8550/common/time.c b/arch/mips/nxp/pnx8550/common/time.c
index 62f495b57f93..cf293b279098 100644
--- a/arch/mips/nxp/pnx8550/common/time.c
+++ b/arch/mips/nxp/pnx8550/common/time.c
@@ -102,6 +102,7 @@ __init void plat_time_init(void)
102 unsigned int p; 102 unsigned int p;
103 unsigned int pow2p; 103 unsigned int pow2p;
104 104
105 pnx8xxx_clockevent.cpumask = cpu_none_mask;
105 clockevents_register_device(&pnx8xxx_clockevent); 106 clockevents_register_device(&pnx8xxx_clockevent);
106 clocksource_register(&pnx_clocksource); 107 clocksource_register(&pnx_clocksource);
107 108
diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c
index 3a7df647ca77..f78c29b68d77 100644
--- a/arch/mips/pmc-sierra/yosemite/smp.c
+++ b/arch/mips/pmc-sierra/yosemite/smp.c
@@ -141,7 +141,7 @@ static void __cpuinit yos_boot_secondary(int cpu, struct task_struct *idle)
141} 141}
142 142
143/* 143/*
144 * Detect available CPUs, populate phys_cpu_present_map before smp_init 144 * Detect available CPUs, populate cpu_possible_map before smp_init
145 * 145 *
146 * We don't want to start the secondary CPU yet nor do we have a nice probing 146 * We don't want to start the secondary CPU yet nor do we have a nice probing
147 * feature in PMON so we just assume presence of the secondary core. 147 * feature in PMON so we just assume presence of the secondary core.
@@ -150,10 +150,10 @@ static void __init yos_smp_setup(void)
150{ 150{
151 int i; 151 int i;
152 152
153 cpus_clear(phys_cpu_present_map); 153 cpus_clear(cpu_possible_map);
154 154
155 for (i = 0; i < 2; i++) { 155 for (i = 0; i < 2; i++) {
156 cpu_set(i, phys_cpu_present_map); 156 cpu_set(i, cpu_possible_map);
157 __cpu_number_map[i] = i; 157 __cpu_number_map[i] = i;
158 __cpu_logical_map[i] = i; 158 __cpu_logical_map[i] = i;
159 } 159 }
diff --git a/arch/mips/sgi-ip27/ip27-smp.c b/arch/mips/sgi-ip27/ip27-smp.c
index ba5cdebeaf0d..5b47d6b65275 100644
--- a/arch/mips/sgi-ip27/ip27-smp.c
+++ b/arch/mips/sgi-ip27/ip27-smp.c
@@ -76,7 +76,7 @@ static int do_cpumask(cnodeid_t cnode, nasid_t nasid, int highest)
76 /* Only let it join in if it's marked enabled */ 76 /* Only let it join in if it's marked enabled */
77 if ((acpu->cpu_info.flags & KLINFO_ENABLE) && 77 if ((acpu->cpu_info.flags & KLINFO_ENABLE) &&
78 (tot_cpus_found != NR_CPUS)) { 78 (tot_cpus_found != NR_CPUS)) {
79 cpu_set(cpuid, phys_cpu_present_map); 79 cpu_set(cpuid, cpu_possible_map);
80 alloc_cpupda(cpuid, tot_cpus_found); 80 alloc_cpupda(cpuid, tot_cpus_found);
81 cpus_found++; 81 cpus_found++;
82 tot_cpus_found++; 82 tot_cpus_found++;
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 1327c2746fb7..f024057a35f8 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -134,7 +134,7 @@ void __cpuinit hub_rt_clock_event_init(void)
134 cd->min_delta_ns = clockevent_delta2ns(0x300, cd); 134 cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
135 cd->rating = 200; 135 cd->rating = 200;
136 cd->irq = irq; 136 cd->irq = irq;
137 cd->cpumask = cpumask_of_cpu(cpu); 137 cd->cpumask = cpumask_of(cpu);
138 cd->set_next_event = rt_next_event; 138 cd->set_next_event = rt_next_event;
139 cd->set_mode = rt_set_mode; 139 cd->set_mode = rt_set_mode;
140 clockevents_register_device(cd); 140 clockevents_register_device(cd);
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index a35818ed4263..12b465d404df 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -50,7 +50,7 @@ static void enable_bcm1480_irq(unsigned int irq);
50static void disable_bcm1480_irq(unsigned int irq); 50static void disable_bcm1480_irq(unsigned int irq);
51static void ack_bcm1480_irq(unsigned int irq); 51static void ack_bcm1480_irq(unsigned int irq);
52#ifdef CONFIG_SMP 52#ifdef CONFIG_SMP
53static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask); 53static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask);
54#endif 54#endif
55 55
56#ifdef CONFIG_PCI 56#ifdef CONFIG_PCI
@@ -109,7 +109,7 @@ void bcm1480_unmask_irq(int cpu, int irq)
109} 109}
110 110
111#ifdef CONFIG_SMP 111#ifdef CONFIG_SMP
112static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask) 112static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
113{ 113{
114 int i = 0, old_cpu, cpu, int_on, k; 114 int i = 0, old_cpu, cpu, int_on, k;
115 u64 cur_ints; 115 u64 cur_ints;
@@ -117,11 +117,11 @@ static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask)
117 unsigned long flags; 117 unsigned long flags;
118 unsigned int irq_dirty; 118 unsigned int irq_dirty;
119 119
120 if (cpus_weight(mask) != 1) { 120 if (cpumask_weight(mask) != 1) {
121 printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); 121 printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq);
122 return; 122 return;
123 } 123 }
124 i = first_cpu(mask); 124 i = cpumask_first(mask);
125 125
126 /* Convert logical CPU to physical CPU */ 126 /* Convert logical CPU to physical CPU */
127 cpu = cpu_logical_map(i); 127 cpu = cpu_logical_map(i);
diff --git a/arch/mips/sibyte/bcm1480/smp.c b/arch/mips/sibyte/bcm1480/smp.c
index bd9eeb43ed0e..dddfda8e8294 100644
--- a/arch/mips/sibyte/bcm1480/smp.c
+++ b/arch/mips/sibyte/bcm1480/smp.c
@@ -136,7 +136,7 @@ static void __cpuinit bcm1480_boot_secondary(int cpu, struct task_struct *idle)
136 136
137/* 137/*
138 * Use CFE to find out how many CPUs are available, setting up 138 * Use CFE to find out how many CPUs are available, setting up
139 * phys_cpu_present_map and the logical/physical mappings. 139 * cpu_possible_map and the logical/physical mappings.
140 * XXXKW will the boot CPU ever not be physical 0? 140 * XXXKW will the boot CPU ever not be physical 0?
141 * 141 *
142 * Common setup before any secondaries are started 142 * Common setup before any secondaries are started
@@ -145,14 +145,14 @@ static void __init bcm1480_smp_setup(void)
145{ 145{
146 int i, num; 146 int i, num;
147 147
148 cpus_clear(phys_cpu_present_map); 148 cpus_clear(cpu_possible_map);
149 cpu_set(0, phys_cpu_present_map); 149 cpu_set(0, cpu_possible_map);
150 __cpu_number_map[0] = 0; 150 __cpu_number_map[0] = 0;
151 __cpu_logical_map[0] = 0; 151 __cpu_logical_map[0] = 0;
152 152
153 for (i = 1, num = 0; i < NR_CPUS; i++) { 153 for (i = 1, num = 0; i < NR_CPUS; i++) {
154 if (cfe_cpu_stop(i) == 0) { 154 if (cfe_cpu_stop(i) == 0) {
155 cpu_set(i, phys_cpu_present_map); 155 cpu_set(i, cpu_possible_map);
156 __cpu_number_map[i] = ++num; 156 __cpu_number_map[i] = ++num;
157 __cpu_logical_map[num] = i; 157 __cpu_logical_map[num] = i;
158 } 158 }
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index a5158483986e..808ac2959b8c 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -50,7 +50,7 @@ static void enable_sb1250_irq(unsigned int irq);
50static void disable_sb1250_irq(unsigned int irq); 50static void disable_sb1250_irq(unsigned int irq);
51static void ack_sb1250_irq(unsigned int irq); 51static void ack_sb1250_irq(unsigned int irq);
52#ifdef CONFIG_SMP 52#ifdef CONFIG_SMP
53static void sb1250_set_affinity(unsigned int irq, cpumask_t mask); 53static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask);
54#endif 54#endif
55 55
56#ifdef CONFIG_SIBYTE_HAS_LDT 56#ifdef CONFIG_SIBYTE_HAS_LDT
@@ -103,16 +103,16 @@ void sb1250_unmask_irq(int cpu, int irq)
103} 103}
104 104
105#ifdef CONFIG_SMP 105#ifdef CONFIG_SMP
106static void sb1250_set_affinity(unsigned int irq, cpumask_t mask) 106static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask)
107{ 107{
108 int i = 0, old_cpu, cpu, int_on; 108 int i = 0, old_cpu, cpu, int_on;
109 u64 cur_ints; 109 u64 cur_ints;
110 struct irq_desc *desc = irq_desc + irq; 110 struct irq_desc *desc = irq_desc + irq;
111 unsigned long flags; 111 unsigned long flags;
112 112
113 i = first_cpu(mask); 113 i = cpumask_first(mask);
114 114
115 if (cpus_weight(mask) > 1) { 115 if (cpumask_weight(mask) > 1) {
116 printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq); 116 printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq);
117 return; 117 return;
118 } 118 }
diff --git a/arch/mips/sibyte/sb1250/smp.c b/arch/mips/sibyte/sb1250/smp.c
index 0734b933e969..5950a288a7da 100644
--- a/arch/mips/sibyte/sb1250/smp.c
+++ b/arch/mips/sibyte/sb1250/smp.c
@@ -124,7 +124,7 @@ static void __cpuinit sb1250_boot_secondary(int cpu, struct task_struct *idle)
124 124
125/* 125/*
126 * Use CFE to find out how many CPUs are available, setting up 126 * Use CFE to find out how many CPUs are available, setting up
127 * phys_cpu_present_map and the logical/physical mappings. 127 * cpu_possible_map and the logical/physical mappings.
128 * XXXKW will the boot CPU ever not be physical 0? 128 * XXXKW will the boot CPU ever not be physical 0?
129 * 129 *
130 * Common setup before any secondaries are started 130 * Common setup before any secondaries are started
@@ -133,14 +133,14 @@ static void __init sb1250_smp_setup(void)
133{ 133{
134 int i, num; 134 int i, num;
135 135
136 cpus_clear(phys_cpu_present_map); 136 cpus_clear(cpu_possible_map);
137 cpu_set(0, phys_cpu_present_map); 137 cpu_set(0, cpu_possible_map);
138 __cpu_number_map[0] = 0; 138 __cpu_number_map[0] = 0;
139 __cpu_logical_map[0] = 0; 139 __cpu_logical_map[0] = 0;
140 140
141 for (i = 1, num = 0; i < NR_CPUS; i++) { 141 for (i = 1, num = 0; i < NR_CPUS; i++) {
142 if (cfe_cpu_stop(i) == 0) { 142 if (cfe_cpu_stop(i) == 0) {
143 cpu_set(i, phys_cpu_present_map); 143 cpu_set(i, cpu_possible_map);
144 __cpu_number_map[i] = ++num; 144 __cpu_number_map[i] = ++num;
145 __cpu_logical_map[num] = i; 145 __cpu_logical_map[num] = i;
146 } 146 }
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c
index 796e3ce28720..69f5f88711cc 100644
--- a/arch/mips/sni/time.c
+++ b/arch/mips/sni/time.c
@@ -80,7 +80,7 @@ static void __init sni_a20r_timer_setup(void)
80 struct irqaction *action = &a20r_irqaction; 80 struct irqaction *action = &a20r_irqaction;
81 unsigned int cpu = smp_processor_id(); 81 unsigned int cpu = smp_processor_id();
82 82
83 cd->cpumask = cpumask_of_cpu(cpu); 83 cd->cpumask = cpumask_of(cpu);
84 clockevents_register_device(cd); 84 clockevents_register_device(cd);
85 action->dev_id = cd; 85 action->dev_id = cd;
86 setup_irq(SNI_A20R_IRQ_TIMER, &a20r_irqaction); 86 setup_irq(SNI_A20R_IRQ_TIMER, &a20r_irqaction);