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-rw-r--r--arch/mips/Kconfig46
-rw-r--r--arch/mips/Makefile8
-rw-r--r--arch/mips/au1000/common/dbdma.c10
-rw-r--r--arch/mips/au1000/db1x00/Makefile1
-rw-r--r--arch/mips/au1000/db1x00/mirage_ts.c260
-rw-r--r--arch/mips/basler/excite/excite_device.c16
-rw-r--r--arch/mips/basler/excite/excite_fpga.h80
-rw-r--r--arch/mips/configs/atlas_defconfig3
-rw-r--r--arch/mips/configs/bigsur_defconfig1
-rw-r--r--arch/mips/configs/capcella_defconfig1
-rw-r--r--arch/mips/configs/cobalt_defconfig3
-rw-r--r--arch/mips/configs/db1000_defconfig1
-rw-r--r--arch/mips/configs/db1100_defconfig1
-rw-r--r--arch/mips/configs/db1200_defconfig1
-rw-r--r--arch/mips/configs/db1500_defconfig1
-rw-r--r--arch/mips/configs/db1550_defconfig1
-rw-r--r--arch/mips/configs/ddb5477_defconfig1
-rw-r--r--arch/mips/configs/decstation_defconfig1
-rw-r--r--arch/mips/configs/e55_defconfig11
-rw-r--r--arch/mips/configs/emma2rh_defconfig1
-rw-r--r--arch/mips/configs/ev64120_defconfig1
-rw-r--r--arch/mips/configs/ev96100_defconfig850
-rw-r--r--arch/mips/configs/excite_defconfig1
-rw-r--r--arch/mips/configs/ip22_defconfig3
-rw-r--r--arch/mips/configs/ip27_defconfig3
-rw-r--r--arch/mips/configs/ip32_defconfig1
-rw-r--r--arch/mips/configs/it8172_defconfig1
-rw-r--r--arch/mips/configs/ivr_defconfig1
-rw-r--r--arch/mips/configs/jaguar-atx_defconfig3
-rw-r--r--arch/mips/configs/jmr3927_defconfig1
-rw-r--r--arch/mips/configs/lasat200_defconfig3
-rw-r--r--arch/mips/configs/malta_defconfig3
-rw-r--r--arch/mips/configs/mipssim_defconfig1
-rw-r--r--arch/mips/configs/mpc30x_defconfig13
-rw-r--r--arch/mips/configs/ocelot_3_defconfig1
-rw-r--r--arch/mips/configs/ocelot_c_defconfig3
-rw-r--r--arch/mips/configs/ocelot_defconfig3
-rw-r--r--arch/mips/configs/ocelot_g_defconfig3
-rw-r--r--arch/mips/configs/pb1100_defconfig1
-rw-r--r--arch/mips/configs/pb1500_defconfig1
-rw-r--r--arch/mips/configs/pb1550_defconfig1
-rw-r--r--arch/mips/configs/pnx8550-jbs_defconfig1
-rw-r--r--arch/mips/configs/pnx8550-v2pci_defconfig1
-rw-r--r--arch/mips/configs/qemu_defconfig3
-rw-r--r--arch/mips/configs/rbhma4500_defconfig1
-rw-r--r--arch/mips/configs/rm200_defconfig3
-rw-r--r--arch/mips/configs/sb1250-swarm_defconfig1
-rw-r--r--arch/mips/configs/sead_defconfig1
-rw-r--r--arch/mips/configs/tb0226_defconfig1
-rw-r--r--arch/mips/configs/tb0229_defconfig1
-rw-r--r--arch/mips/configs/tb0287_defconfig1
-rw-r--r--arch/mips/configs/workpad_defconfig11
-rw-r--r--arch/mips/configs/wrppmc_defconfig1
-rw-r--r--arch/mips/configs/yosemite_defconfig1
-rw-r--r--arch/mips/defconfig5
-rw-r--r--arch/mips/galileo-boards/ev96100/Makefile9
-rw-r--r--arch/mips/galileo-boards/ev96100/init.c173
-rw-r--r--arch/mips/galileo-boards/ev96100/irq.c77
-rw-r--r--arch/mips/galileo-boards/ev96100/puts.c138
-rw-r--r--arch/mips/galileo-boards/ev96100/reset.c70
-rw-r--r--arch/mips/galileo-boards/ev96100/setup.c159
-rw-r--r--arch/mips/galileo-boards/ev96100/time.c88
-rw-r--r--arch/mips/kernel/cpu-probe.c62
-rw-r--r--arch/mips/kernel/irixsig.c63
-rw-r--r--arch/mips/kernel/linux32.c10
-rw-r--r--arch/mips/kernel/process.c257
-rw-r--r--arch/mips/kernel/scall32-o32.S2
-rw-r--r--arch/mips/kernel/scall64-64.S2
-rw-r--r--arch/mips/kernel/scall64-n32.S6
-rw-r--r--arch/mips/kernel/scall64-o32.S4
-rw-r--r--arch/mips/kernel/setup.c439
-rw-r--r--arch/mips/kernel/signal.c8
-rw-r--r--arch/mips/kernel/signal32.c7
-rw-r--r--arch/mips/kernel/smp-mt.c2
-rw-r--r--arch/mips/kernel/smtc-asm.S2
-rw-r--r--arch/mips/kernel/syscall.c4
-rw-r--r--arch/mips/kernel/traps.c146
-rw-r--r--arch/mips/kernel/vpe.c6
-rw-r--r--arch/mips/mips-boards/atlas/atlas_int.c105
-rw-r--r--arch/mips/mips-boards/atlas/atlas_setup.c2
-rw-r--r--arch/mips/mips-boards/generic/time.c64
-rw-r--r--arch/mips/mm/c-r3k.c2
-rw-r--r--arch/mips/mm/c-r4k.c28
-rw-r--r--arch/mips/mm/c-sb1.c58
-rw-r--r--arch/mips/mm/c-tx39.c4
-rw-r--r--arch/mips/mm/cache.c18
-rw-r--r--arch/mips/mm/fault.c2
-rw-r--r--arch/mips/mm/init.c4
-rw-r--r--arch/mips/mm/tlb-r4k.c21
-rw-r--r--arch/mips/pci/Makefile4
-rw-r--r--arch/mips/pci/fixup-atlas.c20
-rw-r--r--arch/mips/pci/fixup-ev96100.c48
-rw-r--r--arch/mips/pci/ops-au1000.c2
-rw-r--r--arch/mips/pci/ops-gt96100.c169
-rw-r--r--arch/mips/pci/pci-ev96100.c63
-rw-r--r--arch/mips/pci/pci-ip27.c2
-rw-r--r--arch/mips/sgi-ip27/ip27-memory.c3
-rw-r--r--arch/mips/sibyte/bcm1480/irq.c19
-rw-r--r--arch/mips/sibyte/sb1250/irq.c17
99 files changed, 841 insertions, 2926 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 330f6abc7703..30750c54bdf5 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -126,7 +126,7 @@ config BASLER_EXCITE
126 select IRQ_CPU 126 select IRQ_CPU
127 select IRQ_CPU_RM7K 127 select IRQ_CPU_RM7K
128 select IRQ_CPU_RM9K 128 select IRQ_CPU_RM9K
129 select SERIAL_RM9000 129 select MIPS_RM9122
130 select SYS_HAS_CPU_RM9000 130 select SYS_HAS_CPU_RM9000
131 select SYS_SUPPORTS_32BIT_KERNEL 131 select SYS_SUPPORTS_32BIT_KERNEL
132 select SYS_SUPPORTS_64BIT_KERNEL 132 select SYS_SUPPORTS_64BIT_KERNEL
@@ -203,26 +203,6 @@ config MIPS_EV64120
203 <http://www.marvell.com/>. Say Y here if you wish to build a 203 <http://www.marvell.com/>. Say Y here if you wish to build a
204 kernel for this platform. 204 kernel for this platform.
205 205
206config MIPS_EV96100
207 bool "Galileo EV96100 Evaluation board (EXPERIMENTAL)"
208 depends on EXPERIMENTAL
209 select DMA_NONCOHERENT
210 select HW_HAS_PCI
211 select IRQ_CPU
212 select MIPS_GT96100
213 select RM7000_CPU_SCACHE
214 select SWAP_IO_SPACE
215 select SYS_HAS_CPU_R5000
216 select SYS_HAS_CPU_RM7000
217 select SYS_SUPPORTS_32BIT_KERNEL
218 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
219 select SYS_SUPPORTS_BIG_ENDIAN
220 help
221 This is an evaluation board based on the Galileo GT-96100 LAN/WAN
222 communications controllers containing a MIPS R5000 compatible core
223 running at 83MHz. Their website is <http://www.marvell.com/>. Say Y
224 here if you wish to build a kernel for this platform.
225
226config MIPS_IVR 206config MIPS_IVR
227 bool "Globespan IVR board" 207 bool "Globespan IVR board"
228 select DMA_NONCOHERENT 208 select DMA_NONCOHERENT
@@ -974,6 +954,12 @@ config MIPS_TX3927
974 bool 954 bool
975 select HAS_TXX9_SERIAL 955 select HAS_TXX9_SERIAL
976 956
957config MIPS_RM9122
958 bool
959 select SERIAL_RM9000
960 select GPI_RM9000
961 select WDT_RM9000
962
977config PCI_MARVELL 963config PCI_MARVELL
978 bool 964 bool
979 965
@@ -1024,6 +1010,15 @@ config EMMA2RH
1024 depends on MARKEINS 1010 depends on MARKEINS
1025 default y 1011 default y
1026 1012
1013config SERIAL_RM9000
1014 bool
1015
1016config GPI_RM9000
1017 bool
1018
1019config WDT_RM9000
1020 bool
1021
1027# 1022#
1028# Unfortunately not all GT64120 systems run the chip at the same clock. 1023# Unfortunately not all GT64120 systems run the chip at the same clock.
1029# As the user for the clock rate and try to minimize the available options. 1024# As the user for the clock rate and try to minimize the available options.
@@ -1054,10 +1049,6 @@ config AU1X00_USB_DEVICE
1054 depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 1049 depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
1055 default n 1050 default n
1056 1051
1057config MIPS_GT96100
1058 bool
1059 select MIPS_GT64120
1060
1061config IT8172_CIR 1052config IT8172_CIR
1062 bool 1053 bool
1063 depends on MIPS_ITE8172 || MIPS_IVR 1054 depends on MIPS_ITE8172 || MIPS_IVR
@@ -1527,6 +1518,7 @@ config MIPS_MT_SMTC
1527 select CPU_MIPSR2_SRS 1518 select CPU_MIPSR2_SRS
1528 select MIPS_MT 1519 select MIPS_MT
1529 select SMP 1520 select SMP
1521 select SYS_SUPPORTS_SMP
1530 help 1522 help
1531 This is a kernel model which is known a SMTC or lately has been 1523 This is a kernel model which is known a SMTC or lately has been
1532 marketesed into SMVP. 1524 marketesed into SMVP.
@@ -1538,6 +1530,7 @@ config MIPS_MT_SMP
1538 select CPU_MIPSR2_SRS 1530 select CPU_MIPSR2_SRS
1539 select MIPS_MT 1531 select MIPS_MT
1540 select SMP 1532 select SMP
1533 select SYS_SUPPORTS_SMP
1541 help 1534 help
1542 This is a kernel model which is also known a VSMP or lately 1535 This is a kernel model which is also known a VSMP or lately
1543 has been marketesed into SMVP. 1536 has been marketesed into SMVP.
@@ -1649,9 +1642,7 @@ config GENERIC_IRQ_PROBE
1649 default y 1642 default y
1650 1643
1651config IRQ_PER_CPU 1644config IRQ_PER_CPU
1652 depends on SMP
1653 bool 1645 bool
1654 default y
1655 1646
1656# 1647#
1657# - Highmem only makes sense for the 32-bit kernel. 1648# - Highmem only makes sense for the 32-bit kernel.
@@ -1719,6 +1710,7 @@ source "mm/Kconfig"
1719config SMP 1710config SMP
1720 bool "Multi-Processing support" 1711 bool "Multi-Processing support"
1721 depends on SYS_SUPPORTS_SMP 1712 depends on SYS_SUPPORTS_SMP
1713 select IRQ_PER_CPU
1722 help 1714 help
1723 This enables support for systems with more than one CPU. If you have 1715 This enables support for systems with more than one CPU. If you have
1724 a system with only one CPU, like most personal computers, say N. If 1716 a system with only one CPU, like most personal computers, say N. If
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index d333ce4ba26b..e521826b4234 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -280,13 +280,6 @@ cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
280load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000 280load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000
281 281
282# 282#
283# Galileo EV96100 Board
284#
285core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/
286cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100
287load-$(CONFIG_MIPS_EV96100) += 0xffffffff80100000
288
289#
290# Wind River PPMC Board (4KC + GT64120) 283# Wind River PPMC Board (4KC + GT64120)
291# 284#
292core-$(CONFIG_WR_PPMC) += arch/mips/gt64120/wrppmc/ 285core-$(CONFIG_WR_PPMC) += arch/mips/gt64120/wrppmc/
@@ -330,6 +323,7 @@ load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
330# MIPS SEAD board 323# MIPS SEAD board
331# 324#
332core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/ 325core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
326cflags-$(CONFIG_MIPS_SEAD) += -Iinclude/asm-mips/mach-mips
333load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000 327load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
334 328
335# 329#
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c
index 98244d51c154..c4fae8ff4671 100644
--- a/arch/mips/au1000/common/dbdma.c
+++ b/arch/mips/au1000/common/dbdma.c
@@ -230,7 +230,7 @@ EXPORT_SYMBOL(au1xxx_ddma_add_device);
230*/ 230*/
231u32 231u32
232au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, 232au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
233 void (*callback)(int, void *, struct pt_regs *), void *callparam) 233 void (*callback)(int, void *), void *callparam)
234{ 234{
235 unsigned long flags; 235 unsigned long flags;
236 u32 used, chan, rv; 236 u32 used, chan, rv;
@@ -248,8 +248,10 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
248 au1xxx_dbdma_init(); 248 au1xxx_dbdma_init();
249 dbdma_initialized = 1; 249 dbdma_initialized = 1;
250 250
251 if ((stp = find_dbdev_id(srcid)) == NULL) return 0; 251 if ((stp = find_dbdev_id(srcid)) == NULL)
252 if ((dtp = find_dbdev_id(destid)) == NULL) return 0; 252 return 0;
253 if ((dtp = find_dbdev_id(destid)) == NULL)
254 return 0;
253 255
254 used = 0; 256 used = 0;
255 rv = 0; 257 rv = 0;
@@ -869,7 +871,7 @@ dbdma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
869 au_sync(); 871 au_sync();
870 872
871 if (ctp->chan_callback) 873 if (ctp->chan_callback)
872 (ctp->chan_callback)(irq, ctp->chan_callparam, regs); 874 (ctp->chan_callback)(irq, ctp->chan_callparam);
873 875
874 ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); 876 ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
875 return IRQ_RETVAL(1); 877 return IRQ_RETVAL(1);
diff --git a/arch/mips/au1000/db1x00/Makefile b/arch/mips/au1000/db1x00/Makefile
index 4c7d763f2113..51d62bd5d900 100644
--- a/arch/mips/au1000/db1x00/Makefile
+++ b/arch/mips/au1000/db1x00/Makefile
@@ -6,4 +6,3 @@
6# Makefile for the Alchemy Semiconductor Db1x00 board. 6# Makefile for the Alchemy Semiconductor Db1x00 board.
7 7
8lib-y := init.o board_setup.o irqmap.o 8lib-y := init.o board_setup.o irqmap.o
9obj-$(CONFIG_WM97XX_COMODULE) += mirage_ts.o
diff --git a/arch/mips/au1000/db1x00/mirage_ts.c b/arch/mips/au1000/db1x00/mirage_ts.c
deleted file mode 100644
index 0942dcf69518..000000000000
--- a/arch/mips/au1000/db1x00/mirage_ts.c
+++ /dev/null
@@ -1,260 +0,0 @@
1/*
2 * linux/arch/mips/au1000/db1x00/mirage_ts.c
3 *
4 * BRIEF MODULE DESCRIPTION
5 * Glue between Mirage board-specific touchscreen pieces
6 * and generic Wolfson Codec touchscreen support.
7 *
8 * Based on pb1100_ts.c used in Hydrogen II.
9 *
10 * Copyright (c) 2003 Embedded Edge, LLC
11 * dan@embeddededge.com
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 *
18 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
21 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
24 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
25 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 675 Mass Ave, Cambridge, MA 02139, USA.
32 */
33
34#include <linux/types.h>
35#include <linux/module.h>
36#include <linux/sched.h>
37#include <linux/kernel.h>
38#include <linux/init.h>
39#include <linux/fs.h>
40#include <linux/poll.h>
41#include <linux/proc_fs.h>
42#include <linux/smp.h>
43#include <linux/smp_lock.h>
44#include <linux/wait.h>
45
46#include <asm/segment.h>
47#include <asm/irq.h>
48#include <asm/uaccess.h>
49#include <asm/delay.h>
50#include <asm/au1000.h>
51
52/*
53 * Imported interface to Wolfson Codec driver.
54 */
55extern void *wm97xx_ts_get_handle(int which);
56extern int wm97xx_ts_ready(void* ts_handle);
57extern void wm97xx_ts_set_cal(void* ts_handle, int xscale, int xtrans, int yscale, int ytrans);
58extern u16 wm97xx_ts_get_ac97(void* ts_handle, u8 reg);
59extern void wm97xx_ts_set_ac97(void* ts_handle, u8 reg, u16 val);
60extern int wm97xx_ts_read_data(void* ts_handle, long* x, long* y, long* pressure);
61extern void wm97xx_ts_send_data(void* ts_handle, long x, long y, long z);
62
63int wm97xx_comodule_present = 1;
64
65
66#define TS_NAME "mirage_ts"
67
68#define err(format, arg...) printk(KERN_ERR TS_NAME ": " format "\n" , ## arg)
69#define info(format, arg...) printk(KERN_INFO TS_NAME ": " format "\n" , ## arg)
70#define warn(format, arg...) printk(KERN_WARNING TS_NAME ": " format "\n" , ## arg)
71#define DPRINTK(format, arg...) printk("%s: " format "\n", __FUNCTION__ , ## arg)
72
73
74#define PEN_DOWN_IRQ AU1000_GPIO_7
75
76static struct task_struct *ts_task = 0;
77static DECLARE_COMPLETION(ts_complete);
78static DECLARE_WAIT_QUEUE_HEAD(pendown_wait);
79
80#ifdef CONFIG_WM97XX_FIVEWIRETS
81static int release_pressure = 1;
82#else
83static int release_pressure = 50;
84#endif
85
86typedef struct {
87 long x;
88 long y;
89} DOWN_EVENT;
90
91#define SAMPLE_RATE 50 /* samples per second */
92#define PEN_DEBOUNCE 5 /* samples for settling - fn of SAMPLE_RATE */
93#define PEN_UP_TIMEOUT 10 /* in seconds */
94#define PEN_UP_SETTLE 5 /* samples per second */
95
96static struct {
97 int xscale;
98 int xtrans;
99 int yscale;
100 int ytrans;
101} mirage_ts_cal =
102{
103#if 0
104 .xscale = 84,
105 .xtrans = -157,
106 .yscale = 66,
107 .ytrans = -150,
108#else
109 .xscale = 84,
110 .xtrans = -150,
111 .yscale = 66,
112 .ytrans = -146,
113#endif
114};
115
116
117static void pendown_irq(int irqnr, void *devid, struct pt_regs *regs)
118{
119//DPRINTK("got one 0x%x", au_readl(SYS_PINSTATERD));
120 wake_up(&pendown_wait);
121}
122
123static int ts_thread(void *id)
124{
125 static int pen_was_down = 0;
126 static DOWN_EVENT pen_xy;
127 long x, y, z;
128 void *ts; /* handle */
129 struct task_struct *tsk = current;
130 int timeout = HZ / SAMPLE_RATE;
131
132 ts_task = tsk;
133
134 daemonize();
135 tsk->tty = NULL;
136 tsk->policy = SCHED_FIFO;
137 tsk->rt_priority = 1;
138 strcpy(tsk->comm, "touchscreen");
139
140 /* only want to receive SIGKILL */
141 spin_lock_irq(&tsk->sigmask_lock);
142 siginitsetinv(&tsk->blocked, sigmask(SIGKILL));
143 recalc_sigpending(tsk);
144 spin_unlock_irq(&tsk->sigmask_lock);
145
146 /* get handle for codec */
147 ts = wm97xx_ts_get_handle(0);
148
149 /* proceed only after everybody is ready */
150 wait_event_timeout(pendown_wait, wm97xx_ts_ready(ts), HZ/4);
151
152 /* board-specific calibration */
153 wm97xx_ts_set_cal(ts,
154 mirage_ts_cal.xscale,
155 mirage_ts_cal.xtrans,
156 mirage_ts_cal.yscale,
157 mirage_ts_cal.ytrans);
158
159 /* route Wolfson pendown interrupts to our GPIO */
160 au_sync();
161 wm97xx_ts_set_ac97(ts, 0x4c, wm97xx_ts_get_ac97(ts, 0x4c) & ~0x0008);
162 au_sync();
163 wm97xx_ts_set_ac97(ts, 0x56, wm97xx_ts_get_ac97(ts, 0x56) & ~0x0008);
164 au_sync();
165 wm97xx_ts_set_ac97(ts, 0x52, wm97xx_ts_get_ac97(ts, 0x52) | 0x2008);
166 au_sync();
167
168 for (;;) {
169 interruptible_sleep_on_timeout(&pendown_wait, timeout);
170 disable_irq(PEN_DOWN_IRQ);
171 if (signal_pending(tsk)) {
172 break;
173 }
174
175 /* read codec */
176 if (!wm97xx_ts_read_data(ts, &x, &y, &z))
177 z = 0; /* treat no-data and pen-up the same */
178
179 if (signal_pending(tsk)) {
180 break;
181 }
182
183 if (z >= release_pressure) {
184 y = ~y; /* top to bottom */
185 if (pen_was_down > 1 /*&& pen_was_down < PEN_DEBOUNCE*/) {//THXXX
186 /* bounce ? */
187 x = pen_xy.x;
188 y = pen_xy.y;
189 --pen_was_down;
190 } else if (pen_was_down <= 1) {
191 pen_xy.x = x;
192 pen_xy.y = y;
193 if (pen_was_down)
194 wm97xx_ts_send_data(ts, x, y, z);
195 pen_was_down = PEN_DEBOUNCE;
196 }
197 //wm97xx_ts_send_data(ts, x, y, z);
198 timeout = HZ / SAMPLE_RATE;
199 } else {
200 if (pen_was_down) {
201 if (--pen_was_down)
202 z = release_pressure;
203 else //THXXX
204 wm97xx_ts_send_data(ts, pen_xy.x, pen_xy.y, z);
205 }
206 /* The pendown signal takes some time to settle after
207 * reading the pen pressure so wait a little
208 * before enabling the pen.
209 */
210 if (! pen_was_down) {
211// interruptible_sleep_on_timeout(&pendown_wait, HZ / PEN_UP_SETTLE);
212 timeout = HZ * PEN_UP_TIMEOUT;
213 }
214 }
215 enable_irq(PEN_DOWN_IRQ);
216 }
217 enable_irq(PEN_DOWN_IRQ);
218 ts_task = NULL;
219 complete(&ts_complete);
220 return 0;
221}
222
223static int __init ts_mirage_init(void)
224{
225 int ret;
226
227 /* pen down signal is connected to GPIO 7 */
228
229 ret = request_irq(PEN_DOWN_IRQ, pendown_irq, 0, "ts-pendown", NULL);
230 if (ret) {
231 err("unable to get pendown irq%d: [%d]", PEN_DOWN_IRQ, ret);
232 return ret;
233 }
234
235 lock_kernel();
236 ret = kernel_thread(ts_thread, NULL, CLONE_FS | CLONE_FILES);
237 if (ret < 0) {
238 unlock_kernel();
239 return ret;
240 }
241 unlock_kernel();
242
243 info("Mirage touchscreen IRQ initialized.");
244
245 return 0;
246}
247
248static void __exit ts_mirage_exit(void)
249{
250 if (ts_task) {
251 send_sig(SIGKILL, ts_task, 1);
252 wait_for_completion(&ts_complete);
253 }
254
255 free_irq(PEN_DOWN_IRQ, NULL);
256}
257
258module_init(ts_mirage_init);
259module_exit(ts_mirage_exit);
260
diff --git a/arch/mips/basler/excite/excite_device.c b/arch/mips/basler/excite/excite_device.c
index bbb4ea43da88..cc1ce77eab4a 100644
--- a/arch/mips/basler/excite/excite_device.c
+++ b/arch/mips/basler/excite/excite_device.c
@@ -68,7 +68,7 @@ enum {
68 68
69 69
70static struct resource 70static struct resource
71 excite_ctr_resource = { 71 excite_ctr_resource __attribute__((unused)) = {
72 .name = "GPI counters", 72 .name = "GPI counters",
73 .start = 0, 73 .start = 0,
74 .end = 5, 74 .end = 5,
@@ -77,7 +77,7 @@ static struct resource
77 .sibling = NULL, 77 .sibling = NULL,
78 .child = NULL 78 .child = NULL
79 }, 79 },
80 excite_gpislice_resource = { 80 excite_gpislice_resource __attribute__((unused)) = {
81 .name = "GPI slices", 81 .name = "GPI slices",
82 .start = 0, 82 .start = 0,
83 .end = 1, 83 .end = 1,
@@ -86,7 +86,7 @@ static struct resource
86 .sibling = NULL, 86 .sibling = NULL,
87 .child = NULL 87 .child = NULL
88 }, 88 },
89 excite_mdio_channel_resource = { 89 excite_mdio_channel_resource __attribute__((unused)) = {
90 .name = "MDIO channels", 90 .name = "MDIO channels",
91 .start = 0, 91 .start = 0,
92 .end = 1, 92 .end = 1,
@@ -95,7 +95,7 @@ static struct resource
95 .sibling = NULL, 95 .sibling = NULL,
96 .child = NULL 96 .child = NULL
97 }, 97 },
98 excite_fifomem_resource = { 98 excite_fifomem_resource __attribute__((unused)) = {
99 .name = "FIFO memory", 99 .name = "FIFO memory",
100 .start = 0, 100 .start = 0,
101 .end = 767, 101 .end = 767,
@@ -104,7 +104,7 @@ static struct resource
104 .sibling = NULL, 104 .sibling = NULL,
105 .child = NULL 105 .child = NULL
106 }, 106 },
107 excite_scram_resource = { 107 excite_scram_resource __attribute__((unused)) = {
108 .name = "Scratch RAM", 108 .name = "Scratch RAM",
109 .start = EXCITE_PHYS_SCRAM, 109 .start = EXCITE_PHYS_SCRAM,
110 .end = EXCITE_PHYS_SCRAM + EXCITE_SIZE_SCRAM - 1, 110 .end = EXCITE_PHYS_SCRAM + EXCITE_SIZE_SCRAM - 1,
@@ -113,7 +113,7 @@ static struct resource
113 .sibling = NULL, 113 .sibling = NULL,
114 .child = NULL 114 .child = NULL
115 }, 115 },
116 excite_fpga_resource = { 116 excite_fpga_resource __attribute__((unused)) = {
117 .name = "System FPGA", 117 .name = "System FPGA",
118 .start = EXCITE_PHYS_FPGA, 118 .start = EXCITE_PHYS_FPGA,
119 .end = EXCITE_PHYS_FPGA + EXCITE_SIZE_FPGA - 1, 119 .end = EXCITE_PHYS_FPGA + EXCITE_SIZE_FPGA - 1,
@@ -122,7 +122,7 @@ static struct resource
122 .sibling = NULL, 122 .sibling = NULL,
123 .child = NULL 123 .child = NULL
124 }, 124 },
125 excite_nand_resource = { 125 excite_nand_resource __attribute__((unused)) = {
126 .name = "NAND flash control", 126 .name = "NAND flash control",
127 .start = EXCITE_PHYS_NAND, 127 .start = EXCITE_PHYS_NAND,
128 .end = EXCITE_PHYS_NAND + EXCITE_SIZE_NAND - 1, 128 .end = EXCITE_PHYS_NAND + EXCITE_SIZE_NAND - 1,
@@ -131,7 +131,7 @@ static struct resource
131 .sibling = NULL, 131 .sibling = NULL,
132 .child = NULL 132 .child = NULL
133 }, 133 },
134 excite_titan_resource = { 134 excite_titan_resource __attribute__((unused)) = {
135 .name = "TITAN registers", 135 .name = "TITAN registers",
136 .start = EXCITE_PHYS_TITAN, 136 .start = EXCITE_PHYS_TITAN,
137 .end = EXCITE_PHYS_TITAN + EXCITE_SIZE_TITAN - 1, 137 .end = EXCITE_PHYS_TITAN + EXCITE_SIZE_TITAN - 1,
diff --git a/arch/mips/basler/excite/excite_fpga.h b/arch/mips/basler/excite/excite_fpga.h
deleted file mode 100644
index 38fcda703a0b..000000000000
--- a/arch/mips/basler/excite/excite_fpga.h
+++ /dev/null
@@ -1,80 +0,0 @@
1#ifndef EXCITE_FPGA_H_INCLUDED
2#define EXCITE_FPGA_H_INCLUDED
3
4
5/**
6 * Adress alignment of the individual FPGA bytes.
7 * The address arrangement of the individual bytes of the FPGA is two
8 * byte aligned at the embedded MK2 platform.
9 */
10#ifdef EXCITE_CCI_FPGA_MK2
11typedef unsigned char excite_cci_fpga_align_t __attribute__ ((aligned(2)));
12#else
13typedef unsigned char excite_cci_fpga_align_t;
14#endif
15
16
17/**
18 * Size of Dual Ported RAM.
19 */
20#define EXCITE_DPR_SIZE 263
21
22
23/**
24 * Size of Reserved Status Fields in Dual Ported RAM.
25 */
26#define EXCITE_DPR_STATUS_SIZE 7
27
28
29
30/**
31 * FPGA.
32 * Hardware register layout of the FPGA interface. The FPGA must accessed
33 * byte wise solely.
34 * @see EXCITE_CCI_DPR_MK2
35 */
36typedef struct excite_fpga {
37
38 /**
39 * Dual Ported RAM.
40 */
41 excite_cci_fpga_align_t dpr[EXCITE_DPR_SIZE];
42
43 /**
44 * Status.
45 */
46 excite_cci_fpga_align_t status[EXCITE_DPR_STATUS_SIZE];
47
48#ifdef EXCITE_CCI_FPGA_MK2
49 /**
50 * RM9000 Interrupt.
51 * Write access initiates interrupt at the RM9000 (MIPS) processor of the eXcite.
52 */
53 excite_cci_fpga_align_t rm9k_int;
54#else
55 /**
56 * MK2 Interrupt.
57 * Write access initiates interrupt at the ARM processor of the MK2.
58 */
59 excite_cci_fpga_align_t mk2_int;
60
61 excite_cci_fpga_align_t gap[0x1000-0x10f];
62
63 /**
64 * IRQ Source/Acknowledge.
65 */
66 excite_cci_fpga_align_t rm9k_irq_src;
67
68 /**
69 * IRQ Mask.
70 * Set bits enable the related interrupt.
71 */
72 excite_cci_fpga_align_t rm9k_irq_mask;
73#endif
74
75
76} excite_fpga;
77
78
79
80#endif /* ndef EXCITE_FPGA_H_INCLUDED */
diff --git a/arch/mips/configs/atlas_defconfig b/arch/mips/configs/atlas_defconfig
index 54274065e9a5..d3705284de39 100644
--- a/arch/mips/configs/atlas_defconfig
+++ b/arch/mips/configs/atlas_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -1193,7 +1192,7 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1193CONFIG_PROC_FS=y 1192CONFIG_PROC_FS=y
1194CONFIG_PROC_KCORE=y 1193CONFIG_PROC_KCORE=y
1195CONFIG_SYSFS=y 1194CONFIG_SYSFS=y
1196# CONFIG_TMPFS is not set 1195CONFIG_TMPFS=y
1197# CONFIG_HUGETLB_PAGE is not set 1196# CONFIG_HUGETLB_PAGE is not set
1198CONFIG_RAMFS=y 1197CONFIG_RAMFS=y
1199# CONFIG_CONFIGFS_FS is not set 1198# CONFIG_CONFIGFS_FS is not set
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index 887fd959482a..e12a475dcbf4 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig
index a01344f3a4c2..bfade9abb767 100644
--- a/arch/mips/configs/capcella_defconfig
+++ b/arch/mips/configs/capcella_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig
index c95682445a28..4baf2ff1128a 100644
--- a/arch/mips/configs/cobalt_defconfig
+++ b/arch/mips/configs/cobalt_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25CONFIG_MIPS_COBALT=y 25CONFIG_MIPS_COBALT=y
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -828,7 +827,7 @@ CONFIG_FUSE_FS=y
828CONFIG_PROC_FS=y 827CONFIG_PROC_FS=y
829CONFIG_PROC_KCORE=y 828CONFIG_PROC_KCORE=y
830CONFIG_SYSFS=y 829CONFIG_SYSFS=y
831# CONFIG_TMPFS is not set 830CONFIG_TMPFS=y
832# CONFIG_HUGETLB_PAGE is not set 831# CONFIG_HUGETLB_PAGE is not set
833CONFIG_RAMFS=y 832CONFIG_RAMFS=y
834# CONFIG_CONFIGFS_FS is not set 833# CONFIG_CONFIGFS_FS is not set
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig
index c2f33d3af62c..93cca1585bc3 100644
--- a/arch/mips/configs/db1000_defconfig
+++ b/arch/mips/configs/db1000_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS_DB1000=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig
index 8c44d16ae9a2..ffd99252a837 100644
--- a/arch/mips/configs/db1100_defconfig
+++ b/arch/mips/configs/db1100_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS_DB1100=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/db1200_defconfig b/arch/mips/configs/db1200_defconfig
index c13768e75ac5..63eac5e89b9c 100644
--- a/arch/mips/configs/db1200_defconfig
+++ b/arch/mips/configs/db1200_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS_DB1200=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig
index 8aea73fae7fb..25a095f7dc4e 100644
--- a/arch/mips/configs/db1500_defconfig
+++ b/arch/mips/configs/db1500_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS_DB1500=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig
index 90ccb7359630..dda469c842b3 100644
--- a/arch/mips/configs/db1550_defconfig
+++ b/arch/mips/configs/db1550_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS_DB1550=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig
index b598cf08f156..fcd3dd19bc74 100644
--- a/arch/mips/configs/ddb5477_defconfig
+++ b/arch/mips/configs/ddb5477_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig
index 597150b14077..8683e0df12e0 100644
--- a/arch/mips/configs/decstation_defconfig
+++ b/arch/mips/configs/decstation_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26CONFIG_MACH_DECSTATION=y 26CONFIG_MACH_DECSTATION=y
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig
index fa2996bb4b7c..4ace61c95778 100644
--- a/arch/mips/configs/e55_defconfig
+++ b/arch/mips/configs/e55_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18-rc1 3# Linux kernel version: 2.6.18-rc2
4# Thu Jul 6 10:04:02 2006 4# Tue Jul 25 23:15:03 2006
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -227,7 +226,6 @@ CONFIG_MMU=y
227# 226#
228# PCCARD (PCMCIA/CardBus) support 227# PCCARD (PCMCIA/CardBus) support
229# 228#
230# CONFIG_PCCARD is not set
231 229
232# 230#
233# PCI Hotplug Support 231# PCI Hotplug Support
@@ -254,7 +252,6 @@ CONFIG_TRAD_SIGNALS=y
254# 252#
255CONFIG_STANDALONE=y 253CONFIG_STANDALONE=y
256CONFIG_PREVENT_FIRMWARE_BUILD=y 254CONFIG_PREVENT_FIRMWARE_BUILD=y
257# CONFIG_FW_LOADER is not set
258# CONFIG_SYS_HYPERVISOR is not set 255# CONFIG_SYS_HYPERVISOR is not set
259 256
260# 257#
@@ -284,6 +281,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
284CONFIG_BLK_DEV_RAM=m 281CONFIG_BLK_DEV_RAM=m
285CONFIG_BLK_DEV_RAM_COUNT=16 282CONFIG_BLK_DEV_RAM_COUNT=16
286CONFIG_BLK_DEV_RAM_SIZE=4096 283CONFIG_BLK_DEV_RAM_SIZE=4096
284CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
287# CONFIG_BLK_DEV_INITRD is not set 285# CONFIG_BLK_DEV_INITRD is not set
288# CONFIG_CDROM_PKTCDVD is not set 286# CONFIG_CDROM_PKTCDVD is not set
289 287
@@ -643,6 +641,7 @@ CONFIG_MSDOS_PARTITION=y
643# 641#
644# Kernel hacking 642# Kernel hacking
645# 643#
644CONFIG_TRACE_IRQFLAGS_SUPPORT=y
646# CONFIG_PRINTK_TIME is not set 645# CONFIG_PRINTK_TIME is not set
647# CONFIG_MAGIC_SYSRQ is not set 646# CONFIG_MAGIC_SYSRQ is not set
648# CONFIG_UNUSED_SYMBOLS is not set 647# CONFIG_UNUSED_SYMBOLS is not set
@@ -650,7 +649,7 @@ CONFIG_MSDOS_PARTITION=y
650CONFIG_LOG_BUF_SHIFT=14 649CONFIG_LOG_BUF_SHIFT=14
651# CONFIG_DEBUG_FS is not set 650# CONFIG_DEBUG_FS is not set
652CONFIG_CROSSCOMPILE=y 651CONFIG_CROSSCOMPILE=y
653CONFIG_CMDLINE="console=ttyVR0,19200 mem=8M" 652CONFIG_CMDLINE="console=ttyVR0,19200 ide0=0x1f0,0x3f6,40 mem=8M"
654 653
655# 654#
656# Security options 655# Security options
diff --git a/arch/mips/configs/emma2rh_defconfig b/arch/mips/configs/emma2rh_defconfig
index 375b2ac24a49..5847c916c130 100644
--- a/arch/mips/configs/emma2rh_defconfig
+++ b/arch/mips/configs/emma2rh_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/ev64120_defconfig b/arch/mips/configs/ev64120_defconfig
index b0afc118bd5c..bc4c4f125c48 100644
--- a/arch/mips/configs/ev64120_defconfig
+++ b/arch/mips/configs/ev64120_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27CONFIG_MIPS_EV64120=y 27CONFIG_MIPS_EV64120=y
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/ev96100_defconfig b/arch/mips/configs/ev96100_defconfig
deleted file mode 100644
index 0bdc10f11610..000000000000
--- a/arch/mips/configs/ev96100_defconfig
+++ /dev/null
@@ -1,850 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18-rc1
4# Thu Jul 6 10:04:05 2006
5#
6CONFIG_MIPS=y
7
8#
9# Machine selection
10#
11# CONFIG_MIPS_MTX1 is not set
12# CONFIG_MIPS_BOSPORUS is not set
13# CONFIG_MIPS_PB1000 is not set
14# CONFIG_MIPS_PB1100 is not set
15# CONFIG_MIPS_PB1500 is not set
16# CONFIG_MIPS_PB1550 is not set
17# CONFIG_MIPS_PB1200 is not set
18# CONFIG_MIPS_DB1000 is not set
19# CONFIG_MIPS_DB1100 is not set
20# CONFIG_MIPS_DB1500 is not set
21# CONFIG_MIPS_DB1550 is not set
22# CONFIG_MIPS_DB1200 is not set
23# CONFIG_MIPS_MIRAGE is not set
24# CONFIG_BASLER_EXCITE is not set
25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set
28CONFIG_MIPS_EV96100=y
29# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set
32# CONFIG_LASAT is not set
33# CONFIG_MIPS_ATLAS is not set
34# CONFIG_MIPS_MALTA is not set
35# CONFIG_MIPS_SEAD is not set
36# CONFIG_WR_PPMC is not set
37# CONFIG_MIPS_SIM is not set
38# CONFIG_MOMENCO_JAGUAR_ATX is not set
39# CONFIG_MOMENCO_OCELOT is not set
40# CONFIG_MOMENCO_OCELOT_3 is not set
41# CONFIG_MOMENCO_OCELOT_C is not set
42# CONFIG_MOMENCO_OCELOT_G is not set
43# CONFIG_MIPS_XXS1500 is not set
44# CONFIG_PNX8550_V2PCI is not set
45# CONFIG_PNX8550_JBS is not set
46# CONFIG_DDB5477 is not set
47# CONFIG_MACH_VR41XX is not set
48# CONFIG_PMC_YOSEMITE is not set
49# CONFIG_QEMU is not set
50# CONFIG_MARKEINS is not set
51# CONFIG_SGI_IP22 is not set
52# CONFIG_SGI_IP27 is not set
53# CONFIG_SGI_IP32 is not set
54# CONFIG_SIBYTE_BIGSUR is not set
55# CONFIG_SIBYTE_SWARM is not set
56# CONFIG_SIBYTE_SENTOSA is not set
57# CONFIG_SIBYTE_RHONE is not set
58# CONFIG_SIBYTE_CARMEL is not set
59# CONFIG_SIBYTE_PTSWARM is not set
60# CONFIG_SIBYTE_LITTLESUR is not set
61# CONFIG_SIBYTE_CRHINE is not set
62# CONFIG_SIBYTE_CRHONE is not set
63# CONFIG_SNI_RM200_PCI is not set
64# CONFIG_TOSHIBA_JMR3927 is not set
65# CONFIG_TOSHIBA_RBTX4927 is not set
66# CONFIG_TOSHIBA_RBTX4938 is not set
67CONFIG_RWSEM_GENERIC_SPINLOCK=y
68CONFIG_GENERIC_FIND_NEXT_BIT=y
69CONFIG_GENERIC_HWEIGHT=y
70CONFIG_GENERIC_CALIBRATE_DELAY=y
71CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
72CONFIG_DMA_NONCOHERENT=y
73CONFIG_DMA_NEED_PCI_MAP_STATE=y
74CONFIG_CPU_BIG_ENDIAN=y
75# CONFIG_CPU_LITTLE_ENDIAN is not set
76CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
77CONFIG_IRQ_CPU=y
78CONFIG_MIPS_GT64120=y
79CONFIG_SWAP_IO_SPACE=y
80CONFIG_MIPS_GT96100=y
81CONFIG_MIPS_L1_CACHE_SHIFT=5
82
83#
84# CPU selection
85#
86# CONFIG_CPU_MIPS32_R1 is not set
87# CONFIG_CPU_MIPS32_R2 is not set
88# CONFIG_CPU_MIPS64_R1 is not set
89# CONFIG_CPU_MIPS64_R2 is not set
90# CONFIG_CPU_R3000 is not set
91# CONFIG_CPU_TX39XX is not set
92# CONFIG_CPU_VR41XX is not set
93# CONFIG_CPU_R4300 is not set
94# CONFIG_CPU_R4X00 is not set
95# CONFIG_CPU_TX49XX is not set
96# CONFIG_CPU_R5000 is not set
97# CONFIG_CPU_R5432 is not set
98# CONFIG_CPU_R6000 is not set
99# CONFIG_CPU_NEVADA is not set
100# CONFIG_CPU_R8000 is not set
101# CONFIG_CPU_R10000 is not set
102CONFIG_CPU_RM7000=y
103# CONFIG_CPU_RM9000 is not set
104# CONFIG_CPU_SB1 is not set
105CONFIG_SYS_HAS_CPU_R5000=y
106CONFIG_SYS_HAS_CPU_RM7000=y
107CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
108CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
109CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
110CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
111
112#
113# Kernel type
114#
115CONFIG_32BIT=y
116# CONFIG_64BIT is not set
117CONFIG_PAGE_SIZE_4KB=y
118# CONFIG_PAGE_SIZE_8KB is not set
119# CONFIG_PAGE_SIZE_16KB is not set
120# CONFIG_PAGE_SIZE_64KB is not set
121CONFIG_BOARD_SCACHE=y
122CONFIG_RM7000_CPU_SCACHE=y
123CONFIG_CPU_HAS_PREFETCH=y
124CONFIG_MIPS_MT_DISABLED=y
125# CONFIG_MIPS_MT_SMTC is not set
126# CONFIG_MIPS_MT_SMP is not set
127# CONFIG_MIPS_VPE_LOADER is not set
128# CONFIG_64BIT_PHYS_ADDR is not set
129CONFIG_CPU_HAS_LLSC=y
130CONFIG_CPU_HAS_SYNC=y
131CONFIG_GENERIC_HARDIRQS=y
132CONFIG_GENERIC_IRQ_PROBE=y
133CONFIG_CPU_SUPPORTS_HIGHMEM=y
134CONFIG_ARCH_FLATMEM_ENABLE=y
135CONFIG_SELECT_MEMORY_MODEL=y
136CONFIG_FLATMEM_MANUAL=y
137# CONFIG_DISCONTIGMEM_MANUAL is not set
138# CONFIG_SPARSEMEM_MANUAL is not set
139CONFIG_FLATMEM=y
140CONFIG_FLAT_NODE_MEM_MAP=y
141# CONFIG_SPARSEMEM_STATIC is not set
142CONFIG_SPLIT_PTLOCK_CPUS=4
143# CONFIG_RESOURCES_64BIT is not set
144# CONFIG_HZ_48 is not set
145# CONFIG_HZ_100 is not set
146# CONFIG_HZ_128 is not set
147# CONFIG_HZ_250 is not set
148# CONFIG_HZ_256 is not set
149CONFIG_HZ_1000=y
150# CONFIG_HZ_1024 is not set
151CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
152CONFIG_HZ=1000
153CONFIG_PREEMPT_NONE=y
154# CONFIG_PREEMPT_VOLUNTARY is not set
155# CONFIG_PREEMPT is not set
156CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
157
158#
159# Code maturity level options
160#
161CONFIG_EXPERIMENTAL=y
162CONFIG_BROKEN_ON_SMP=y
163CONFIG_INIT_ENV_ARG_LIMIT=32
164
165#
166# General setup
167#
168CONFIG_LOCALVERSION=""
169CONFIG_LOCALVERSION_AUTO=y
170CONFIG_SWAP=y
171CONFIG_SYSVIPC=y
172# CONFIG_POSIX_MQUEUE is not set
173# CONFIG_BSD_PROCESS_ACCT is not set
174CONFIG_SYSCTL=y
175# CONFIG_AUDIT is not set
176# CONFIG_IKCONFIG is not set
177CONFIG_RELAY=y
178CONFIG_INITRAMFS_SOURCE=""
179# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
180CONFIG_EMBEDDED=y
181CONFIG_KALLSYMS=y
182# CONFIG_KALLSYMS_EXTRA_PASS is not set
183# CONFIG_HOTPLUG is not set
184CONFIG_PRINTK=y
185CONFIG_BUG=y
186CONFIG_ELF_CORE=y
187CONFIG_BASE_FULL=y
188CONFIG_RT_MUTEXES=y
189CONFIG_FUTEX=y
190CONFIG_EPOLL=y
191CONFIG_SHMEM=y
192CONFIG_SLAB=y
193CONFIG_VM_EVENT_COUNTERS=y
194# CONFIG_TINY_SHMEM is not set
195CONFIG_BASE_SMALL=0
196# CONFIG_SLOB is not set
197
198#
199# Loadable module support
200#
201CONFIG_MODULES=y
202CONFIG_MODULE_UNLOAD=y
203# CONFIG_MODULE_FORCE_UNLOAD is not set
204CONFIG_MODVERSIONS=y
205CONFIG_MODULE_SRCVERSION_ALL=y
206# CONFIG_KMOD is not set
207
208#
209# Block layer
210#
211# CONFIG_LBD is not set
212# CONFIG_BLK_DEV_IO_TRACE is not set
213# CONFIG_LSF is not set
214
215#
216# IO Schedulers
217#
218CONFIG_IOSCHED_NOOP=y
219CONFIG_IOSCHED_AS=y
220CONFIG_IOSCHED_DEADLINE=y
221CONFIG_IOSCHED_CFQ=y
222CONFIG_DEFAULT_AS=y
223# CONFIG_DEFAULT_DEADLINE is not set
224# CONFIG_DEFAULT_CFQ is not set
225# CONFIG_DEFAULT_NOOP is not set
226CONFIG_DEFAULT_IOSCHED="anticipatory"
227
228#
229# Bus options (PCI, PCMCIA, EISA, ISA, TC)
230#
231CONFIG_HW_HAS_PCI=y
232# CONFIG_PCI is not set
233CONFIG_MMU=y
234
235#
236# PCCARD (PCMCIA/CardBus) support
237#
238# CONFIG_PCCARD is not set
239
240#
241# PCI Hotplug Support
242#
243
244#
245# Executable file formats
246#
247CONFIG_BINFMT_ELF=y
248# CONFIG_BINFMT_MISC is not set
249CONFIG_TRAD_SIGNALS=y
250
251#
252# Networking
253#
254CONFIG_NET=y
255
256#
257# Networking options
258#
259# CONFIG_NETDEBUG is not set
260# CONFIG_PACKET is not set
261CONFIG_UNIX=y
262CONFIG_XFRM=y
263CONFIG_XFRM_USER=m
264CONFIG_NET_KEY=y
265CONFIG_INET=y
266# CONFIG_IP_MULTICAST is not set
267# CONFIG_IP_ADVANCED_ROUTER is not set
268CONFIG_IP_FIB_HASH=y
269CONFIG_IP_PNP=y
270# CONFIG_IP_PNP_DHCP is not set
271CONFIG_IP_PNP_BOOTP=y
272# CONFIG_IP_PNP_RARP is not set
273# CONFIG_NET_IPIP is not set
274# CONFIG_NET_IPGRE is not set
275# CONFIG_ARPD is not set
276# CONFIG_SYN_COOKIES is not set
277# CONFIG_INET_AH is not set
278# CONFIG_INET_ESP is not set
279# CONFIG_INET_IPCOMP is not set
280# CONFIG_INET_XFRM_TUNNEL is not set
281# CONFIG_INET_TUNNEL is not set
282CONFIG_INET_XFRM_MODE_TRANSPORT=m
283CONFIG_INET_XFRM_MODE_TUNNEL=m
284CONFIG_INET_DIAG=y
285CONFIG_INET_TCP_DIAG=y
286# CONFIG_TCP_CONG_ADVANCED is not set
287CONFIG_TCP_CONG_BIC=y
288# CONFIG_IPV6 is not set
289# CONFIG_INET6_XFRM_TUNNEL is not set
290# CONFIG_INET6_TUNNEL is not set
291CONFIG_NETWORK_SECMARK=y
292# CONFIG_NETFILTER is not set
293
294#
295# DCCP Configuration (EXPERIMENTAL)
296#
297# CONFIG_IP_DCCP is not set
298
299#
300# SCTP Configuration (EXPERIMENTAL)
301#
302# CONFIG_IP_SCTP is not set
303
304#
305# TIPC Configuration (EXPERIMENTAL)
306#
307# CONFIG_TIPC is not set
308# CONFIG_ATM is not set
309# CONFIG_BRIDGE is not set
310# CONFIG_VLAN_8021Q is not set
311# CONFIG_DECNET is not set
312# CONFIG_LLC2 is not set
313# CONFIG_IPX is not set
314# CONFIG_ATALK is not set
315# CONFIG_X25 is not set
316# CONFIG_LAPB is not set
317# CONFIG_NET_DIVERT is not set
318# CONFIG_ECONET is not set
319# CONFIG_WAN_ROUTER is not set
320
321#
322# QoS and/or fair queueing
323#
324# CONFIG_NET_SCHED is not set
325
326#
327# Network testing
328#
329# CONFIG_NET_PKTGEN is not set
330# CONFIG_HAMRADIO is not set
331# CONFIG_IRDA is not set
332# CONFIG_BT is not set
333CONFIG_IEEE80211=m
334# CONFIG_IEEE80211_DEBUG is not set
335CONFIG_IEEE80211_CRYPT_WEP=m
336CONFIG_IEEE80211_CRYPT_CCMP=m
337CONFIG_IEEE80211_SOFTMAC=m
338# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
339CONFIG_WIRELESS_EXT=y
340
341#
342# Device Drivers
343#
344
345#
346# Generic Driver Options
347#
348CONFIG_STANDALONE=y
349CONFIG_PREVENT_FIRMWARE_BUILD=y
350# CONFIG_FW_LOADER is not set
351# CONFIG_SYS_HYPERVISOR is not set
352
353#
354# Connector - unified userspace <-> kernelspace linker
355#
356CONFIG_CONNECTOR=m
357
358#
359# Memory Technology Devices (MTD)
360#
361# CONFIG_MTD is not set
362
363#
364# Parallel port support
365#
366# CONFIG_PARPORT is not set
367
368#
369# Plug and Play support
370#
371
372#
373# Block devices
374#
375# CONFIG_BLK_DEV_COW_COMMON is not set
376# CONFIG_BLK_DEV_LOOP is not set
377# CONFIG_BLK_DEV_NBD is not set
378# CONFIG_BLK_DEV_RAM is not set
379# CONFIG_BLK_DEV_INITRD is not set
380CONFIG_CDROM_PKTCDVD=m
381CONFIG_CDROM_PKTCDVD_BUFFERS=8
382# CONFIG_CDROM_PKTCDVD_WCACHE is not set
383CONFIG_ATA_OVER_ETH=m
384
385#
386# ATA/ATAPI/MFM/RLL support
387#
388# CONFIG_IDE is not set
389
390#
391# SCSI device support
392#
393CONFIG_RAID_ATTRS=m
394# CONFIG_SCSI is not set
395
396#
397# Multi-device support (RAID and LVM)
398#
399# CONFIG_MD is not set
400
401#
402# Fusion MPT device support
403#
404# CONFIG_FUSION is not set
405
406#
407# IEEE 1394 (FireWire) support
408#
409
410#
411# I2O device support
412#
413
414#
415# Network device support
416#
417CONFIG_NETDEVICES=y
418# CONFIG_DUMMY is not set
419# CONFIG_BONDING is not set
420# CONFIG_EQUALIZER is not set
421# CONFIG_TUN is not set
422
423#
424# PHY device support
425#
426CONFIG_PHYLIB=m
427
428#
429# MII PHY device drivers
430#
431CONFIG_MARVELL_PHY=m
432CONFIG_DAVICOM_PHY=m
433CONFIG_QSEMI_PHY=m
434CONFIG_LXT_PHY=m
435CONFIG_CICADA_PHY=m
436CONFIG_VITESSE_PHY=m
437CONFIG_SMSC_PHY=m
438
439#
440# Ethernet (10 or 100Mbit)
441#
442CONFIG_NET_ETHERNET=y
443# CONFIG_MII is not set
444CONFIG_MIPS_GT96100ETH=y
445# CONFIG_DM9000 is not set
446
447#
448# Ethernet (1000 Mbit)
449#
450
451#
452# Ethernet (10000 Mbit)
453#
454
455#
456# Token Ring devices
457#
458
459#
460# Wireless LAN (non-hamradio)
461#
462# CONFIG_NET_RADIO is not set
463
464#
465# Wan interfaces
466#
467# CONFIG_WAN is not set
468# CONFIG_PPP is not set
469# CONFIG_SLIP is not set
470# CONFIG_SHAPER is not set
471# CONFIG_NETCONSOLE is not set
472# CONFIG_NETPOLL is not set
473# CONFIG_NET_POLL_CONTROLLER is not set
474
475#
476# ISDN subsystem
477#
478# CONFIG_ISDN is not set
479
480#
481# Telephony Support
482#
483# CONFIG_PHONE is not set
484
485#
486# Input device support
487#
488CONFIG_INPUT=y
489
490#
491# Userland interfaces
492#
493CONFIG_INPUT_MOUSEDEV=y
494CONFIG_INPUT_MOUSEDEV_PSAUX=y
495CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
496CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
497# CONFIG_INPUT_JOYDEV is not set
498# CONFIG_INPUT_TSDEV is not set
499# CONFIG_INPUT_EVDEV is not set
500# CONFIG_INPUT_EVBUG is not set
501
502#
503# Input Device Drivers
504#
505# CONFIG_INPUT_KEYBOARD is not set
506# CONFIG_INPUT_MOUSE is not set
507# CONFIG_INPUT_JOYSTICK is not set
508# CONFIG_INPUT_TOUCHSCREEN is not set
509# CONFIG_INPUT_MISC is not set
510
511#
512# Hardware I/O ports
513#
514CONFIG_SERIO=y
515# CONFIG_SERIO_I8042 is not set
516CONFIG_SERIO_SERPORT=y
517# CONFIG_SERIO_LIBPS2 is not set
518CONFIG_SERIO_RAW=m
519# CONFIG_GAMEPORT is not set
520
521#
522# Character devices
523#
524CONFIG_VT=y
525CONFIG_VT_CONSOLE=y
526CONFIG_HW_CONSOLE=y
527CONFIG_VT_HW_CONSOLE_BINDING=y
528# CONFIG_SERIAL_NONSTANDARD is not set
529
530#
531# Serial drivers
532#
533CONFIG_SERIAL_8250=y
534CONFIG_SERIAL_8250_CONSOLE=y
535CONFIG_SERIAL_8250_NR_UARTS=4
536CONFIG_SERIAL_8250_RUNTIME_UARTS=4
537# CONFIG_SERIAL_8250_EXTENDED is not set
538
539#
540# Non-8250 serial port support
541#
542CONFIG_SERIAL_CORE=y
543CONFIG_SERIAL_CORE_CONSOLE=y
544CONFIG_UNIX98_PTYS=y
545CONFIG_LEGACY_PTYS=y
546CONFIG_LEGACY_PTY_COUNT=256
547
548#
549# IPMI
550#
551# CONFIG_IPMI_HANDLER is not set
552
553#
554# Watchdog Cards
555#
556# CONFIG_WATCHDOG is not set
557# CONFIG_HW_RANDOM is not set
558# CONFIG_RTC is not set
559# CONFIG_GEN_RTC is not set
560# CONFIG_DTLK is not set
561# CONFIG_R3964 is not set
562
563#
564# Ftape, the floppy tape device driver
565#
566# CONFIG_RAW_DRIVER is not set
567
568#
569# TPM devices
570#
571# CONFIG_TCG_TPM is not set
572# CONFIG_TELCLOCK is not set
573
574#
575# I2C support
576#
577# CONFIG_I2C is not set
578
579#
580# SPI support
581#
582# CONFIG_SPI is not set
583# CONFIG_SPI_MASTER is not set
584
585#
586# Dallas's 1-wire bus
587#
588# CONFIG_W1 is not set
589
590#
591# Hardware Monitoring support
592#
593# CONFIG_HWMON is not set
594# CONFIG_HWMON_VID is not set
595
596#
597# Misc devices
598#
599
600#
601# Multimedia devices
602#
603# CONFIG_VIDEO_DEV is not set
604CONFIG_VIDEO_V4L2=y
605
606#
607# Digital Video Broadcasting Devices
608#
609# CONFIG_DVB is not set
610
611#
612# Graphics support
613#
614# CONFIG_FIRMWARE_EDID is not set
615# CONFIG_FB is not set
616
617#
618# Console display driver support
619#
620# CONFIG_VGA_CONSOLE is not set
621CONFIG_DUMMY_CONSOLE=y
622
623#
624# Sound
625#
626# CONFIG_SOUND is not set
627
628#
629# USB support
630#
631# CONFIG_USB_ARCH_HAS_HCD is not set
632# CONFIG_USB_ARCH_HAS_OHCI is not set
633# CONFIG_USB_ARCH_HAS_EHCI is not set
634
635#
636# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
637#
638
639#
640# USB Gadget Support
641#
642# CONFIG_USB_GADGET is not set
643
644#
645# MMC/SD Card support
646#
647# CONFIG_MMC is not set
648
649#
650# LED devices
651#
652# CONFIG_NEW_LEDS is not set
653
654#
655# LED drivers
656#
657
658#
659# LED Triggers
660#
661
662#
663# InfiniBand support
664#
665
666#
667# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
668#
669
670#
671# Real Time Clock
672#
673# CONFIG_RTC_CLASS is not set
674
675#
676# DMA Engine support
677#
678# CONFIG_DMA_ENGINE is not set
679
680#
681# DMA Clients
682#
683
684#
685# DMA Devices
686#
687
688#
689# File systems
690#
691CONFIG_EXT2_FS=y
692# CONFIG_EXT2_FS_XATTR is not set
693# CONFIG_EXT2_FS_XIP is not set
694# CONFIG_EXT3_FS is not set
695# CONFIG_REISERFS_FS is not set
696# CONFIG_JFS_FS is not set
697# CONFIG_FS_POSIX_ACL is not set
698# CONFIG_XFS_FS is not set
699# CONFIG_OCFS2_FS is not set
700# CONFIG_MINIX_FS is not set
701# CONFIG_ROMFS_FS is not set
702CONFIG_INOTIFY=y
703CONFIG_INOTIFY_USER=y
704# CONFIG_QUOTA is not set
705CONFIG_DNOTIFY=y
706# CONFIG_AUTOFS_FS is not set
707# CONFIG_AUTOFS4_FS is not set
708CONFIG_FUSE_FS=m
709
710#
711# CD-ROM/DVD Filesystems
712#
713# CONFIG_ISO9660_FS is not set
714# CONFIG_UDF_FS is not set
715
716#
717# DOS/FAT/NT Filesystems
718#
719# CONFIG_MSDOS_FS is not set
720# CONFIG_VFAT_FS is not set
721# CONFIG_NTFS_FS is not set
722
723#
724# Pseudo filesystems
725#
726CONFIG_PROC_FS=y
727CONFIG_PROC_KCORE=y
728CONFIG_SYSFS=y
729# CONFIG_TMPFS is not set
730# CONFIG_HUGETLB_PAGE is not set
731CONFIG_RAMFS=y
732# CONFIG_CONFIGFS_FS is not set
733
734#
735# Miscellaneous filesystems
736#
737# CONFIG_ADFS_FS is not set
738# CONFIG_AFFS_FS is not set
739# CONFIG_HFS_FS is not set
740# CONFIG_HFSPLUS_FS is not set
741# CONFIG_BEFS_FS is not set
742# CONFIG_BFS_FS is not set
743# CONFIG_EFS_FS is not set
744# CONFIG_CRAMFS is not set
745# CONFIG_VXFS_FS is not set
746# CONFIG_HPFS_FS is not set
747# CONFIG_QNX4FS_FS is not set
748# CONFIG_SYSV_FS is not set
749# CONFIG_UFS_FS is not set
750
751#
752# Network File Systems
753#
754CONFIG_NFS_FS=y
755# CONFIG_NFS_V3 is not set
756# CONFIG_NFS_V4 is not set
757# CONFIG_NFS_DIRECTIO is not set
758# CONFIG_NFSD is not set
759CONFIG_ROOT_NFS=y
760CONFIG_LOCKD=y
761CONFIG_NFS_COMMON=y
762CONFIG_SUNRPC=y
763# CONFIG_RPCSEC_GSS_KRB5 is not set
764# CONFIG_RPCSEC_GSS_SPKM3 is not set
765# CONFIG_SMB_FS is not set
766# CONFIG_CIFS is not set
767# CONFIG_CIFS_DEBUG2 is not set
768# CONFIG_NCP_FS is not set
769# CONFIG_CODA_FS is not set
770# CONFIG_AFS_FS is not set
771# CONFIG_9P_FS is not set
772
773#
774# Partition Types
775#
776# CONFIG_PARTITION_ADVANCED is not set
777CONFIG_MSDOS_PARTITION=y
778
779#
780# Native Language Support
781#
782# CONFIG_NLS is not set
783
784#
785# Profiling support
786#
787# CONFIG_PROFILING is not set
788
789#
790# Kernel hacking
791#
792# CONFIG_PRINTK_TIME is not set
793# CONFIG_MAGIC_SYSRQ is not set
794# CONFIG_UNUSED_SYMBOLS is not set
795# CONFIG_DEBUG_KERNEL is not set
796CONFIG_LOG_BUF_SHIFT=14
797# CONFIG_DEBUG_FS is not set
798CONFIG_CROSSCOMPILE=y
799CONFIG_CMDLINE=""
800
801#
802# Security options
803#
804CONFIG_KEYS=y
805CONFIG_KEYS_DEBUG_PROC_KEYS=y
806# CONFIG_SECURITY is not set
807
808#
809# Cryptographic options
810#
811CONFIG_CRYPTO=y
812CONFIG_CRYPTO_HMAC=y
813CONFIG_CRYPTO_NULL=m
814CONFIG_CRYPTO_MD4=m
815CONFIG_CRYPTO_MD5=m
816CONFIG_CRYPTO_SHA1=m
817CONFIG_CRYPTO_SHA256=m
818CONFIG_CRYPTO_SHA512=m
819CONFIG_CRYPTO_WP512=m
820CONFIG_CRYPTO_TGR192=m
821CONFIG_CRYPTO_DES=m
822CONFIG_CRYPTO_BLOWFISH=m
823CONFIG_CRYPTO_TWOFISH=m
824CONFIG_CRYPTO_SERPENT=m
825CONFIG_CRYPTO_AES=m
826CONFIG_CRYPTO_CAST5=m
827CONFIG_CRYPTO_CAST6=m
828CONFIG_CRYPTO_TEA=m
829CONFIG_CRYPTO_ARC4=m
830CONFIG_CRYPTO_KHAZAD=m
831CONFIG_CRYPTO_ANUBIS=m
832CONFIG_CRYPTO_DEFLATE=m
833CONFIG_CRYPTO_MICHAEL_MIC=m
834CONFIG_CRYPTO_CRC32C=m
835# CONFIG_CRYPTO_TEST is not set
836
837#
838# Hardware crypto devices
839#
840
841#
842# Library routines
843#
844# CONFIG_CRC_CCITT is not set
845CONFIG_CRC16=m
846CONFIG_CRC32=m
847CONFIG_LIBCRC32C=m
848CONFIG_ZLIB_INFLATE=m
849CONFIG_ZLIB_DEFLATE=m
850CONFIG_PLIST=y
diff --git a/arch/mips/configs/excite_defconfig b/arch/mips/configs/excite_defconfig
index 045ebd089893..eb87cbbfd037 100644
--- a/arch/mips/configs/excite_defconfig
+++ b/arch/mips/configs/excite_defconfig
@@ -26,7 +26,6 @@ CONFIG_BASLER_EXCITE=y
26# CONFIG_MIPS_COBALT is not set 26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set 27# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MIPS_EV64120 is not set 28# CONFIG_MIPS_EV64120 is not set
29# CONFIG_MIPS_EV96100 is not set
30# CONFIG_MIPS_IVR is not set 29# CONFIG_MIPS_IVR is not set
31# CONFIG_MIPS_ITE8172 is not set 30# CONFIG_MIPS_ITE8172 is not set
32# CONFIG_MACH_JAZZ is not set 31# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index ef16d1fb5071..cc9b24eda9e8 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -1013,7 +1012,7 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1013CONFIG_PROC_FS=y 1012CONFIG_PROC_FS=y
1014CONFIG_PROC_KCORE=y 1013CONFIG_PROC_KCORE=y
1015CONFIG_SYSFS=y 1014CONFIG_SYSFS=y
1016# CONFIG_TMPFS is not set 1015CONFIG_TMPFS=y
1017# CONFIG_HUGETLB_PAGE is not set 1016# CONFIG_HUGETLB_PAGE is not set
1018CONFIG_RAMFS=y 1017CONFIG_RAMFS=y
1019# CONFIG_CONFIGFS_FS is not set 1018# CONFIG_CONFIGFS_FS is not set
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index 4bf1ee7f5f00..50092ba8aa71 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -900,7 +899,7 @@ CONFIG_FUSE_FS=m
900CONFIG_PROC_FS=y 899CONFIG_PROC_FS=y
901CONFIG_PROC_KCORE=y 900CONFIG_PROC_KCORE=y
902CONFIG_SYSFS=y 901CONFIG_SYSFS=y
903# CONFIG_TMPFS is not set 902CONFIG_TMPFS=y
904# CONFIG_HUGETLB_PAGE is not set 903# CONFIG_HUGETLB_PAGE is not set
905CONFIG_RAMFS=y 904CONFIG_RAMFS=y
906# CONFIG_CONFIGFS_FS is not set 905# CONFIG_CONFIGFS_FS is not set
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index f83dc09c3ca9..dec2ba6ba03f 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/it8172_defconfig b/arch/mips/configs/it8172_defconfig
index a91d72a9ca86..37f9dd7187b1 100644
--- a/arch/mips/configs/it8172_defconfig
+++ b/arch/mips/configs/it8172_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30CONFIG_MIPS_ITE8172=y 29CONFIG_MIPS_ITE8172=y
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/ivr_defconfig b/arch/mips/configs/ivr_defconfig
index cebc67212d06..18874a4c24fe 100644
--- a/arch/mips/configs/ivr_defconfig
+++ b/arch/mips/configs/ivr_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29CONFIG_MIPS_IVR=y 28CONFIG_MIPS_IVR=y
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig
index 5d9eb11aba3d..9f1e3048d623 100644
--- a/arch/mips/configs/jaguar-atx_defconfig
+++ b/arch/mips/configs/jaguar-atx_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -731,7 +730,7 @@ CONFIG_FUSE_FS=m
731CONFIG_PROC_FS=y 730CONFIG_PROC_FS=y
732CONFIG_PROC_KCORE=y 731CONFIG_PROC_KCORE=y
733CONFIG_SYSFS=y 732CONFIG_SYSFS=y
734# CONFIG_TMPFS is not set 733CONFIG_TMPFS=y
735# CONFIG_HUGETLB_PAGE is not set 734# CONFIG_HUGETLB_PAGE is not set
736CONFIG_RAMFS=y 735CONFIG_RAMFS=y
737 736
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index be45a9044d06..fded3f73815f 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/lasat200_defconfig b/arch/mips/configs/lasat200_defconfig
index 64dc9f45a19c..320b8cdd6e58 100644
--- a/arch/mips/configs/lasat200_defconfig
+++ b/arch/mips/configs/lasat200_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -905,7 +904,7 @@ CONFIG_FUSE_FS=m
905CONFIG_PROC_FS=y 904CONFIG_PROC_FS=y
906CONFIG_PROC_KCORE=y 905CONFIG_PROC_KCORE=y
907CONFIG_SYSFS=y 906CONFIG_SYSFS=y
908# CONFIG_TMPFS is not set 907CONFIG_TMPFS=y
909# CONFIG_HUGETLB_PAGE is not set 908# CONFIG_HUGETLB_PAGE is not set
910CONFIG_RAMFS=y 909CONFIG_RAMFS=y
911# CONFIG_CONFIGFS_FS is not set 910# CONFIG_CONFIGFS_FS is not set
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index 2690baf15a85..0ba1ef5048fb 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -1230,7 +1229,7 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1230CONFIG_PROC_FS=y 1229CONFIG_PROC_FS=y
1231CONFIG_PROC_KCORE=y 1230CONFIG_PROC_KCORE=y
1232CONFIG_SYSFS=y 1231CONFIG_SYSFS=y
1233# CONFIG_TMPFS is not set 1232CONFIG_TMPFS=y
1234# CONFIG_HUGETLB_PAGE is not set 1233# CONFIG_HUGETLB_PAGE is not set
1235CONFIG_RAMFS=y 1234CONFIG_RAMFS=y
1236# CONFIG_CONFIGFS_FS is not set 1235# CONFIG_CONFIGFS_FS is not set
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig
index c298979c18ae..adbeeadddb8f 100644
--- a/arch/mips/configs/mipssim_defconfig
+++ b/arch/mips/configs/mipssim_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig
index 938b38ab5239..79fd544fcb2a 100644
--- a/arch/mips/configs/mpc30x_defconfig
+++ b/arch/mips/configs/mpc30x_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18-rc1 3# Linux kernel version: 2.6.18-rc2
4# Thu Jul 6 10:04:15 2006 4# Tue Jul 25 23:16:46 2006
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -71,7 +70,6 @@ CONFIG_MACH_VR41XX=y
71CONFIG_VICTOR_MPC30X=y 70CONFIG_VICTOR_MPC30X=y
72# CONFIG_ZAO_CAPCELLA is not set 71# CONFIG_ZAO_CAPCELLA is not set
73CONFIG_PCI_VR41XX=y 72CONFIG_PCI_VR41XX=y
74CONFIG_VRC4173=y
75CONFIG_RWSEM_GENERIC_SPINLOCK=y 73CONFIG_RWSEM_GENERIC_SPINLOCK=y
76CONFIG_GENERIC_FIND_NEXT_BIT=y 74CONFIG_GENERIC_FIND_NEXT_BIT=y
77CONFIG_GENERIC_HWEIGHT=y 75CONFIG_GENERIC_HWEIGHT=y
@@ -168,6 +166,7 @@ CONFIG_SWAP=y
168CONFIG_SYSVIPC=y 166CONFIG_SYSVIPC=y
169# CONFIG_POSIX_MQUEUE is not set 167# CONFIG_POSIX_MQUEUE is not set
170# CONFIG_BSD_PROCESS_ACCT is not set 168# CONFIG_BSD_PROCESS_ACCT is not set
169# CONFIG_TASKSTATS is not set
171CONFIG_SYSCTL=y 170CONFIG_SYSCTL=y
172# CONFIG_AUDIT is not set 171# CONFIG_AUDIT is not set
173# CONFIG_IKCONFIG is not set 172# CONFIG_IKCONFIG is not set
@@ -841,7 +840,7 @@ CONFIG_USB_PEGASUS=m
841# CONFIG_USB_LEGOTOWER is not set 840# CONFIG_USB_LEGOTOWER is not set
842# CONFIG_USB_LCD is not set 841# CONFIG_USB_LCD is not set
843# CONFIG_USB_LED is not set 842# CONFIG_USB_LED is not set
844# CONFIG_USB_CY7C63 is not set 843# CONFIG_USB_CYPRESS_CY7C63 is not set
845# CONFIG_USB_CYTHERM is not set 844# CONFIG_USB_CYTHERM is not set
846# CONFIG_USB_PHIDGETKIT is not set 845# CONFIG_USB_PHIDGETKIT is not set
847# CONFIG_USB_PHIDGETSERVO is not set 846# CONFIG_USB_PHIDGETSERVO is not set
@@ -982,7 +981,6 @@ CONFIG_SUNRPC=y
982# CONFIG_RPCSEC_GSS_SPKM3 is not set 981# CONFIG_RPCSEC_GSS_SPKM3 is not set
983# CONFIG_SMB_FS is not set 982# CONFIG_SMB_FS is not set
984# CONFIG_CIFS is not set 983# CONFIG_CIFS is not set
985# CONFIG_CIFS_DEBUG2 is not set
986# CONFIG_NCP_FS is not set 984# CONFIG_NCP_FS is not set
987# CONFIG_CODA_FS is not set 985# CONFIG_CODA_FS is not set
988# CONFIG_AFS_FS is not set 986# CONFIG_AFS_FS is not set
@@ -1007,6 +1005,7 @@ CONFIG_MSDOS_PARTITION=y
1007# 1005#
1008# Kernel hacking 1006# Kernel hacking
1009# 1007#
1008CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1010# CONFIG_PRINTK_TIME is not set 1009# CONFIG_PRINTK_TIME is not set
1011# CONFIG_MAGIC_SYSRQ is not set 1010# CONFIG_MAGIC_SYSRQ is not set
1012# CONFIG_UNUSED_SYMBOLS is not set 1011# CONFIG_UNUSED_SYMBOLS is not set
@@ -1014,7 +1013,7 @@ CONFIG_MSDOS_PARTITION=y
1014CONFIG_LOG_BUF_SHIFT=14 1013CONFIG_LOG_BUF_SHIFT=14
1015# CONFIG_DEBUG_FS is not set 1014# CONFIG_DEBUG_FS is not set
1016CONFIG_CROSSCOMPILE=y 1015CONFIG_CROSSCOMPILE=y
1017CONFIG_CMDLINE="mem=32M console=ttyVR0,19200" 1016CONFIG_CMDLINE="mem=32M console=ttyVR0,19200 ide0=0x170,0x376,73"
1018 1017
1019# 1018#
1020# Security options 1019# Security options
diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig
index ec5758f22676..4d87da2b99fd 100644
--- a/arch/mips/configs/ocelot_3_defconfig
+++ b/arch/mips/configs/ocelot_3_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/ocelot_c_defconfig b/arch/mips/configs/ocelot_c_defconfig
index 0d33d87de1a1..a7ac2b0a8273 100644
--- a/arch/mips/configs/ocelot_c_defconfig
+++ b/arch/mips/configs/ocelot_c_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -774,7 +773,7 @@ CONFIG_FUSE_FS=y
774CONFIG_PROC_FS=y 773CONFIG_PROC_FS=y
775CONFIG_PROC_KCORE=y 774CONFIG_PROC_KCORE=y
776CONFIG_SYSFS=y 775CONFIG_SYSFS=y
777# CONFIG_TMPFS is not set 776CONFIG_TMPFS=y
778# CONFIG_HUGETLB_PAGE is not set 777# CONFIG_HUGETLB_PAGE is not set
779CONFIG_RAMFS=y 778CONFIG_RAMFS=y
780# CONFIG_CONFIGFS_FS is not set 779# CONFIG_CONFIGFS_FS is not set
diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig
index 4b999102715e..853e7bba5122 100644
--- a/arch/mips/configs/ocelot_defconfig
+++ b/arch/mips/configs/ocelot_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -723,7 +722,7 @@ CONFIG_FUSE_FS=y
723CONFIG_PROC_FS=y 722CONFIG_PROC_FS=y
724CONFIG_PROC_KCORE=y 723CONFIG_PROC_KCORE=y
725CONFIG_SYSFS=y 724CONFIG_SYSFS=y
726# CONFIG_TMPFS is not set 725CONFIG_TMPFS=y
727# CONFIG_HUGETLB_PAGE is not set 726# CONFIG_HUGETLB_PAGE is not set
728CONFIG_RAMFS=y 727CONFIG_RAMFS=y
729# CONFIG_CONFIGFS_FS is not set 728# CONFIG_CONFIGFS_FS is not set
diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig
index 827b344f6010..8524efa23a49 100644
--- a/arch/mips/configs/ocelot_g_defconfig
+++ b/arch/mips/configs/ocelot_g_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -777,7 +776,7 @@ CONFIG_FUSE_FS=y
777CONFIG_PROC_FS=y 776CONFIG_PROC_FS=y
778CONFIG_PROC_KCORE=y 777CONFIG_PROC_KCORE=y
779CONFIG_SYSFS=y 778CONFIG_SYSFS=y
780# CONFIG_TMPFS is not set 779CONFIG_TMPFS=y
781# CONFIG_HUGETLB_PAGE is not set 780# CONFIG_HUGETLB_PAGE is not set
782CONFIG_RAMFS=y 781CONFIG_RAMFS=y
783# CONFIG_CONFIGFS_FS is not set 782# CONFIG_CONFIGFS_FS is not set
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig
index 9ed60fef69e0..1a16e92900cb 100644
--- a/arch/mips/configs/pb1100_defconfig
+++ b/arch/mips/configs/pb1100_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS_PB1100=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig
index 6774254b1be6..9ea8edea6f29 100644
--- a/arch/mips/configs/pb1500_defconfig
+++ b/arch/mips/configs/pb1500_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS_PB1500=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig
index 1afe5bf6e765..c4a158976f8f 100644
--- a/arch/mips/configs/pb1550_defconfig
+++ b/arch/mips/configs/pb1550_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS_PB1550=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550-jbs_defconfig
index ac616c82d348..1cbf270c301c 100644
--- a/arch/mips/configs/pnx8550-jbs_defconfig
+++ b/arch/mips/configs/pnx8550-jbs_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/pnx8550-v2pci_defconfig b/arch/mips/configs/pnx8550-v2pci_defconfig
index a8eb51bae3f3..bec30b15b9bd 100644
--- a/arch/mips/configs/pnx8550-v2pci_defconfig
+++ b/arch/mips/configs/pnx8550-v2pci_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/qemu_defconfig b/arch/mips/configs/qemu_defconfig
index 6a63a113b7ea..f5f799e93707 100644
--- a/arch/mips/configs/qemu_defconfig
+++ b/arch/mips/configs/qemu_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -687,7 +686,7 @@ CONFIG_FUSE_FS=y
687CONFIG_PROC_FS=y 686CONFIG_PROC_FS=y
688CONFIG_PROC_KCORE=y 687CONFIG_PROC_KCORE=y
689CONFIG_SYSFS=y 688CONFIG_SYSFS=y
690# CONFIG_TMPFS is not set 689CONFIG_TMPFS=y
691# CONFIG_HUGETLB_PAGE is not set 690# CONFIG_HUGETLB_PAGE is not set
692CONFIG_RAMFS=y 691CONFIG_RAMFS=y
693 692
diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig
index 6779f449bd2d..2f5650227ba3 100644
--- a/arch/mips/configs/rbhma4500_defconfig
+++ b/arch/mips/configs/rbhma4500_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
index b7826d3a2b77..4fee90b2b100 100644
--- a/arch/mips/configs/rm200_defconfig
+++ b/arch/mips/configs/rm200_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -1442,7 +1441,7 @@ CONFIG_NTFS_FS=m
1442CONFIG_PROC_FS=y 1441CONFIG_PROC_FS=y
1443CONFIG_PROC_KCORE=y 1442CONFIG_PROC_KCORE=y
1444CONFIG_SYSFS=y 1443CONFIG_SYSFS=y
1445# CONFIG_TMPFS is not set 1444CONFIG_TMPFS=y
1446# CONFIG_HUGETLB_PAGE is not set 1445# CONFIG_HUGETLB_PAGE is not set
1447CONFIG_RAMFS=y 1446CONFIG_RAMFS=y
1448# CONFIG_CONFIGFS_FS is not set 1447# CONFIG_CONFIGFS_FS is not set
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig
index 625c1c619b6b..9041f095f96f 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250-swarm_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/sead_defconfig b/arch/mips/configs/sead_defconfig
index 4401b602118f..02abb2f1bfaf 100644
--- a/arch/mips/configs/sead_defconfig
+++ b/arch/mips/configs/sead_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig
index 2ba4e25e8c34..ca3d0c4ba15b 100644
--- a/arch/mips/configs/tb0226_defconfig
+++ b/arch/mips/configs/tb0226_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/tb0229_defconfig b/arch/mips/configs/tb0229_defconfig
index fc8a407c1add..4e2009ace278 100644
--- a/arch/mips/configs/tb0229_defconfig
+++ b/arch/mips/configs/tb0229_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/tb0287_defconfig b/arch/mips/configs/tb0287_defconfig
index effcb63b81a3..535a813d01a9 100644
--- a/arch/mips/configs/tb0287_defconfig
+++ b/arch/mips/configs/tb0287_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig
index 4891d02ef8ca..3a3ef20b21cc 100644
--- a/arch/mips/configs/workpad_defconfig
+++ b/arch/mips/configs/workpad_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18-rc1 3# Linux kernel version: 2.6.18-rc2
4# Thu Jul 6 10:04:21 2006 4# Tue Jul 25 23:13:04 2006
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -166,6 +165,7 @@ CONFIG_SWAP=y
166CONFIG_SYSVIPC=y 165CONFIG_SYSVIPC=y
167# CONFIG_POSIX_MQUEUE is not set 166# CONFIG_POSIX_MQUEUE is not set
168# CONFIG_BSD_PROCESS_ACCT is not set 167# CONFIG_BSD_PROCESS_ACCT is not set
168# CONFIG_TASKSTATS is not set
169CONFIG_SYSCTL=y 169CONFIG_SYSCTL=y
170# CONFIG_AUDIT is not set 170# CONFIG_AUDIT is not set
171# CONFIG_IKCONFIG is not set 171# CONFIG_IKCONFIG is not set
@@ -379,6 +379,7 @@ CONFIG_CONNECTOR=m
379CONFIG_BLK_DEV_RAM=m 379CONFIG_BLK_DEV_RAM=m
380CONFIG_BLK_DEV_RAM_COUNT=16 380CONFIG_BLK_DEV_RAM_COUNT=16
381CONFIG_BLK_DEV_RAM_SIZE=4096 381CONFIG_BLK_DEV_RAM_SIZE=4096
382CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
382# CONFIG_BLK_DEV_INITRD is not set 383# CONFIG_BLK_DEV_INITRD is not set
383# CONFIG_CDROM_PKTCDVD is not set 384# CONFIG_CDROM_PKTCDVD is not set
384# CONFIG_ATA_OVER_ETH is not set 385# CONFIG_ATA_OVER_ETH is not set
@@ -855,7 +856,6 @@ CONFIG_SUNRPC=y
855# CONFIG_RPCSEC_GSS_SPKM3 is not set 856# CONFIG_RPCSEC_GSS_SPKM3 is not set
856# CONFIG_SMB_FS is not set 857# CONFIG_SMB_FS is not set
857# CONFIG_CIFS is not set 858# CONFIG_CIFS is not set
858# CONFIG_CIFS_DEBUG2 is not set
859# CONFIG_NCP_FS is not set 859# CONFIG_NCP_FS is not set
860# CONFIG_CODA_FS is not set 860# CONFIG_CODA_FS is not set
861# CONFIG_AFS_FS is not set 861# CONFIG_AFS_FS is not set
@@ -880,6 +880,7 @@ CONFIG_MSDOS_PARTITION=y
880# 880#
881# Kernel hacking 881# Kernel hacking
882# 882#
883CONFIG_TRACE_IRQFLAGS_SUPPORT=y
883# CONFIG_PRINTK_TIME is not set 884# CONFIG_PRINTK_TIME is not set
884# CONFIG_MAGIC_SYSRQ is not set 885# CONFIG_MAGIC_SYSRQ is not set
885# CONFIG_UNUSED_SYMBOLS is not set 886# CONFIG_UNUSED_SYMBOLS is not set
@@ -887,7 +888,7 @@ CONFIG_MSDOS_PARTITION=y
887CONFIG_LOG_BUF_SHIFT=14 888CONFIG_LOG_BUF_SHIFT=14
888# CONFIG_DEBUG_FS is not set 889# CONFIG_DEBUG_FS is not set
889CONFIG_CROSSCOMPILE=y 890CONFIG_CROSSCOMPILE=y
890CONFIG_CMDLINE="console=ttyVR0,19200 mem=16M" 891CONFIG_CMDLINE="console=ttyVR0,19200 ide0=0x170,0x376,49 mem=16M"
891 892
892# 893#
893# Security options 894# Security options
diff --git a/arch/mips/configs/wrppmc_defconfig b/arch/mips/configs/wrppmc_defconfig
index 3e4b16b39827..e6b1dea55842 100644
--- a/arch/mips/configs/wrppmc_defconfig
+++ b/arch/mips/configs/wrppmc_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig
index 3a68d8a25b66..06a072b77b1c 100644
--- a/arch/mips/configs/yosemite_defconfig
+++ b/arch/mips/configs/yosemite_defconfig
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
diff --git a/arch/mips/defconfig b/arch/mips/defconfig
index fff6fcc96212..cc9b24eda9e8 100644
--- a/arch/mips/defconfig
+++ b/arch/mips/defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18-rc1 3# Linux kernel version: 2.6.18-rc1
4# Thu Jul 6 09:49:33 2006 4# Thu Jul 6 10:04:10 2006
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -25,7 +25,6 @@ CONFIG_MIPS=y
25# CONFIG_MIPS_COBALT is not set 25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set 26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set 27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_EV96100 is not set
29# CONFIG_MIPS_IVR is not set 28# CONFIG_MIPS_IVR is not set
30# CONFIG_MIPS_ITE8172 is not set 29# CONFIG_MIPS_ITE8172 is not set
31# CONFIG_MACH_JAZZ is not set 30# CONFIG_MACH_JAZZ is not set
@@ -1013,7 +1012,7 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1013CONFIG_PROC_FS=y 1012CONFIG_PROC_FS=y
1014CONFIG_PROC_KCORE=y 1013CONFIG_PROC_KCORE=y
1015CONFIG_SYSFS=y 1014CONFIG_SYSFS=y
1016# CONFIG_TMPFS is not set 1015CONFIG_TMPFS=y
1017# CONFIG_HUGETLB_PAGE is not set 1016# CONFIG_HUGETLB_PAGE is not set
1018CONFIG_RAMFS=y 1017CONFIG_RAMFS=y
1019# CONFIG_CONFIGFS_FS is not set 1018# CONFIG_CONFIGFS_FS is not set
diff --git a/arch/mips/galileo-boards/ev96100/Makefile b/arch/mips/galileo-boards/ev96100/Makefile
deleted file mode 100644
index cd868ec78cbc..000000000000
--- a/arch/mips/galileo-boards/ev96100/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
1#
2# Copyright 2000 MontaVista Software Inc.
3# Author: MontaVista Software, Inc.
4# ppopov@mvista.com or source@mvista.com
5#
6# Makefile for the Galileo EV96100 board.
7#
8
9obj-y += init.o irq.o puts.o reset.o time.o setup.o
diff --git a/arch/mips/galileo-boards/ev96100/init.c b/arch/mips/galileo-boards/ev96100/init.c
deleted file mode 100644
index a01fe9b36f2c..000000000000
--- a/arch/mips/galileo-boards/ev96100/init.c
+++ /dev/null
@@ -1,173 +0,0 @@
1/*
2 * Copyright 2000 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc.
4 * ppopov@mvista.com or source@mvista.com
5 *
6 * This file was derived from Carsten Langgaard's
7 * arch/mips/mips-boards/generic/generic.c
8 *
9 * Carsten Langgaard, carstenl@mips.com
10 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
20 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
24 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * You should have received a copy of the GNU General Public License along
29 * with this program; if not, write to the Free Software Foundation, Inc.,
30 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
32#include <linux/init.h>
33#include <linux/mm.h>
34#include <linux/sched.h>
35#include <linux/bootmem.h>
36#include <linux/string.h>
37#include <linux/kernel.h>
38
39#include <asm/addrspace.h>
40#include <asm/bootinfo.h>
41#include <asm/gt64120.h>
42
43
44/* Environment variable */
45
46typedef struct {
47 char *name;
48 char *val;
49} t_env_var;
50
51int prom_argc;
52char **prom_argv, **prom_envp;
53
54int init_debug = 0;
55
56char * __init prom_getcmdline(void)
57{
58 return &(arcs_cmdline[0]);
59}
60
61unsigned long __init prom_free_prom_memory(void)
62{
63 return 0;
64}
65
66void __init prom_init_cmdline(void)
67{
68 char *cp;
69 int actr;
70
71 actr = 1; /* Always ignore argv[0] */
72
73 cp = &(arcs_cmdline[0]);
74 while(actr < prom_argc) {
75 strcpy(cp, prom_argv[actr]);
76 cp += strlen(prom_argv[actr]);
77 *cp++ = ' ';
78 actr++;
79 }
80 if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */
81 --cp;
82 *cp = '\0';
83}
84
85char *prom_getenv(char *envname)
86{
87 /*
88 * Return a pointer to the given environment variable.
89 */
90
91 t_env_var *env = (t_env_var *) prom_envp;
92 int i;
93
94 i = strlen(envname);
95
96 while (env->name) {
97 if (strncmp(envname, env->name, i) == 0) {
98 return (env->val);
99 }
100 env++;
101 }
102 return (NULL);
103}
104
105static inline unsigned char str2hexnum(unsigned char c)
106{
107 if (c >= '0' && c <= '9')
108 return c - '0';
109 if (c >= 'a' && c <= 'f')
110 return c - 'a' + 10;
111 return 0; /* foo */
112}
113
114static inline void str2eaddr(unsigned char *ea, unsigned char *str)
115{
116 int i;
117
118 for (i = 0; i < 6; i++) {
119 unsigned char num;
120
121 if ((*str == '.') || (*str == ':'))
122 str++;
123 num = str2hexnum(*str++) << 4;
124 num |= (str2hexnum(*str++));
125 ea[i] = num;
126 }
127}
128
129int get_ethernet_addr(char *ethernet_addr)
130{
131 char *ethaddr_str;
132
133 ethaddr_str = prom_getenv("ethaddr");
134 if (!ethaddr_str) {
135 printk("ethaddr not set in boot prom\n");
136 return -1;
137 }
138 str2eaddr(ethernet_addr, ethaddr_str);
139
140 if (init_debug > 1) {
141 int i;
142 printk("get_ethernet_addr: ");
143 for (i = 0; i < 5; i++)
144 printk("%02x:",
145 (unsigned char) *(ethernet_addr + i));
146 printk("%02x\n", *(ethernet_addr + i));
147 }
148
149 return 0;
150}
151
152const char *get_system_type(void)
153{
154 return "Galileo EV96100";
155}
156
157void __init prom_init(void)
158{
159 volatile unsigned char *uart;
160 char ppbuf[8];
161
162 prom_argc = fw_arg0;
163 prom_argv = (char **) fw_arg1;
164 prom_envp = (char **) fw_arg2;
165
166 mips_machgroup = MACH_GROUP_GALILEO;
167 mips_machtype = MACH_EV96100;
168
169 prom_init_cmdline();
170
171 /* 32 MB upgradable */
172 add_memory_region(0, 32 << 20, BOOT_MEM_RAM);
173}
diff --git a/arch/mips/galileo-boards/ev96100/irq.c b/arch/mips/galileo-boards/ev96100/irq.c
deleted file mode 100644
index ee5d6720f23b..000000000000
--- a/arch/mips/galileo-boards/ev96100/irq.c
+++ /dev/null
@@ -1,77 +0,0 @@
1/*
2 * Copyright 2000 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc.
4 * ppopov@mvista.com or source@mvista.com
5 *
6 * This file was derived from Carsten Langgaard's
7 * arch/mips/mips-boards/atlas/atlas_int.c.
8 *
9 * Carsten Langgaard, carstenl@mips.com
10 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
20 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
24 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * You should have received a copy of the GNU General Public License along
29 * with this program; if not, write to the Free Software Foundation, Inc.,
30 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
32#include <linux/errno.h>
33#include <linux/init.h>
34#include <linux/kernel_stat.h>
35#include <linux/irq.h>
36#include <linux/module.h>
37#include <linux/signal.h>
38#include <linux/sched.h>
39#include <linux/types.h>
40#include <linux/interrupt.h>
41#include <asm/irq_cpu.h>
42
43static inline unsigned int ffz8(unsigned int word)
44{
45 unsigned long k;
46
47 k = 7;
48 if (word & 0x0fUL) { k -= 4; word <<= 4; }
49 if (word & 0x30UL) { k -= 2; word <<= 2; }
50 if (word & 0x40UL) { k -= 1; }
51
52 return k;
53}
54
55extern void mips_timer_interrupt(struct pt_regs *regs);
56
57asmlinkage void ev96100_cpu_irq(unsigned int pending, struct pt_regs *regs)
58{
59 do_IRQ(ffz8(pending >> 8), regs);
60}
61
62asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
63{
64 unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
65
66 if (pending & CAUSEF_IP7)
67 mips_timer_interrupt(regs);
68 else if (pending)
69 ev96100_cpu_irq(pending, regs);
70 else
71 spurious_interrupt(regs);
72}
73
74void __init arch_init_irq(void)
75{
76 mips_cpu_irq_init(0);
77}
diff --git a/arch/mips/galileo-boards/ev96100/puts.c b/arch/mips/galileo-boards/ev96100/puts.c
deleted file mode 100644
index 49dc6d137b9c..000000000000
--- a/arch/mips/galileo-boards/ev96100/puts.c
+++ /dev/null
@@ -1,138 +0,0 @@
1
2/*
3 * Debug routines which directly access the uart.
4 */
5
6#include <linux/types.h>
7#include <asm/gt64120.h>
8
9
10//#define SERIAL_BASE EV96100_UART0_REGS_BASE
11#define SERIAL_BASE 0xBD000020
12#define NS16550_BASE SERIAL_BASE
13
14#define SERA_CMD 0x0D
15#define SERA_DATA 0x08
16//#define SERB_CMD 0x05
17#define SERB_CMD 20
18#define SERB_DATA 0x00
19#define TX_BUSY 0x20
20
21#define TIMEOUT 0xffff
22#undef SLOW_DOWN
23
24static const char digits[16] = "0123456789abcdef";
25static volatile unsigned char *const com1 = (unsigned char *) SERIAL_BASE;
26
27
28#ifdef SLOW_DOWN
29static inline void slow_down()
30{
31 int k;
32 for (k = 0; k < 10000; k++);
33}
34#else
35#define slow_down()
36#endif
37
38void putch(const unsigned char c)
39{
40 unsigned char ch;
41 int i = 0;
42
43 do {
44 ch = com1[SERB_CMD];
45 slow_down();
46 i++;
47 if (i > TIMEOUT) {
48 break;
49 }
50 } while (0 == (ch & TX_BUSY));
51 com1[SERB_DATA] = c;
52}
53
54void putchar(const unsigned char c)
55{
56 unsigned char ch;
57 int i = 0;
58
59 do {
60 ch = com1[SERB_CMD];
61 slow_down();
62 i++;
63 if (i > TIMEOUT) {
64 break;
65 }
66 } while (0 == (ch & TX_BUSY));
67 com1[SERB_DATA] = c;
68}
69
70void puts(unsigned char *cp)
71{
72 unsigned char ch;
73 int i = 0;
74
75 while (*cp) {
76 do {
77 ch = com1[SERB_CMD];
78 slow_down();
79 i++;
80 if (i > TIMEOUT) {
81 break;
82 }
83 } while (0 == (ch & TX_BUSY));
84 com1[SERB_DATA] = *cp++;
85 }
86 putch('\r');
87 putch('\n');
88}
89
90void fputs(unsigned char *cp)
91{
92 unsigned char ch;
93 int i = 0;
94
95 while (*cp) {
96
97 do {
98 ch = com1[SERB_CMD];
99 slow_down();
100 i++;
101 if (i > TIMEOUT) {
102 break;
103 }
104 } while (0 == (ch & TX_BUSY));
105 com1[SERB_DATA] = *cp++;
106 }
107}
108
109
110void put64(uint64_t ul)
111{
112 int cnt;
113 unsigned ch;
114
115 cnt = 16; /* 16 nibbles in a 64 bit long */
116 putch('0');
117 putch('x');
118 do {
119 cnt--;
120 ch = (unsigned char) (ul >> cnt * 4) & 0x0F;
121 putch(digits[ch]);
122 } while (cnt > 0);
123}
124
125void put32(unsigned u)
126{
127 int cnt;
128 unsigned ch;
129
130 cnt = 8; /* 8 nibbles in a 32 bit long */
131 putch('0');
132 putch('x');
133 do {
134 cnt--;
135 ch = (unsigned char) (u >> cnt * 4) & 0x0F;
136 putch(digits[ch]);
137 } while (cnt > 0);
138}
diff --git a/arch/mips/galileo-boards/ev96100/reset.c b/arch/mips/galileo-boards/ev96100/reset.c
deleted file mode 100644
index 5ef9b7f896e6..000000000000
--- a/arch/mips/galileo-boards/ev96100/reset.c
+++ /dev/null
@@ -1,70 +0,0 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * Galileo EV96100 reset routines.
4 *
5 * Copyright 2000 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
8 *
9 * This file was derived from Carsten Langgaard's
10 * arch/mips/mips-boards/generic/reset.c
11 *
12 * Carsten Langgaard, carstenl@mips.com
13 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 *
20 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
21 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
23 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
26 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
27 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * You should have received a copy of the GNU General Public License along
32 * with this program; if not, write to the Free Software Foundation, Inc.,
33 * 675 Mass Ave, Cambridge, MA 02139, USA.
34 */
35#include <linux/sched.h>
36#include <linux/mm.h>
37#include <asm/io.h>
38#include <asm/pgtable.h>
39#include <asm/processor.h>
40#include <asm/reboot.h>
41#include <asm/system.h>
42#include <asm/gt64120.h>
43
44static void mips_machine_restart(char *command);
45static void mips_machine_halt(void);
46
47static void mips_machine_restart(char *command)
48{
49 set_c0_status(ST0_BEV | ST0_ERL);
50 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
51 flush_cache_all();
52 write_c0_wired(0);
53 __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
54 while (1);
55}
56
57static void mips_machine_halt(void)
58{
59 printk(KERN_NOTICE "You can safely turn off the power\n");
60 while (1)
61 __asm__(".set\tmips3\n\t"
62 "wait\n\t"
63 ".set\tmips0");
64}
65
66void mips_reboot_setup(void)
67{
68 _machine_restart = mips_machine_restart;
69 _machine_halt = mips_machine_halt;
70}
diff --git a/arch/mips/galileo-boards/ev96100/setup.c b/arch/mips/galileo-boards/ev96100/setup.c
deleted file mode 100644
index 639ad5562c63..000000000000
--- a/arch/mips/galileo-boards/ev96100/setup.c
+++ /dev/null
@@ -1,159 +0,0 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * Galileo EV96100 setup.
4 *
5 * Copyright 2000 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
8 *
9 * This file was derived from Carsten Langgaard's
10 * arch/mips/mips-boards/atlas/atlas_setup.c.
11 *
12 * Carsten Langgaard, carstenl@mips.com
13 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 *
20 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
21 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
23 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
26 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
27 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * You should have received a copy of the GNU General Public License along
32 * with this program; if not, write to the Free Software Foundation, Inc.,
33 * 675 Mass Ave, Cambridge, MA 02139, USA.
34 */
35#include <linux/init.h>
36#include <linux/sched.h>
37#include <linux/ioport.h>
38#include <linux/string.h>
39#include <linux/ctype.h>
40#include <linux/pci.h>
41
42#include <asm/cpu.h>
43#include <asm/bootinfo.h>
44#include <asm/mipsregs.h>
45#include <asm/irq.h>
46#include <asm/delay.h>
47#include <asm/gt64120.h>
48#include <asm/galileo-boards/ev96100int.h>
49
50
51extern char *__init prom_getcmdline(void);
52
53extern void mips_reboot_setup(void);
54
55unsigned char mac_0_1[12];
56
57void __init plat_mem_setup(void)
58{
59 unsigned int config = read_c0_config();
60 unsigned int status = read_c0_status();
61 unsigned int info = read_c0_info();
62 u32 tmp;
63
64 char *argptr;
65
66 clear_c0_status(ST0_FR);
67
68 if (config & 0x8)
69 printk("Secondary cache is enabled\n");
70 else
71 printk("Secondary cache is disabled\n");
72
73 if (status & (1 << 27))
74 printk("User-mode cache ops enabled\n");
75 else
76 printk("User-mode cache ops disabled\n");
77
78 printk("CP0 info reg: %x\n", (unsigned) info);
79 if (info & (1 << 28))
80 printk("burst mode Scache RAMS\n");
81 else
82 printk("pipelined Scache RAMS\n");
83
84 if (info & 0x1)
85 printk("Atomic Enable is set\n");
86
87 argptr = prom_getcmdline();
88#ifdef CONFIG_SERIAL_CONSOLE
89 if (strstr(argptr, "console=") == NULL) {
90 argptr = prom_getcmdline();
91 strcat(argptr, " console=ttyS0,115200");
92 }
93#endif
94
95 mips_reboot_setup();
96
97 set_io_port_base(KSEG1);
98 ioport_resource.start = GT_PCI_IO_BASE;
99 ioport_resource.end = GT_PCI_IO_BASE + 0x01ffffff;
100
101#ifdef CONFIG_BLK_DEV_INITRD
102 ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
103#endif
104
105
106 /*
107 * Setup GT controller master bit so we can do config cycles
108 */
109
110 /* Clear cause register bits */
111 GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
112 GT_INTRCAUSE_TARABORT0_BIT));
113 /* Setup address */
114 GT_WRITE(GT_PCI0_CFGADDR_OFS,
115 (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
116 (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
117 ((PCI_COMMAND / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
118 GT_PCI0_CFGADDR_CONFIGEN_BIT);
119
120 udelay(2);
121 tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
122
123 tmp |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
124 PCI_COMMAND_MASTER | PCI_COMMAND_SERR);
125 GT_WRITE(GT_PCI0_CFGADDR_OFS,
126 (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
127 (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
128 ((PCI_COMMAND / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
129 GT_PCI0_CFGADDR_CONFIGEN_BIT);
130 udelay(2);
131 GT_WRITE(GT_PCI0_CFGDATA_OFS, tmp);
132
133 /* Setup address */
134 GT_WRITE(GT_PCI0_CFGADDR_OFS,
135 (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
136 (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
137 ((PCI_COMMAND / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
138 GT_PCI0_CFGADDR_CONFIGEN_BIT);
139
140 udelay(2);
141 tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
142}
143
144unsigned short get_gt_devid(void)
145{
146 u32 gt_devid;
147
148 /* Figure out if this is a gt96100 or gt96100A */
149 GT_WRITE(GT_PCI0_CFGADDR_OFS,
150 (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
151 (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
152 ((PCI_VENDOR_ID / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
153 GT_PCI0_CFGADDR_CONFIGEN_BIT);
154
155 udelay(4);
156 gt_devid = GT_READ(GT_PCI0_CFGDATA_OFS);
157
158 return gt_devid >> 16;
159}
diff --git a/arch/mips/galileo-boards/ev96100/time.c b/arch/mips/galileo-boards/ev96100/time.c
deleted file mode 100644
index 8cbe8426491a..000000000000
--- a/arch/mips/galileo-boards/ev96100/time.c
+++ /dev/null
@@ -1,88 +0,0 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * Galileo EV96100 rtc routines.
4 *
5 * Copyright 2000 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
8 *
9 * This file was derived from Carsten Langgaard's
10 * arch/mips/mips-boards/atlas/atlas_rtc.c.
11 *
12 * Carsten Langgaard, carstenl@mips.com
13 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 *
20 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
21 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
23 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
26 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
27 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * You should have received a copy of the GNU General Public License along
32 * with this program; if not, write to the Free Software Foundation, Inc.,
33 * 675 Mass Ave, Cambridge, MA 02139, USA.
34 */
35#include <linux/init.h>
36#include <linux/kernel_stat.h>
37#include <linux/module.h>
38#include <linux/sched.h>
39#include <linux/spinlock.h>
40#include <linux/timex.h>
41
42#include <asm/mipsregs.h>
43#include <asm/ptrace.h>
44#include <asm/time.h>
45
46
47#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
48
49extern volatile unsigned long wall_jiffies;
50unsigned long missed_heart_beats = 0;
51
52static unsigned long r4k_offset; /* Amount to increment compare reg each time */
53static unsigned long r4k_cur; /* What counter should be at next timer irq */
54
55static inline void ack_r4ktimer(unsigned long newval)
56{
57 write_c0_compare(newval);
58}
59
60/*
61 * There are a lot of conceptually broken versions of the MIPS timer interrupt
62 * handler floating around. This one is rather different, but the algorithm
63 * is probably more robust.
64 */
65void mips_timer_interrupt(struct pt_regs *regs)
66{
67 int irq = 7; /* FIX ME */
68
69 if (r4k_offset == 0) {
70 goto null;
71 }
72
73 do {
74 kstat_this_cpu.irqs[irq]++;
75 do_timer(regs);
76#ifndef CONFIG_SMP
77 update_process_times(user_mode(regs));
78#endif
79 r4k_cur += r4k_offset;
80 ack_r4ktimer(r4k_cur);
81
82 } while (((unsigned long)read_c0_count()
83 - r4k_cur) < 0x7fffffff);
84 return;
85
86null:
87 ack_r4ktimer(0);
88}
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index aa2caa67299a..9fbf8430c849 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -38,15 +38,40 @@ static void r3081_wait(void)
38 38
39static void r39xx_wait(void) 39static void r39xx_wait(void)
40{ 40{
41 unsigned long cfg = read_c0_conf(); 41 local_irq_disable();
42 write_c0_conf(cfg | TX39_CONF_HALT); 42 if (!need_resched())
43 write_c0_conf(read_c0_conf() | TX39_CONF_HALT);
44 local_irq_enable();
43} 45}
44 46
47/*
48 * There is a race when WAIT instruction executed with interrupt
49 * enabled.
50 * But it is implementation-dependent wheter the pipelie restarts when
51 * a non-enabled interrupt is requested.
52 */
45static void r4k_wait(void) 53static void r4k_wait(void)
46{ 54{
47 __asm__(".set\tmips3\n\t" 55 __asm__(" .set mips3 \n"
48 "wait\n\t" 56 " wait \n"
49 ".set\tmips0"); 57 " .set mips0 \n");
58}
59
60/*
61 * This variant is preferable as it allows testing need_resched and going to
62 * sleep depending on the outcome atomically. Unfortunately the "It is
63 * implementation-dependent whether the pipeline restarts when a non-enabled
64 * interrupt is requested" restriction in the MIPS32/MIPS64 architecture makes
65 * using this version a gamble.
66 */
67static void r4k_wait_irqoff(void)
68{
69 local_irq_disable();
70 if (!need_resched())
71 __asm__(" .set mips3 \n"
72 " wait \n"
73 " .set mips0 \n");
74 local_irq_enable();
50} 75}
51 76
52/* The Au1xxx wait is available only if using 32khz counter or 77/* The Au1xxx wait is available only if using 32khz counter or
@@ -56,17 +81,17 @@ int allow_au1k_wait;
56static void au1k_wait(void) 81static void au1k_wait(void)
57{ 82{
58 /* using the wait instruction makes CP0 counter unusable */ 83 /* using the wait instruction makes CP0 counter unusable */
59 __asm__(".set mips3\n\t" 84 __asm__(" .set mips3 \n"
60 "cache 0x14, 0(%0)\n\t" 85 " cache 0x14, 0(%0) \n"
61 "cache 0x14, 32(%0)\n\t" 86 " cache 0x14, 32(%0) \n"
62 "sync\n\t" 87 " sync \n"
63 "nop\n\t" 88 " nop \n"
64 "wait\n\t" 89 " wait \n"
65 "nop\n\t" 90 " nop \n"
66 "nop\n\t" 91 " nop \n"
67 "nop\n\t" 92 " nop \n"
68 "nop\n\t" 93 " nop \n"
69 ".set mips0\n\t" 94 " .set mips0 \n"
70 : : "r" (au1k_wait)); 95 : : "r" (au1k_wait));
71} 96}
72 97
@@ -111,7 +136,6 @@ static inline void check_wait(void)
111 case CPU_NEVADA: 136 case CPU_NEVADA:
112 case CPU_RM7000: 137 case CPU_RM7000:
113 case CPU_RM9000: 138 case CPU_RM9000:
114 case CPU_TX49XX:
115 case CPU_4KC: 139 case CPU_4KC:
116 case CPU_4KEC: 140 case CPU_4KEC:
117 case CPU_4KSC: 141 case CPU_4KSC:
@@ -125,6 +149,10 @@ static inline void check_wait(void)
125 cpu_wait = r4k_wait; 149 cpu_wait = r4k_wait;
126 printk(" available.\n"); 150 printk(" available.\n");
127 break; 151 break;
152 case CPU_TX49XX:
153 cpu_wait = r4k_wait_irqoff;
154 printk(" available.\n");
155 break;
128 case CPU_AU1000: 156 case CPU_AU1000:
129 case CPU_AU1100: 157 case CPU_AU1100:
130 case CPU_AU1500: 158 case CPU_AU1500:
diff --git a/arch/mips/kernel/irixsig.c b/arch/mips/kernel/irixsig.c
index 676e868d26fb..2132485caa74 100644
--- a/arch/mips/kernel/irixsig.c
+++ b/arch/mips/kernel/irixsig.c
@@ -17,6 +17,7 @@
17 17
18#include <asm/ptrace.h> 18#include <asm/ptrace.h>
19#include <asm/uaccess.h> 19#include <asm/uaccess.h>
20#include <asm/unistd.h>
20 21
21#undef DEBUG_SIG 22#undef DEBUG_SIG
22 23
@@ -172,11 +173,12 @@ static inline int handle_signal(unsigned long sig, siginfo_t *info,
172 return ret; 173 return ret;
173} 174}
174 175
175asmlinkage int do_irix_signal(sigset_t *oldset, struct pt_regs *regs) 176void do_irix_signal(struct pt_regs *regs)
176{ 177{
177 struct k_sigaction ka; 178 struct k_sigaction ka;
178 siginfo_t info; 179 siginfo_t info;
179 int signr; 180 int signr;
181 sigset_t *oldset;
180 182
181 /* 183 /*
182 * We want the common case to go fast, which is why we may in certain 184 * We want the common case to go fast, which is why we may in certain
@@ -184,19 +186,28 @@ asmlinkage int do_irix_signal(sigset_t *oldset, struct pt_regs *regs)
184 * if so. 186 * if so.
185 */ 187 */
186 if (!user_mode(regs)) 188 if (!user_mode(regs))
187 return 1; 189 return;
188 190
189 if (try_to_freeze()) 191 if (test_thread_flag(TIF_RESTORE_SIGMASK))
190 goto no_signal; 192 oldset = &current->saved_sigmask;
191 193 else
192 if (!oldset)
193 oldset = &current->blocked; 194 oldset = &current->blocked;
194 195
195 signr = get_signal_to_deliver(&info, &ka, regs, NULL); 196 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
196 if (signr > 0) 197 if (signr > 0) {
197 return handle_signal(signr, &info, &ka, oldset, regs); 198 /* Whee! Actually deliver the signal. */
199 if (handle_signal(signr, &info, &ka, oldset, regs) == 0) {
200 /* a signal was successfully delivered; the saved
201 * sigmask will have been stored in the signal frame,
202 * and will be restored by sigreturn, so we can simply
203 * clear the TIF_RESTORE_SIGMASK flag */
204 if (test_thread_flag(TIF_RESTORE_SIGMASK))
205 clear_thread_flag(TIF_RESTORE_SIGMASK);
206 }
207
208 return;
209 }
198 210
199no_signal:
200 /* 211 /*
201 * Who's code doesn't conform to the restartable syscall convention 212 * Who's code doesn't conform to the restartable syscall convention
202 * dies here!!! The li instruction, a single machine instruction, 213 * dies here!!! The li instruction, a single machine instruction,
@@ -208,8 +219,22 @@ no_signal:
208 regs->regs[2] == ERESTARTNOINTR) { 219 regs->regs[2] == ERESTARTNOINTR) {
209 regs->cp0_epc -= 8; 220 regs->cp0_epc -= 8;
210 } 221 }
222 if (regs->regs[2] == ERESTART_RESTARTBLOCK) {
223 regs->regs[2] = __NR_restart_syscall;
224 regs->regs[7] = regs->regs[26];
225 regs->cp0_epc -= 4;
226 }
227 regs->regs[0] = 0; /* Don't deal with this again. */
228 }
229
230 /*
231 * If there's no signal to deliver, we just put the saved sigmask
232 * back
233 */
234 if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
235 clear_thread_flag(TIF_RESTORE_SIGMASK);
236 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
211 } 237 }
212 return 0;
213} 238}
214 239
215asmlinkage void 240asmlinkage void
@@ -298,6 +323,9 @@ struct sigact_irix5 {
298 int _unused0[2]; 323 int _unused0[2];
299}; 324};
300 325
326#define SIG_SETMASK32 256 /* Goodie from SGI for BSD compatibility:
327 set only the low 32 bit of the sigset. */
328
301#ifdef DEBUG_SIG 329#ifdef DEBUG_SIG
302static inline void dump_sigact_irix5(struct sigact_irix5 *p) 330static inline void dump_sigact_irix5(struct sigact_irix5 *p)
303{ 331{
@@ -413,7 +441,7 @@ asmlinkage int irix_sigprocmask(int how, irix_sigset_t __user *new,
413 441
414asmlinkage int irix_sigsuspend(struct pt_regs *regs) 442asmlinkage int irix_sigsuspend(struct pt_regs *regs)
415{ 443{
416 sigset_t saveset, newset; 444 sigset_t newset;
417 sigset_t __user *uset; 445 sigset_t __user *uset;
418 446
419 uset = (sigset_t __user *) regs->regs[4]; 447 uset = (sigset_t __user *) regs->regs[4];
@@ -422,18 +450,15 @@ asmlinkage int irix_sigsuspend(struct pt_regs *regs)
422 sigdelsetmask(&newset, ~_BLOCKABLE); 450 sigdelsetmask(&newset, ~_BLOCKABLE);
423 451
424 spin_lock_irq(&current->sighand->siglock); 452 spin_lock_irq(&current->sighand->siglock);
425 saveset = current->blocked; 453 current->saved_sigmask = current->blocked;
426 current->blocked = newset; 454 current->blocked = newset;
427 recalc_sigpending(); 455 recalc_sigpending();
428 spin_unlock_irq(&current->sighand->siglock); 456 spin_unlock_irq(&current->sighand->siglock);
429 457
430 regs->regs[2] = -EINTR; 458 current->state = TASK_INTERRUPTIBLE;
431 while (1) { 459 schedule();
432 current->state = TASK_INTERRUPTIBLE; 460 set_thread_flag(TIF_RESTORE_SIGMASK);
433 schedule(); 461 return -ERESTARTNOHAND;
434 if (do_irix_signal(&saveset, regs))
435 return -EINTR;
436 }
437} 462}
438 463
439/* hate hate hate... */ 464/* hate hate hate... */
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 450ac592da57..43b1162d714f 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -991,7 +991,7 @@ struct sysctl_args32
991 unsigned int __unused[4]; 991 unsigned int __unused[4];
992}; 992};
993 993
994#ifdef CONFIG_SYSCTL 994#ifdef CONFIG_SYSCTL_SYSCALL
995 995
996asmlinkage long sys32_sysctl(struct sysctl_args32 __user *args) 996asmlinkage long sys32_sysctl(struct sysctl_args32 __user *args)
997{ 997{
@@ -1032,7 +1032,7 @@ asmlinkage long sys32_sysctl(struct sysctl_args32 __user *args)
1032 return error; 1032 return error;
1033} 1033}
1034 1034
1035#endif /* CONFIG_SYSCTL */ 1035#endif /* CONFIG_SYSCTL_SYSCALL */
1036 1036
1037asmlinkage long sys32_newuname(struct new_utsname __user * name) 1037asmlinkage long sys32_newuname(struct new_utsname __user * name)
1038{ 1038{
@@ -1296,9 +1296,3 @@ _sys32_clone(nabi_no_regargs struct pt_regs regs)
1296 return do_fork(clone_flags, newsp, &regs, 0, 1296 return do_fork(clone_flags, newsp, &regs, 0,
1297 parent_tidptr, child_tidptr); 1297 parent_tidptr, child_tidptr);
1298} 1298}
1299
1300extern asmlinkage void sys_set_thread_area(u32 addr);
1301asmlinkage void sys32_set_thread_area(u32 addr)
1302{
1303 sys_set_thread_area(AA(addr));
1304}
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 7ab67f786bfe..2613a0dd4b82 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -273,104 +273,107 @@ long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
273 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL, NULL); 273 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
274} 274}
275 275
276static struct mips_frame_info { 276/*
277 void *func; 277 *
278 unsigned long func_size; 278 */
279 int frame_size; 279struct mips_frame_info {
280 int pc_offset; 280 void *func;
281} *schedule_frame, mfinfo[64]; 281 unsigned long func_size;
282static int mfinfo_num; 282 int frame_size;
283 283 int pc_offset;
284static int __init get_frame_info(struct mips_frame_info *info) 284};
285
286static inline int is_ra_save_ins(union mips_instruction *ip)
285{ 287{
286 int i; 288 /* sw / sd $ra, offset($sp) */
287 void *func = info->func; 289 return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
288 union mips_instruction *ip = (union mips_instruction *)func; 290 ip->i_format.rs == 29 &&
291 ip->i_format.rt == 31;
292}
293
294static inline int is_jal_jalr_jr_ins(union mips_instruction *ip)
295{
296 if (ip->j_format.opcode == jal_op)
297 return 1;
298 if (ip->r_format.opcode != spec_op)
299 return 0;
300 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
301}
302
303static inline int is_sp_move_ins(union mips_instruction *ip)
304{
305 /* addiu/daddiu sp,sp,-imm */
306 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
307 return 0;
308 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
309 return 1;
310 return 0;
311}
312
313static int get_frame_info(struct mips_frame_info *info)
314{
315 union mips_instruction *ip = info->func;
316 unsigned max_insns = info->func_size / sizeof(union mips_instruction);
317 unsigned i;
318
289 info->pc_offset = -1; 319 info->pc_offset = -1;
290 info->frame_size = 0; 320 info->frame_size = 0;
291 for (i = 0; i < 128; i++, ip++) {
292 /* if jal, jalr, jr, stop. */
293 if (ip->j_format.opcode == jal_op ||
294 (ip->r_format.opcode == spec_op &&
295 (ip->r_format.func == jalr_op ||
296 ip->r_format.func == jr_op)))
297 break;
298 321
299 if (info->func_size && i >= info->func_size / 4) 322 if (!ip)
323 goto err;
324
325 if (max_insns == 0)
326 max_insns = 128U; /* unknown function size */
327 max_insns = min(128U, max_insns);
328
329 for (i = 0; i < max_insns; i++, ip++) {
330
331 if (is_jal_jalr_jr_ins(ip))
300 break; 332 break;
301 if ( 333 if (!info->frame_size) {
302#ifdef CONFIG_32BIT 334 if (is_sp_move_ins(ip))
303 ip->i_format.opcode == addiu_op && 335 info->frame_size = - ip->i_format.simmediate;
304#endif 336 continue;
305#ifdef CONFIG_64BIT
306 ip->i_format.opcode == daddiu_op &&
307#endif
308 ip->i_format.rs == 29 &&
309 ip->i_format.rt == 29) {
310 /* addiu/daddiu sp,sp,-imm */
311 if (info->frame_size)
312 continue;
313 info->frame_size = - ip->i_format.simmediate;
314 } 337 }
315 338 if (info->pc_offset == -1 && is_ra_save_ins(ip)) {
316 if (
317#ifdef CONFIG_32BIT
318 ip->i_format.opcode == sw_op &&
319#endif
320#ifdef CONFIG_64BIT
321 ip->i_format.opcode == sd_op &&
322#endif
323 ip->i_format.rs == 29 &&
324 ip->i_format.rt == 31) {
325 /* sw / sd $ra, offset($sp) */
326 if (info->pc_offset != -1)
327 continue;
328 info->pc_offset = 339 info->pc_offset =
329 ip->i_format.simmediate / sizeof(long); 340 ip->i_format.simmediate / sizeof(long);
341 break;
330 } 342 }
331 } 343 }
332 if (info->pc_offset == -1 || info->frame_size == 0) { 344 if (info->frame_size && info->pc_offset >= 0) /* nested */
333 if (func == schedule) 345 return 0;
334 printk("Can't analyze prologue code at %p\n", func); 346 if (info->pc_offset < 0) /* leaf */
335 info->pc_offset = -1; 347 return 1;
336 info->frame_size = 0; 348 /* prologue seems boggus... */
337 } 349err:
338 350 return -1;
339 return 0;
340} 351}
341 352
353static struct mips_frame_info schedule_mfi __read_mostly;
354
342static int __init frame_info_init(void) 355static int __init frame_info_init(void)
343{ 356{
344 int i; 357 unsigned long size = 0;
345#ifdef CONFIG_KALLSYMS 358#ifdef CONFIG_KALLSYMS
359 unsigned long ofs;
346 char *modname; 360 char *modname;
347 char namebuf[KSYM_NAME_LEN + 1]; 361 char namebuf[KSYM_NAME_LEN + 1];
348 unsigned long start, size, ofs; 362
349 extern char __sched_text_start[], __sched_text_end[]; 363 kallsyms_lookup((unsigned long)schedule, &size, &ofs, &modname, namebuf);
350 extern char __lock_text_start[], __lock_text_end[];
351
352 start = (unsigned long)__sched_text_start;
353 for (i = 0; i < ARRAY_SIZE(mfinfo); i++) {
354 if (start == (unsigned long)schedule)
355 schedule_frame = &mfinfo[i];
356 if (!kallsyms_lookup(start, &size, &ofs, &modname, namebuf))
357 break;
358 mfinfo[i].func = (void *)(start + ofs);
359 mfinfo[i].func_size = size;
360 start += size - ofs;
361 if (start >= (unsigned long)__lock_text_end)
362 break;
363 if (start == (unsigned long)__sched_text_end)
364 start = (unsigned long)__lock_text_start;
365 }
366#else
367 mfinfo[0].func = schedule;
368 schedule_frame = &mfinfo[0];
369#endif 364#endif
370 for (i = 0; i < ARRAY_SIZE(mfinfo) && mfinfo[i].func; i++) 365 schedule_mfi.func = schedule;
371 get_frame_info(&mfinfo[i]); 366 schedule_mfi.func_size = size;
367
368 get_frame_info(&schedule_mfi);
369
370 /*
371 * Without schedule() frame info, result given by
372 * thread_saved_pc() and get_wchan() are not reliable.
373 */
374 if (schedule_mfi.pc_offset < 0)
375 printk("Can't analyze schedule() prologue at %p\n", schedule);
372 376
373 mfinfo_num = i;
374 return 0; 377 return 0;
375} 378}
376 379
@@ -386,54 +389,86 @@ unsigned long thread_saved_pc(struct task_struct *tsk)
386 /* New born processes are a special case */ 389 /* New born processes are a special case */
387 if (t->reg31 == (unsigned long) ret_from_fork) 390 if (t->reg31 == (unsigned long) ret_from_fork)
388 return t->reg31; 391 return t->reg31;
389 392 if (schedule_mfi.pc_offset < 0)
390 if (!schedule_frame || schedule_frame->pc_offset < 0)
391 return 0; 393 return 0;
392 return ((unsigned long *)t->reg29)[schedule_frame->pc_offset]; 394 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
393} 395}
394 396
395/* get_wchan - a maintenance nightmare^W^Wpain in the ass ... */ 397
396unsigned long get_wchan(struct task_struct *p) 398#ifdef CONFIG_KALLSYMS
399/* used by show_backtrace() */
400unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
401 unsigned long pc, unsigned long ra)
397{ 402{
398 unsigned long stack_page; 403 unsigned long stack_page;
399 unsigned long pc; 404 struct mips_frame_info info;
400#ifdef CONFIG_KALLSYMS 405 char *modname;
401 unsigned long frame; 406 char namebuf[KSYM_NAME_LEN + 1];
402#endif 407 unsigned long size, ofs;
408 int leaf;
403 409
404 if (!p || p == current || p->state == TASK_RUNNING) 410 stack_page = (unsigned long)task_stack_page(task);
411 if (!stack_page)
405 return 0; 412 return 0;
406 413
407 stack_page = (unsigned long)task_stack_page(p); 414 if (!kallsyms_lookup(pc, &size, &ofs, &modname, namebuf))
408 if (!stack_page || !mfinfo_num) 415 return 0;
416 /*
417 * Return ra if an exception occured at the first instruction
418 */
419 if (unlikely(ofs == 0))
420 return ra;
421
422 info.func = (void *)(pc - ofs);
423 info.func_size = ofs; /* analyze from start to ofs */
424 leaf = get_frame_info(&info);
425 if (leaf < 0)
426 return 0;
427
428 if (*sp < stack_page ||
429 *sp + info.frame_size > stack_page + THREAD_SIZE - 32)
409 return 0; 430 return 0;
410 431
411 pc = thread_saved_pc(p); 432 if (leaf)
433 /*
434 * For some extreme cases, get_frame_info() can
435 * consider wrongly a nested function as a leaf
436 * one. In that cases avoid to return always the
437 * same value.
438 */
439 pc = pc != ra ? ra : 0;
440 else
441 pc = ((unsigned long *)(*sp))[info.pc_offset];
442
443 *sp += info.frame_size;
444 return __kernel_text_address(pc) ? pc : 0;
445}
446#endif
447
448/*
449 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
450 */
451unsigned long get_wchan(struct task_struct *task)
452{
453 unsigned long pc = 0;
412#ifdef CONFIG_KALLSYMS 454#ifdef CONFIG_KALLSYMS
413 if (!in_sched_functions(pc)) 455 unsigned long sp;
414 return pc; 456#endif
415 457
416 frame = p->thread.reg29 + schedule_frame->frame_size; 458 if (!task || task == current || task->state == TASK_RUNNING)
417 do { 459 goto out;
418 int i; 460 if (!task_stack_page(task))
461 goto out;
419 462
420 if (frame < stack_page || frame > stack_page + THREAD_SIZE - 32) 463 pc = thread_saved_pc(task);
421 return 0;
422 464
423 for (i = mfinfo_num - 1; i >= 0; i--) { 465#ifdef CONFIG_KALLSYMS
424 if (pc >= (unsigned long) mfinfo[i].func) 466 sp = task->thread.reg29 + schedule_mfi.frame_size;
425 break;
426 }
427 if (i < 0)
428 break;
429 467
430 pc = ((unsigned long *)frame)[mfinfo[i].pc_offset]; 468 while (in_sched_functions(pc))
431 if (!mfinfo[i].frame_size) 469 pc = unwind_stack(task, &sp, pc, 0);
432 break;
433 frame += mfinfo[i].frame_size;
434 } while (in_sched_functions(pc));
435#endif 470#endif
436 471
472out:
437 return pc; 473 return pc;
438} 474}
439
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index ba1bcd83c7d3..e71785102206 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -662,6 +662,8 @@ einval: li v0, -EINVAL
662 sys sys_tee 4 662 sys sys_tee 4
663 sys sys_vmsplice 4 663 sys sys_vmsplice 4
664 sys sys_move_pages 6 664 sys sys_move_pages 6
665 sys sys_set_robust_list 2
666 sys sys_get_robust_list 3
665 .endm 667 .endm
666 668
667 /* We pre-compute the number of _instruction_ bytes needed to 669 /* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 939e172db953..4c22d0b4825d 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -466,3 +466,5 @@ sys_call_table:
466 PTR sys_tee /* 5265 */ 466 PTR sys_tee /* 5265 */
467 PTR sys_vmsplice 467 PTR sys_vmsplice
468 PTR sys_move_pages 468 PTR sys_move_pages
469 PTR sys_set_robust_list
470 PTR sys_get_robust_list
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 98abbc5a9f13..f25c2a2f1038 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -247,7 +247,7 @@ EXPORT(sysn32_call_table)
247 PTR sys_capset 247 PTR sys_capset
248 PTR sys32_rt_sigpending /* 6125 */ 248 PTR sys32_rt_sigpending /* 6125 */
249 PTR compat_sys_rt_sigtimedwait 249 PTR compat_sys_rt_sigtimedwait
250 PTR sys_rt_sigqueueinfo 250 PTR sys32_rt_sigqueueinfo
251 PTR sysn32_rt_sigsuspend 251 PTR sysn32_rt_sigsuspend
252 PTR sys32_sigaltstack 252 PTR sys32_sigaltstack
253 PTR compat_sys_utime /* 6130 */ 253 PTR compat_sys_utime /* 6130 */
@@ -390,5 +390,7 @@ EXPORT(sysn32_call_table)
390 PTR sys_splice 390 PTR sys_splice
391 PTR sys_sync_file_range 391 PTR sys_sync_file_range
392 PTR sys_tee 392 PTR sys_tee
393 PTR sys_vmsplice /* 6271 */ 393 PTR sys_vmsplice /* 6270 */
394 PTR sys_move_pages 394 PTR sys_move_pages
395 PTR compat_sys_set_robust_list
396 PTR compat_sys_get_robust_list
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 505c9ee54009..288ee4ac4dbb 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -498,7 +498,7 @@ sys_call_table:
498 PTR sys_mknodat /* 4290 */ 498 PTR sys_mknodat /* 4290 */
499 PTR sys_fchownat 499 PTR sys_fchownat
500 PTR compat_sys_futimesat 500 PTR compat_sys_futimesat
501 PTR compat_sys_newfstatat 501 PTR sys_newfstatat
502 PTR sys_unlinkat 502 PTR sys_unlinkat
503 PTR sys_renameat /* 4295 */ 503 PTR sys_renameat /* 4295 */
504 PTR sys_linkat 504 PTR sys_linkat
@@ -514,4 +514,6 @@ sys_call_table:
514 PTR sys_tee 514 PTR sys_tee
515 PTR sys_vmsplice 515 PTR sys_vmsplice
516 PTR compat_sys_move_pages 516 PTR compat_sys_move_pages
517 PTR compat_sys_set_robust_list
518 PTR compat_sys_get_robust_list /* 4310 */
517 .size sys_call_table,.-sys_call_table 519 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 8c2b596a136f..fdbb508661c5 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -10,29 +10,15 @@
10 * Copyright (C) 1999 Silicon Graphics, Inc. 10 * Copyright (C) 1999 Silicon Graphics, Inc.
11 * Copyright (C) 2000 2001, 2002 Maciej W. Rozycki 11 * Copyright (C) 2000 2001, 2002 Maciej W. Rozycki
12 */ 12 */
13#include <linux/errno.h>
14#include <linux/init.h> 13#include <linux/init.h>
15#include <linux/ioport.h> 14#include <linux/ioport.h>
16#include <linux/sched.h>
17#include <linux/kernel.h>
18#include <linux/mm.h>
19#include <linux/module.h> 15#include <linux/module.h>
20#include <linux/stddef.h>
21#include <linux/string.h>
22#include <linux/unistd.h>
23#include <linux/slab.h>
24#include <linux/user.h>
25#include <linux/utsname.h>
26#include <linux/a.out.h>
27#include <linux/screen_info.h> 16#include <linux/screen_info.h>
28#include <linux/bootmem.h> 17#include <linux/bootmem.h>
29#include <linux/initrd.h> 18#include <linux/initrd.h>
30#include <linux/major.h>
31#include <linux/kdev_t.h>
32#include <linux/root_dev.h> 19#include <linux/root_dev.h>
33#include <linux/highmem.h> 20#include <linux/highmem.h>
34#include <linux/console.h> 21#include <linux/console.h>
35#include <linux/mmzone.h>
36#include <linux/pfn.h> 22#include <linux/pfn.h>
37 23
38#include <asm/addrspace.h> 24#include <asm/addrspace.h>
@@ -96,6 +82,12 @@ void __init add_memory_region(phys_t start, phys_t size, long type)
96 int x = boot_mem_map.nr_map; 82 int x = boot_mem_map.nr_map;
97 struct boot_mem_map_entry *prev = boot_mem_map.map + x - 1; 83 struct boot_mem_map_entry *prev = boot_mem_map.map + x - 1;
98 84
85 /* Sanity check */
86 if (start + size < start) {
87 printk("Trying to add an invalid memory region, skipped\n");
88 return;
89 }
90
99 /* 91 /*
100 * Try to merge with previous entry if any. This is far less than 92 * Try to merge with previous entry if any. This is far less than
101 * perfect but is sufficient for most real world cases. 93 * perfect but is sufficient for most real world cases.
@@ -143,167 +135,132 @@ static void __init print_memory_map(void)
143 } 135 }
144} 136}
145 137
146static inline void parse_cmdline_early(void) 138/*
139 * Manage initrd
140 */
141#ifdef CONFIG_BLK_DEV_INITRD
142
143static int __init rd_start_early(char *p)
147{ 144{
148 char c = ' ', *to = command_line, *from = saved_command_line; 145 unsigned long start = memparse(p, &p);
149 unsigned long start_at, mem_size;
150 int len = 0;
151 int usermem = 0;
152 146
153 printk("Determined physical RAM map:\n"); 147#ifdef CONFIG_64BIT
154 print_memory_map(); 148 /* HACK: Guess if the sign extension was forgotten */
149 if (start > 0x0000000080000000 && start < 0x00000000ffffffff)
150 start |= 0xffffffff00000000UL;
151#endif
152 initrd_start = start;
153 initrd_end += start;
155 154
156 for (;;) { 155 return 0;
157 /* 156}
158 * "mem=XXX[kKmM]" defines a memory region from 157early_param("rd_start", rd_start_early);
159 * 0 to <XXX>, overriding the determined size.
160 * "mem=XXX[KkmM]@YYY[KkmM]" defines a memory region from
161 * <YYY> to <YYY>+<XXX>, overriding the determined size.
162 */
163 if (c == ' ' && !memcmp(from, "mem=", 4)) {
164 if (to != command_line)
165 to--;
166 /*
167 * If a user specifies memory size, we
168 * blow away any automatically generated
169 * size.
170 */
171 if (usermem == 0) {
172 boot_mem_map.nr_map = 0;
173 usermem = 1;
174 }
175 mem_size = memparse(from + 4, &from);
176 if (*from == '@')
177 start_at = memparse(from + 1, &from);
178 else
179 start_at = 0;
180 add_memory_region(start_at, mem_size, BOOT_MEM_RAM);
181 }
182 c = *(from++);
183 if (!c)
184 break;
185 if (CL_SIZE <= ++len)
186 break;
187 *(to++) = c;
188 }
189 *to = '\0';
190 158
191 if (usermem) { 159static int __init rd_size_early(char *p)
192 printk("User-defined physical RAM map:\n"); 160{
193 print_memory_map(); 161 initrd_end += memparse(p, &p);
194 } 162
163 return 0;
195} 164}
165early_param("rd_size", rd_size_early);
196 166
197static inline int parse_rd_cmdline(unsigned long* rd_start, unsigned long* rd_end) 167static unsigned long __init init_initrd(void)
198{ 168{
169 unsigned long tmp, end, size;
170 u32 *initrd_header;
171
172 ROOT_DEV = Root_RAM0;
173
199 /* 174 /*
200 * "rd_start=0xNNNNNNNN" defines the memory address of an initrd 175 * Board specific code or command line parser should have
201 * "rd_size=0xNN" it's size 176 * already set up initrd_start and initrd_end. In these cases
177 * perfom sanity checks and use them if all looks good.
202 */ 178 */
203 unsigned long start = 0; 179 size = initrd_end - initrd_start;
204 unsigned long size = 0; 180 if (initrd_end == 0 || size == 0) {
205 unsigned long end; 181 initrd_start = 0;
206 char cmd_line[CL_SIZE]; 182 initrd_end = 0;
207 char *start_str; 183 } else
208 char *size_str; 184 return initrd_end;
209 char *tmp; 185
210 186 end = (unsigned long)&_end;
211 strcpy(cmd_line, command_line); 187 tmp = PAGE_ALIGN(end) - sizeof(u32) * 2;
212 *command_line = 0; 188 if (tmp < end)
213 tmp = cmd_line; 189 tmp += PAGE_SIZE;
214 /* Ignore "rd_start=" strings in other parameters. */ 190
215 start_str = strstr(cmd_line, "rd_start="); 191 initrd_header = (u32 *)tmp;
216 if (start_str && start_str != cmd_line && *(start_str - 1) != ' ') 192 if (initrd_header[0] == 0x494E5244) {
217 start_str = strstr(start_str, " rd_start="); 193 initrd_start = (unsigned long)&initrd_header[2];
218 while (start_str) { 194 initrd_end = initrd_start + initrd_header[1];
219 if (start_str != cmd_line)
220 strncat(command_line, tmp, start_str - tmp);
221 start = memparse(start_str + 9, &start_str);
222 tmp = start_str + 1;
223 start_str = strstr(start_str, " rd_start=");
224 } 195 }
225 if (*tmp) 196 return initrd_end;
226 strcat(command_line, tmp); 197}
227 198
228 strcpy(cmd_line, command_line); 199static void __init finalize_initrd(void)
229 *command_line = 0; 200{
230 tmp = cmd_line; 201 unsigned long size = initrd_end - initrd_start;
231 /* Ignore "rd_size" strings in other parameters. */ 202
232 size_str = strstr(cmd_line, "rd_size="); 203 if (size == 0) {
233 if (size_str && size_str != cmd_line && *(size_str - 1) != ' ') 204 printk(KERN_INFO "Initrd not found or empty");
234 size_str = strstr(size_str, " rd_size="); 205 goto disable;
235 while (size_str) { 206 }
236 if (size_str != cmd_line) 207 if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) {
237 strncat(command_line, tmp, size_str - tmp); 208 printk("Initrd extends beyond end of memory");
238 size = memparse(size_str + 8, &size_str); 209 goto disable;
239 tmp = size_str + 1;
240 size_str = strstr(size_str, " rd_size=");
241 } 210 }
242 if (*tmp)
243 strcat(command_line, tmp);
244 211
245#ifdef CONFIG_64BIT 212 reserve_bootmem(CPHYSADDR(initrd_start), size);
246 /* HACK: Guess if the sign extension was forgotten */ 213 initrd_below_start_ok = 1;
247 if (start > 0x0000000080000000 && start < 0x00000000ffffffff) 214
248 start |= 0xffffffff00000000UL; 215 printk(KERN_INFO "Initial ramdisk at: 0x%lx (%lu bytes)\n",
216 initrd_start, size);
217 return;
218disable:
219 printk(" - disabling initrd\n");
220 initrd_start = 0;
221 initrd_end = 0;
222}
223
224#else /* !CONFIG_BLK_DEV_INITRD */
225
226#define init_initrd() 0
227#define finalize_initrd() do {} while (0)
228
249#endif 229#endif
250 230
251 end = start + size; 231/*
252 if (start && end) { 232 * Initialize the bootmem allocator. It also setup initrd related data
253 *rd_start = start; 233 * if needed.
254 *rd_end = end; 234 */
255 return 1; 235#ifdef CONFIG_SGI_IP27
256 } 236
257 return 0; 237static void __init bootmem_init(void)
238{
239 init_initrd();
240 finalize_initrd();
258} 241}
259 242
260#define MAXMEM HIGHMEM_START 243#else /* !CONFIG_SGI_IP27 */
261#define MAXMEM_PFN PFN_DOWN(MAXMEM)
262 244
263static inline void bootmem_init(void) 245static void __init bootmem_init(void)
264{ 246{
265 unsigned long start_pfn; 247 unsigned long reserved_end;
266 unsigned long reserved_end = (unsigned long)&_end; 248 unsigned long highest = 0;
267#ifndef CONFIG_SGI_IP27 249 unsigned long mapstart = -1UL;
268 unsigned long first_usable_pfn;
269 unsigned long bootmap_size; 250 unsigned long bootmap_size;
270 int i; 251 int i;
271#endif
272#ifdef CONFIG_BLK_DEV_INITRD
273 int initrd_reserve_bootmem = 0;
274
275 /* Board specific code should have set up initrd_start and initrd_end */
276 ROOT_DEV = Root_RAM0;
277 if (parse_rd_cmdline(&initrd_start, &initrd_end)) {
278 reserved_end = max(reserved_end, initrd_end);
279 initrd_reserve_bootmem = 1;
280 } else {
281 unsigned long tmp;
282 u32 *initrd_header;
283
284 tmp = ((reserved_end + PAGE_SIZE-1) & PAGE_MASK) - sizeof(u32) * 2;
285 if (tmp < reserved_end)
286 tmp += PAGE_SIZE;
287 initrd_header = (u32 *)tmp;
288 if (initrd_header[0] == 0x494E5244) {
289 initrd_start = (unsigned long)&initrd_header[2];
290 initrd_end = initrd_start + initrd_header[1];
291 reserved_end = max(reserved_end, initrd_end);
292 initrd_reserve_bootmem = 1;
293 }
294 }
295#endif /* CONFIG_BLK_DEV_INITRD */
296 252
297 /* 253 /*
298 * Partially used pages are not usable - thus 254 * Init any data related to initrd. It's a nop if INITRD is
299 * we are rounding upwards. 255 * not selected. Once that done we can determine the low bound
256 * of usable memory.
300 */ 257 */
301 start_pfn = PFN_UP(CPHYSADDR(reserved_end)); 258 reserved_end = init_initrd();
259 reserved_end = PFN_UP(CPHYSADDR(max(reserved_end, (unsigned long)&_end)));
302 260
303#ifndef CONFIG_SGI_IP27 261 /*
304 /* Find the highest page frame number we have available. */ 262 * Find the highest page frame number we have available.
305 max_pfn = 0; 263 */
306 first_usable_pfn = -1UL;
307 for (i = 0; i < boot_mem_map.nr_map; i++) { 264 for (i = 0; i < boot_mem_map.nr_map; i++) {
308 unsigned long start, end; 265 unsigned long start, end;
309 266
@@ -312,56 +269,38 @@ static inline void bootmem_init(void)
312 269
313 start = PFN_UP(boot_mem_map.map[i].addr); 270 start = PFN_UP(boot_mem_map.map[i].addr);
314 end = PFN_DOWN(boot_mem_map.map[i].addr 271 end = PFN_DOWN(boot_mem_map.map[i].addr
315 + boot_mem_map.map[i].size); 272 + boot_mem_map.map[i].size);
316 273
317 if (start >= end) 274 if (end > highest)
275 highest = end;
276 if (end <= reserved_end)
318 continue; 277 continue;
319 if (end > max_pfn) 278 if (start >= mapstart)
320 max_pfn = end; 279 continue;
321 if (start < first_usable_pfn) { 280 mapstart = max(reserved_end, start);
322 if (start > start_pfn) {
323 first_usable_pfn = start;
324 } else if (end > start_pfn) {
325 first_usable_pfn = start_pfn;
326 }
327 }
328 } 281 }
329 282
330 /* 283 /*
331 * Determine low and high memory ranges 284 * Determine low and high memory ranges
332 */ 285 */
333 max_low_pfn = max_pfn; 286 if (highest > PFN_DOWN(HIGHMEM_START)) {
334 if (max_low_pfn > MAXMEM_PFN) { 287#ifdef CONFIG_HIGHMEM
335 max_low_pfn = MAXMEM_PFN; 288 highstart_pfn = PFN_DOWN(HIGHMEM_START);
336#ifndef CONFIG_HIGHMEM 289 highend_pfn = highest;
337 /* Maximum memory usable is what is directly addressable */
338 printk(KERN_WARNING "Warning only %ldMB will be used.\n",
339 MAXMEM >> 20);
340 printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
341#endif 290#endif
291 highest = PFN_DOWN(HIGHMEM_START);
342 } 292 }
343 293
344#ifdef CONFIG_HIGHMEM
345 /* 294 /*
346 * Crude, we really should make a better attempt at detecting 295 * Initialize the boot-time allocator with low memory only.
347 * highstart_pfn
348 */ 296 */
349 highstart_pfn = highend_pfn = max_pfn; 297 bootmap_size = init_bootmem(mapstart, highest);
350 if (max_pfn > MAXMEM_PFN) {
351 highstart_pfn = MAXMEM_PFN;
352 printk(KERN_NOTICE "%ldMB HIGHMEM available.\n",
353 (highend_pfn - highstart_pfn) >> (20 - PAGE_SHIFT));
354 }
355#endif
356
357 /* Initialize the boot-time allocator with low memory only. */
358 bootmap_size = init_bootmem(first_usable_pfn, max_low_pfn);
359 298
360 /* 299 /*
361 * Register fully available low RAM pages with the bootmem allocator. 300 * Register fully available low RAM pages with the bootmem allocator.
362 */ 301 */
363 for (i = 0; i < boot_mem_map.nr_map; i++) { 302 for (i = 0; i < boot_mem_map.nr_map; i++) {
364 unsigned long curr_pfn, last_pfn, size; 303 unsigned long start, end, size;
365 304
366 /* 305 /*
367 * Reserve usable memory. 306 * Reserve usable memory.
@@ -369,85 +308,50 @@ static inline void bootmem_init(void)
369 if (boot_mem_map.map[i].type != BOOT_MEM_RAM) 308 if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
370 continue; 309 continue;
371 310
372 /* 311 start = PFN_UP(boot_mem_map.map[i].addr);
373 * We are rounding up the start address of usable memory: 312 end = PFN_DOWN(boot_mem_map.map[i].addr
374 */
375 curr_pfn = PFN_UP(boot_mem_map.map[i].addr);
376 if (curr_pfn >= max_low_pfn)
377 continue;
378 if (curr_pfn < start_pfn)
379 curr_pfn = start_pfn;
380
381 /*
382 * ... and at the end of the usable range downwards:
383 */
384 last_pfn = PFN_DOWN(boot_mem_map.map[i].addr
385 + boot_mem_map.map[i].size); 313 + boot_mem_map.map[i].size);
386
387 if (last_pfn > max_low_pfn)
388 last_pfn = max_low_pfn;
389
390 /* 314 /*
391 * Only register lowmem part of lowmem segment with bootmem. 315 * We are rounding up the start address of usable memory
316 * and at the end of the usable range downwards.
392 */ 317 */
393 size = last_pfn - curr_pfn; 318 if (start >= max_low_pfn)
394 if (curr_pfn > PFN_DOWN(HIGHMEM_START))
395 continue;
396 if (curr_pfn + size - 1 > PFN_DOWN(HIGHMEM_START))
397 size = PFN_DOWN(HIGHMEM_START) - curr_pfn;
398 if (!size)
399 continue; 319 continue;
320 if (start < reserved_end)
321 start = reserved_end;
322 if (end > max_low_pfn)
323 end = max_low_pfn;
400 324
401 /* 325 /*
402 * ... finally, did all the rounding and playing 326 * ... finally, is the area going away?
403 * around just make the area go away?
404 */ 327 */
405 if (last_pfn <= curr_pfn) 328 if (end <= start)
406 continue; 329 continue;
330 size = end - start;
407 331
408 /* Register lowmem ranges */ 332 /* Register lowmem ranges */
409 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size)); 333 free_bootmem(PFN_PHYS(start), size << PAGE_SHIFT);
410 memory_present(0, curr_pfn, curr_pfn + size - 1); 334 memory_present(0, start, end);
411 } 335 }
412 336
413 /* Reserve the bootmap memory. */ 337 /*
414 reserve_bootmem(PFN_PHYS(first_usable_pfn), bootmap_size); 338 * Reserve the bootmap memory.
415#endif /* CONFIG_SGI_IP27 */ 339 */
416 340 reserve_bootmem(PFN_PHYS(mapstart), bootmap_size);
417#ifdef CONFIG_BLK_DEV_INITRD
418 initrd_below_start_ok = 1;
419 if (initrd_start) {
420 unsigned long initrd_size = ((unsigned char *)initrd_end) -
421 ((unsigned char *)initrd_start);
422 const int width = sizeof(long) * 2;
423
424 printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
425 (void *)initrd_start, initrd_size);
426
427 if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) {
428 printk("initrd extends beyond end of memory "
429 "(0x%0*Lx > 0x%0*Lx)\ndisabling initrd\n",
430 width,
431 (unsigned long long) CPHYSADDR(initrd_end),
432 width,
433 (unsigned long long) PFN_PHYS(max_low_pfn));
434 initrd_start = initrd_end = 0;
435 initrd_reserve_bootmem = 0;
436 }
437 341
438 if (initrd_reserve_bootmem) 342 /*
439 reserve_bootmem(CPHYSADDR(initrd_start), initrd_size); 343 * Reserve initrd memory if needed.
440 } 344 */
441#endif /* CONFIG_BLK_DEV_INITRD */ 345 finalize_initrd();
442} 346}
443 347
348#endif /* CONFIG_SGI_IP27 */
349
444/* 350/*
445 * arch_mem_init - initialize memory managment subsystem 351 * arch_mem_init - initialize memory managment subsystem
446 * 352 *
447 * o plat_mem_setup() detects the memory configuration and will record detected 353 * o plat_mem_setup() detects the memory configuration and will record detected
448 * memory areas using add_memory_region. 354 * memory areas using add_memory_region.
449 * o parse_cmdline_early() parses the command line for mem= options which,
450 * iff detected, will override the results of the automatic detection.
451 * 355 *
452 * At this stage the memory configuration of the system is known to the 356 * At this stage the memory configuration of the system is known to the
453 * kernel but generic memory managment system is still entirely uninitialized. 357 * kernel but generic memory managment system is still entirely uninitialized.
@@ -465,25 +369,59 @@ static inline void bootmem_init(void)
465 * initialization hook for anything else was introduced. 369 * initialization hook for anything else was introduced.
466 */ 370 */
467 371
468extern void plat_mem_setup(void); 372static int usermem __initdata = 0;
373
374static int __init early_parse_mem(char *p)
375{
376 unsigned long start, size;
377
378 /*
379 * If a user specifies memory size, we
380 * blow away any automatically generated
381 * size.
382 */
383 if (usermem == 0) {
384 boot_mem_map.nr_map = 0;
385 usermem = 1;
386 }
387 start = 0;
388 size = memparse(p, &p);
389 if (*p == '@')
390 start = memparse(p + 1, &p);
391
392 add_memory_region(start, size, BOOT_MEM_RAM);
393 return 0;
394}
395early_param("mem", early_parse_mem);
469 396
470static void __init arch_mem_init(char **cmdline_p) 397static void __init arch_mem_init(char **cmdline_p)
471{ 398{
399 extern void plat_mem_setup(void);
400
472 /* call board setup routine */ 401 /* call board setup routine */
473 plat_mem_setup(); 402 plat_mem_setup();
474 403
404 printk("Determined physical RAM map:\n");
405 print_memory_map();
406
475 strlcpy(command_line, arcs_cmdline, sizeof(command_line)); 407 strlcpy(command_line, arcs_cmdline, sizeof(command_line));
476 strlcpy(saved_command_line, command_line, COMMAND_LINE_SIZE); 408 strlcpy(saved_command_line, command_line, COMMAND_LINE_SIZE);
477 409
478 *cmdline_p = command_line; 410 *cmdline_p = command_line;
479 411
480 parse_cmdline_early(); 412 parse_early_param();
413
414 if (usermem) {
415 printk("User-defined physical RAM map:\n");
416 print_memory_map();
417 }
418
481 bootmem_init(); 419 bootmem_init();
482 sparse_init(); 420 sparse_init();
483 paging_init(); 421 paging_init();
484} 422}
485 423
486static inline void resource_init(void) 424static void __init resource_init(void)
487{ 425{
488 int i; 426 int i;
489 427
@@ -504,10 +442,10 @@ static inline void resource_init(void)
504 442
505 start = boot_mem_map.map[i].addr; 443 start = boot_mem_map.map[i].addr;
506 end = boot_mem_map.map[i].addr + boot_mem_map.map[i].size - 1; 444 end = boot_mem_map.map[i].addr + boot_mem_map.map[i].size - 1;
507 if (start >= MAXMEM) 445 if (start >= HIGHMEM_START)
508 continue; 446 continue;
509 if (end >= MAXMEM) 447 if (end >= HIGHMEM_START)
510 end = MAXMEM - 1; 448 end = HIGHMEM_START - 1;
511 449
512 res = alloc_bootmem(sizeof(struct resource)); 450 res = alloc_bootmem(sizeof(struct resource));
513 switch (boot_mem_map.map[i].type) { 451 switch (boot_mem_map.map[i].type) {
@@ -536,9 +474,6 @@ static inline void resource_init(void)
536 } 474 }
537} 475}
538 476
539#undef MAXMEM
540#undef MAXMEM_PFN
541
542void __init setup_arch(char **cmdline_p) 477void __init setup_arch(char **cmdline_p)
543{ 478{
544 cpu_probe(); 479 cpu_probe();
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index 6b4d9be31615..b9d358e05214 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -424,15 +424,11 @@ void do_signal(struct pt_regs *regs)
424 if (!user_mode(regs)) 424 if (!user_mode(regs))
425 return; 425 return;
426 426
427 if (try_to_freeze())
428 goto no_signal;
429
430 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 427 if (test_thread_flag(TIF_RESTORE_SIGMASK))
431 oldset = &current->saved_sigmask; 428 oldset = &current->saved_sigmask;
432 else 429 else
433 oldset = &current->blocked; 430 oldset = &current->blocked;
434 431
435
436 signr = get_signal_to_deliver(&info, &ka, regs, NULL); 432 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
437 if (signr > 0) { 433 if (signr > 0) {
438 /* Whee! Actually deliver the signal. */ 434 /* Whee! Actually deliver the signal. */
@@ -446,9 +442,10 @@ void do_signal(struct pt_regs *regs)
446 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 442 if (test_thread_flag(TIF_RESTORE_SIGMASK))
447 clear_thread_flag(TIF_RESTORE_SIGMASK); 443 clear_thread_flag(TIF_RESTORE_SIGMASK);
448 } 444 }
445
446 return;
449 } 447 }
450 448
451no_signal:
452 /* 449 /*
453 * Who's code doesn't conform to the restartable syscall convention 450 * Who's code doesn't conform to the restartable syscall convention
454 * dies here!!! The li instruction, a single machine instruction, 451 * dies here!!! The li instruction, a single machine instruction,
@@ -466,6 +463,7 @@ no_signal:
466 regs->regs[7] = regs->regs[26]; 463 regs->regs[7] = regs->regs[26];
467 regs->cp0_epc -= 4; 464 regs->cp0_epc -= 4;
468 } 465 }
466 regs->regs[0] = 0; /* Don't deal with this again. */
469 } 467 }
470 468
471 /* 469 /*
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index f32a22997c3d..c86a5ddff050 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -815,9 +815,6 @@ void do_signal32(struct pt_regs *regs)
815 if (!user_mode(regs)) 815 if (!user_mode(regs))
816 return; 816 return;
817 817
818 if (try_to_freeze())
819 goto no_signal;
820
821 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 818 if (test_thread_flag(TIF_RESTORE_SIGMASK))
822 oldset = &current->saved_sigmask; 819 oldset = &current->saved_sigmask;
823 else 820 else
@@ -836,9 +833,10 @@ void do_signal32(struct pt_regs *regs)
836 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 833 if (test_thread_flag(TIF_RESTORE_SIGMASK))
837 clear_thread_flag(TIF_RESTORE_SIGMASK); 834 clear_thread_flag(TIF_RESTORE_SIGMASK);
838 } 835 }
836
837 return;
839 } 838 }
840 839
841no_signal:
842 /* 840 /*
843 * Who's code doesn't conform to the restartable syscall convention 841 * Who's code doesn't conform to the restartable syscall convention
844 * dies here!!! The li instruction, a single machine instruction, 842 * dies here!!! The li instruction, a single machine instruction,
@@ -856,6 +854,7 @@ no_signal:
856 regs->regs[7] = regs->regs[26]; 854 regs->regs[7] = regs->regs[26];
857 regs->cp0_epc -= 4; 855 regs->cp0_epc -= 4;
858 } 856 }
857 regs->regs[0] = 0; /* Don't deal with this again. */
859 } 858 }
860 859
861 /* 860 /*
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 93429a4d3012..766253c44f3f 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -203,7 +203,7 @@ void plat_smp_setup(void)
203 write_vpe_c0_config( read_c0_config()); 203 write_vpe_c0_config( read_c0_config());
204 204
205 /* make sure there are no software interrupts pending */ 205 /* make sure there are no software interrupts pending */
206 write_vpe_c0_cause(read_vpe_c0_cause() & ~(C_SW1|C_SW0)); 206 write_vpe_c0_cause(0);
207 207
208 /* Propagate Config7 */ 208 /* Propagate Config7 */
209 write_vpe_c0_config7(read_c0_config7()); 209 write_vpe_c0_config7(read_c0_config7());
diff --git a/arch/mips/kernel/smtc-asm.S b/arch/mips/kernel/smtc-asm.S
index 4cc3dea36612..76cb31d57482 100644
--- a/arch/mips/kernel/smtc-asm.S
+++ b/arch/mips/kernel/smtc-asm.S
@@ -8,7 +8,7 @@
8#include <asm/regdef.h> 8#include <asm/regdef.h>
9#include <asm/asmmacro.h> 9#include <asm/asmmacro.h>
10#include <asm/stackframe.h> 10#include <asm/stackframe.h>
11#include <asm/stackframe.h> 11#include <asm/irqflags.h>
12 12
13/* 13/*
14 * "Software Interrupt" linkage. 14 * "Software Interrupt" linkage.
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 0721314db657..9951240cc3fd 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -263,7 +263,7 @@ asmlinkage int sys_olduname(struct oldold_utsname __user * name)
263 return error; 263 return error;
264} 264}
265 265
266void sys_set_thread_area(unsigned long addr) 266asmlinkage int sys_set_thread_area(unsigned long addr)
267{ 267{
268 struct thread_info *ti = task_thread_info(current); 268 struct thread_info *ti = task_thread_info(current);
269 269
@@ -271,6 +271,8 @@ void sys_set_thread_area(unsigned long addr)
271 271
272 /* If some future MIPS implementation has this register in hardware, 272 /* If some future MIPS implementation has this register in hardware,
273 * we will need to update it here (and in context switches). */ 273 * we will need to update it here (and in context switches). */
274
275 return 0;
274} 276}
275 277
276asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3) 278asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 954a198494ef..e51d8fd9a152 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -20,6 +20,7 @@
20#include <linux/spinlock.h> 20#include <linux/spinlock.h>
21#include <linux/kallsyms.h> 21#include <linux/kallsyms.h>
22#include <linux/bootmem.h> 22#include <linux/bootmem.h>
23#include <linux/interrupt.h>
23 24
24#include <asm/bootinfo.h> 25#include <asm/bootinfo.h>
25#include <asm/branch.h> 26#include <asm/branch.h>
@@ -72,28 +73,68 @@ void (*board_nmi_handler_setup)(void);
72void (*board_ejtag_handler_setup)(void); 73void (*board_ejtag_handler_setup)(void);
73void (*board_bind_eic_interrupt)(int irq, int regset); 74void (*board_bind_eic_interrupt)(int irq, int regset);
74 75
75/* 76
76 * These constant is for searching for possible module text segments. 77static void show_raw_backtrace(unsigned long reg29)
77 * MODULE_RANGE is a guess of how much space is likely to be vmalloced. 78{
78 */ 79 unsigned long *sp = (unsigned long *)reg29;
79#define MODULE_RANGE (8*1024*1024) 80 unsigned long addr;
81
82 printk("Call Trace:");
83#ifdef CONFIG_KALLSYMS
84 printk("\n");
85#endif
86 while (!kstack_end(sp)) {
87 addr = *sp++;
88 if (__kernel_text_address(addr))
89 print_ip_sym(addr);
90 }
91 printk("\n");
92}
93
94#ifdef CONFIG_KALLSYMS
95static int raw_show_trace;
96static int __init set_raw_show_trace(char *str)
97{
98 raw_show_trace = 1;
99 return 1;
100}
101__setup("raw_show_trace", set_raw_show_trace);
102
103extern unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
104 unsigned long pc, unsigned long ra);
105
106static void show_backtrace(struct task_struct *task, struct pt_regs *regs)
107{
108 unsigned long sp = regs->regs[29];
109 unsigned long ra = regs->regs[31];
110 unsigned long pc = regs->cp0_epc;
111
112 if (raw_show_trace || !__kernel_text_address(pc)) {
113 show_raw_backtrace(sp);
114 return;
115 }
116 printk("Call Trace:\n");
117 do {
118 print_ip_sym(pc);
119 pc = unwind_stack(task, &sp, pc, ra);
120 ra = 0;
121 } while (pc);
122 printk("\n");
123}
124#else
125#define show_backtrace(task, r) show_raw_backtrace((r)->regs[29]);
126#endif
80 127
81/* 128/*
82 * This routine abuses get_user()/put_user() to reference pointers 129 * This routine abuses get_user()/put_user() to reference pointers
83 * with at least a bit of error checking ... 130 * with at least a bit of error checking ...
84 */ 131 */
85void show_stack(struct task_struct *task, unsigned long *sp) 132static void show_stacktrace(struct task_struct *task, struct pt_regs *regs)
86{ 133{
87 const int field = 2 * sizeof(unsigned long); 134 const int field = 2 * sizeof(unsigned long);
88 long stackdata; 135 long stackdata;
89 int i; 136 int i;
90 137 unsigned long *sp = (unsigned long *)regs->regs[29];
91 if (!sp) {
92 if (task && task != current)
93 sp = (unsigned long *) task->thread.reg29;
94 else
95 sp = (unsigned long *) &sp;
96 }
97 138
98 printk("Stack :"); 139 printk("Stack :");
99 i = 0; 140 i = 0;
@@ -114,32 +155,48 @@ void show_stack(struct task_struct *task, unsigned long *sp)
114 i++; 155 i++;
115 } 156 }
116 printk("\n"); 157 printk("\n");
158 show_backtrace(task, regs);
117} 159}
118 160
119void show_trace(struct task_struct *task, unsigned long *stack) 161static __always_inline void prepare_frametrace(struct pt_regs *regs)
120{ 162{
121 const int field = 2 * sizeof(unsigned long); 163 __asm__ __volatile__(
122 unsigned long addr; 164 ".set push\n\t"
123 165 ".set noat\n\t"
124 if (!stack) { 166#ifdef CONFIG_64BIT
125 if (task && task != current) 167 "1: dla $1, 1b\n\t"
126 stack = (unsigned long *) task->thread.reg29; 168 "sd $1, %0\n\t"
127 else 169 "sd $29, %1\n\t"
128 stack = (unsigned long *) &stack; 170 "sd $31, %2\n\t"
129 } 171#else
130 172 "1: la $1, 1b\n\t"
131 printk("Call Trace:"); 173 "sw $1, %0\n\t"
132#ifdef CONFIG_KALLSYMS 174 "sw $29, %1\n\t"
133 printk("\n"); 175 "sw $31, %2\n\t"
134#endif 176#endif
135 while (!kstack_end(stack)) { 177 ".set pop\n\t"
136 addr = *stack++; 178 : "=m" (regs->cp0_epc),
137 if (__kernel_text_address(addr)) { 179 "=m" (regs->regs[29]), "=m" (regs->regs[31])
138 printk(" [<%0*lx>] ", field, addr); 180 : : "memory");
139 print_symbol("%s\n", addr); 181}
182
183void show_stack(struct task_struct *task, unsigned long *sp)
184{
185 struct pt_regs regs;
186 if (sp) {
187 regs.regs[29] = (unsigned long)sp;
188 regs.regs[31] = 0;
189 regs.cp0_epc = 0;
190 } else {
191 if (task && task != current) {
192 regs.regs[29] = task->thread.reg29;
193 regs.regs[31] = 0;
194 regs.cp0_epc = task->thread.reg31;
195 } else {
196 prepare_frametrace(&regs);
140 } 197 }
141 } 198 }
142 printk("\n"); 199 show_stacktrace(task, &regs);
143} 200}
144 201
145/* 202/*
@@ -147,9 +204,15 @@ void show_trace(struct task_struct *task, unsigned long *stack)
147 */ 204 */
148void dump_stack(void) 205void dump_stack(void)
149{ 206{
150 unsigned long stack; 207 struct pt_regs regs;
151 208
152 show_trace(current, &stack); 209 /*
210 * Remove any garbage that may be in regs (specially func
211 * addresses) to avoid show_raw_backtrace() to report them
212 */
213 memset(&regs, 0, sizeof(regs));
214 prepare_frametrace(&regs);
215 show_backtrace(current, &regs);
153} 216}
154 217
155EXPORT_SYMBOL(dump_stack); 218EXPORT_SYMBOL(dump_stack);
@@ -268,8 +331,7 @@ void show_registers(struct pt_regs *regs)
268 print_modules(); 331 print_modules();
269 printk("Process %s (pid: %d, threadinfo=%p, task=%p)\n", 332 printk("Process %s (pid: %d, threadinfo=%p, task=%p)\n",
270 current->comm, current->pid, current_thread_info(), current); 333 current->comm, current->pid, current_thread_info(), current);
271 show_stack(current, (long *) regs->regs[29]); 334 show_stacktrace(current, regs);
272 show_trace(current, (long *) regs->regs[29]);
273 show_code((unsigned int *) regs->cp0_epc); 335 show_code((unsigned int *) regs->cp0_epc);
274 printk("\n"); 336 printk("\n");
275} 337}
@@ -292,6 +354,16 @@ NORET_TYPE void ATTRIB_NORET die(const char * str, struct pt_regs * regs)
292 printk("%s[#%d]:\n", str, ++die_counter); 354 printk("%s[#%d]:\n", str, ++die_counter);
293 show_registers(regs); 355 show_registers(regs);
294 spin_unlock_irq(&die_lock); 356 spin_unlock_irq(&die_lock);
357
358 if (in_interrupt())
359 panic("Fatal exception in interrupt");
360
361 if (panic_on_oops) {
362 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
363 ssleep(5);
364 panic("Fatal exception");
365 }
366
295 do_exit(SIGSEGV); 367 do_exit(SIGSEGV);
296} 368}
297 369
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index 9ee0ec2cd067..51ddd2166898 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -768,10 +768,16 @@ int vpe_run(struct vpe * v)
768 */ 768 */
769 write_tc_c0_tcbind((read_tc_c0_tcbind() & ~TCBIND_CURVPE) | v->minor); 769 write_tc_c0_tcbind((read_tc_c0_tcbind() & ~TCBIND_CURVPE) | v->minor);
770 770
771 write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() & ~(VPECONF0_VPA));
772
773 back_to_back_c0_hazard();
774
771 /* Set up the XTC bit in vpeconf0 to point at our tc */ 775 /* Set up the XTC bit in vpeconf0 to point at our tc */
772 write_vpe_c0_vpeconf0( (read_vpe_c0_vpeconf0() & ~(VPECONF0_XTC)) 776 write_vpe_c0_vpeconf0( (read_vpe_c0_vpeconf0() & ~(VPECONF0_XTC))
773 | (t->index << VPECONF0_XTC_SHIFT)); 777 | (t->index << VPECONF0_XTC_SHIFT));
774 778
779 back_to_back_c0_hazard();
780
775 /* enable this VPE */ 781 /* enable this VPE */
776 write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_VPA); 782 write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_VPA);
777 783
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
index fb25e0377f11..a020a3cb4f4b 100644
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ b/arch/mips/mips-boards/atlas/atlas_int.c
@@ -1,6 +1,8 @@
1/* 1/*
2 * Carsten Langgaard, carstenl@mips.com 2 * Copyright (C) 1999, 2000, 2006 MIPS Technologies, Inc.
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. 3 * All rights reserved.
4 * Authors: Carsten Langgaard <carstenl@mips.com>
5 * Maciej W. Rozycki <macro@mips.com>
4 * 6 *
5 * ######################################################################## 7 * ########################################################################
6 * 8 *
@@ -25,17 +27,20 @@
25 */ 27 */
26#include <linux/compiler.h> 28#include <linux/compiler.h>
27#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/irq.h>
28#include <linux/sched.h> 31#include <linux/sched.h>
29#include <linux/slab.h> 32#include <linux/slab.h>
30#include <linux/interrupt.h> 33#include <linux/interrupt.h>
31#include <linux/kernel_stat.h> 34#include <linux/kernel_stat.h>
32 35
33#include <asm/irq.h> 36#include <asm/gdb-stub.h>
34#include <asm/io.h> 37#include <asm/io.h>
38#include <asm/irq_cpu.h>
39#include <asm/msc01_ic.h>
40
35#include <asm/mips-boards/atlas.h> 41#include <asm/mips-boards/atlas.h>
36#include <asm/mips-boards/atlasint.h> 42#include <asm/mips-boards/atlasint.h>
37#include <asm/gdb-stub.h> 43#include <asm/mips-boards/generic.h>
38
39 44
40static struct atlas_ictrl_regs *atlas_hw0_icregs; 45static struct atlas_ictrl_regs *atlas_hw0_icregs;
41 46
@@ -47,13 +52,13 @@ static struct atlas_ictrl_regs *atlas_hw0_icregs;
47 52
48void disable_atlas_irq(unsigned int irq_nr) 53void disable_atlas_irq(unsigned int irq_nr)
49{ 54{
50 atlas_hw0_icregs->intrsten = (1 << (irq_nr-ATLASINT_BASE)); 55 atlas_hw0_icregs->intrsten = 1 << (irq_nr - ATLAS_INT_BASE);
51 iob(); 56 iob();
52} 57}
53 58
54void enable_atlas_irq(unsigned int irq_nr) 59void enable_atlas_irq(unsigned int irq_nr)
55{ 60{
56 atlas_hw0_icregs->intseten = (1 << (irq_nr-ATLASINT_BASE)); 61 atlas_hw0_icregs->intseten = 1 << (irq_nr - ATLAS_INT_BASE);
57 iob(); 62 iob();
58} 63}
59 64
@@ -107,7 +112,7 @@ static inline void atlas_hw0_irqdispatch(struct pt_regs *regs)
107 if (unlikely(int_status == 0)) 112 if (unlikely(int_status == 0))
108 return; 113 return;
109 114
110 irq = ATLASINT_BASE + ls1bit32(int_status); 115 irq = ATLAS_INT_BASE + ls1bit32(int_status);
111 116
112 DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq); 117 DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq);
113 118
@@ -161,15 +166,14 @@ static inline unsigned int irq_ffs(unsigned int pending)
161} 166}
162 167
163/* 168/*
164 * IRQs on the Atlas board look basically (barring software IRQs which we 169 * IRQs on the Atlas board look basically like (all external interrupt
165 * don't use at all and all external interrupt sources are combined together 170 * sources are combined together on hardware interrupt 0 (MIPS IRQ 2)):
166 * on hardware interrupt 0 (MIPS IRQ 2)) like:
167 * 171 *
168 * MIPS IRQ Source 172 * MIPS IRQ Source
169 * -------- ------ 173 * -------- ------
170 * 0 Software (ignored) 174 * 0 Software 0 (reschedule IPI on MT)
171 * 1 Software (ignored) 175 * 1 Software 1 (remote call IPI on MT)
172 * 2 Combined hardware interrupt (hw0) 176 * 2 Combined Atlas hardware interrupt (hw0)
173 * 3 Hardware (ignored) 177 * 3 Hardware (ignored)
174 * 4 Hardware (ignored) 178 * 4 Hardware (ignored)
175 * 5 Hardware (ignored) 179 * 5 Hardware (ignored)
@@ -179,7 +183,7 @@ static inline unsigned int irq_ffs(unsigned int pending)
179 * We handle the IRQ according to _our_ priority which is: 183 * We handle the IRQ according to _our_ priority which is:
180 * 184 *
181 * Highest ---- R4k Timer 185 * Highest ---- R4k Timer
182 * Lowest ---- Combined hardware interrupt 186 * Lowest ---- Software 0
183 * 187 *
184 * then we just return, if multiple IRQs are pending then we will just take 188 * then we just return, if multiple IRQs are pending then we will just take
185 * another exception, big deal. 189 * another exception, big deal.
@@ -193,17 +197,19 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
193 197
194 if (irq == MIPSCPU_INT_ATLAS) 198 if (irq == MIPSCPU_INT_ATLAS)
195 atlas_hw0_irqdispatch(regs); 199 atlas_hw0_irqdispatch(regs);
196 else if (irq > 0) 200 else if (irq >= 0)
197 do_IRQ(MIPSCPU_INT_BASE + irq, regs); 201 do_IRQ(MIPSCPU_INT_BASE + irq, regs);
198 else 202 else
199 spurious_interrupt(regs); 203 spurious_interrupt(regs);
200} 204}
201 205
202void __init arch_init_irq(void) 206static inline void init_atlas_irqs (int base)
203{ 207{
204 int i; 208 int i;
205 209
206 atlas_hw0_icregs = (struct atlas_ictrl_regs *)ioremap (ATLAS_ICTRL_REGS_BASE, sizeof(struct atlas_ictrl_regs *)); 210 atlas_hw0_icregs = (struct atlas_ictrl_regs *)
211 ioremap(ATLAS_ICTRL_REGS_BASE,
212 sizeof(struct atlas_ictrl_regs *));
207 213
208 /* 214 /*
209 * Mask out all interrupt by writing "1" to all bit position in 215 * Mask out all interrupt by writing "1" to all bit position in
@@ -211,7 +217,7 @@ void __init arch_init_irq(void)
211 */ 217 */
212 atlas_hw0_icregs->intrsten = 0xffffffff; 218 atlas_hw0_icregs->intrsten = 0xffffffff;
213 219
214 for (i = ATLASINT_BASE; i <= ATLASINT_END; i++) { 220 for (i = ATLAS_INT_BASE; i <= ATLAS_INT_END; i++) {
215 irq_desc[i].status = IRQ_DISABLED; 221 irq_desc[i].status = IRQ_DISABLED;
216 irq_desc[i].action = 0; 222 irq_desc[i].action = 0;
217 irq_desc[i].depth = 1; 223 irq_desc[i].depth = 1;
@@ -219,3 +225,62 @@ void __init arch_init_irq(void)
219 spin_lock_init(&irq_desc[i].lock); 225 spin_lock_init(&irq_desc[i].lock);
220 } 226 }
221} 227}
228
229static struct irqaction atlasirq = {
230 .handler = no_action,
231 .name = "Atlas cascade"
232};
233
234msc_irqmap_t __initdata msc_irqmap[] = {
235 {MSC01C_INT_TMR, MSC01_IRQ_EDGE, 0},
236 {MSC01C_INT_PCI, MSC01_IRQ_LEVEL, 0},
237};
238int __initdata msc_nr_irqs = sizeof(msc_irqmap) / sizeof(*msc_irqmap);
239
240msc_irqmap_t __initdata msc_eicirqmap[] = {
241 {MSC01E_INT_SW0, MSC01_IRQ_LEVEL, 0},
242 {MSC01E_INT_SW1, MSC01_IRQ_LEVEL, 0},
243 {MSC01E_INT_ATLAS, MSC01_IRQ_LEVEL, 0},
244 {MSC01E_INT_TMR, MSC01_IRQ_EDGE, 0},
245 {MSC01E_INT_PCI, MSC01_IRQ_LEVEL, 0},
246 {MSC01E_INT_PERFCTR, MSC01_IRQ_LEVEL, 0},
247 {MSC01E_INT_CPUCTR, MSC01_IRQ_LEVEL, 0}
248};
249int __initdata msc_nr_eicirqs = sizeof(msc_eicirqmap) / sizeof(*msc_eicirqmap);
250
251void __init arch_init_irq(void)
252{
253 init_atlas_irqs(ATLAS_INT_BASE);
254
255 if (!cpu_has_veic)
256 mips_cpu_irq_init(MIPSCPU_INT_BASE);
257
258 switch(mips_revision_corid) {
259 case MIPS_REVISION_CORID_CORE_MSC:
260 case MIPS_REVISION_CORID_CORE_FPGA2:
261 case MIPS_REVISION_CORID_CORE_FPGA3:
262 case MIPS_REVISION_CORID_CORE_24K:
263 case MIPS_REVISION_CORID_CORE_EMUL_MSC:
264 if (cpu_has_veic)
265 init_msc_irqs (MSC01E_INT_BASE,
266 msc_eicirqmap, msc_nr_eicirqs);
267 else
268 init_msc_irqs (MSC01C_INT_BASE,
269 msc_irqmap, msc_nr_irqs);
270 }
271
272
273 if (cpu_has_veic) {
274 set_vi_handler (MSC01E_INT_ATLAS, atlas_hw0_irqdispatch);
275 setup_irq (MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq);
276 } else if (cpu_has_vint) {
277 set_vi_handler (MIPSCPU_INT_ATLAS, atlas_hw0_irqdispatch);
278#ifdef CONFIG_MIPS_MT_SMTC
279 setup_irq_smtc (MIPSCPU_INT_BASE + MIPSCPU_INT_ATLAS,
280 &atlasirq, (0x100 << MIPSCPU_INT_ATLAS));
281#else /* Not SMTC */
282 setup_irq(MIPSCPU_INT_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
283#endif /* CONFIG_MIPS_MT_SMTC */
284 } else
285 setup_irq(MIPSCPU_INT_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
286}
diff --git a/arch/mips/mips-boards/atlas/atlas_setup.c b/arch/mips/mips-boards/atlas/atlas_setup.c
index 9871a91fdb07..0c6b0ce15028 100644
--- a/arch/mips/mips-boards/atlas/atlas_setup.c
+++ b/arch/mips/mips-boards/atlas/atlas_setup.c
@@ -77,7 +77,7 @@ static void __init serial_init(void)
77#else 77#else
78 s.iobase = ATLAS_UART_REGS_BASE+3; 78 s.iobase = ATLAS_UART_REGS_BASE+3;
79#endif 79#endif
80 s.irq = ATLASINT_UART; 80 s.irq = ATLAS_INT_UART;
81 s.uartclk = ATLAS_BASE_BAUD * 16; 81 s.uartclk = ATLAS_BASE_BAUD * 16;
82 s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ; 82 s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ;
83 s.iotype = UPIO_PORT; 83 s.iotype = UPIO_PORT;
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index 557bf961f36a..8d15861fce61 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -41,8 +41,13 @@
41 41
42#include <asm/mips-boards/generic.h> 42#include <asm/mips-boards/generic.h>
43#include <asm/mips-boards/prom.h> 43#include <asm/mips-boards/prom.h>
44
45#ifdef CONFIG_MIPS_ATLAS
46#include <asm/mips-boards/atlasint.h>
47#endif
48#ifdef CONFIG_MIPS_MALTA
44#include <asm/mips-boards/maltaint.h> 49#include <asm/mips-boards/maltaint.h>
45#include <asm/mc146818-time.h> 50#endif
46 51
47unsigned long cpu_khz; 52unsigned long cpu_khz;
48 53
@@ -92,10 +97,9 @@ extern int (*perf_irq)(struct pt_regs *regs);
92irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) 97irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
93{ 98{
94 int cpu = smp_processor_id(); 99 int cpu = smp_processor_id();
95 int r2 = cpu_has_mips_r2;
96 100
97#ifdef CONFIG_MIPS_MT_SMTC 101#ifdef CONFIG_MIPS_MT_SMTC
98 /* 102 /*
99 * In an SMTC system, one Count/Compare set exists per VPE. 103 * In an SMTC system, one Count/Compare set exists per VPE.
100 * Which TC within a VPE gets the interrupt is essentially 104 * Which TC within a VPE gets the interrupt is essentially
101 * random - we only know that it shouldn't be one with 105 * random - we only know that it shouldn't be one with
@@ -108,29 +112,46 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
108 * the general MIPS timer_interrupt routine. 112 * the general MIPS timer_interrupt routine.
109 */ 113 */
110 114
115 int vpflags;
116
111 /* 117 /*
112 * DVPE is necessary so long as cross-VPE interrupts 118 * We could be here due to timer interrupt,
113 * are done via read-modify-write of Cause register. 119 * perf counter overflow, or both.
114 */ 120 */
115 int vpflags = dvpe(); 121 if (read_c0_cause() & (1 << 26))
116 write_c0_compare (read_c0_count() - 1); 122 perf_irq(regs);
117 clear_c0_cause(CPUCTR_IMASKBIT);
118 evpe(vpflags);
119 123
120 if (cpu_data[cpu].vpe_id == 0) { 124 if (read_c0_cause() & (1 << 30)) {
121 timer_interrupt(irq, dev_id, regs); 125 /* If timer interrupt, make it de-assert */
122 scroll_display_message(); 126 write_c0_compare (read_c0_count() - 1);
123 } else
124 write_c0_compare (read_c0_count() + ( mips_hpt_frequency/HZ));
125 smtc_timer_broadcast(cpu_data[cpu].vpe_id);
126
127 if (cpu != 0)
128 /* 127 /*
129 * Other CPUs should do profiling and process accounting 128 * DVPE is necessary so long as cross-VPE interrupts
129 * are done via read-modify-write of Cause register.
130 */ 130 */
131 local_timer_interrupt(irq, dev_id, regs); 131 vpflags = dvpe();
132 132 clear_c0_cause(CPUCTR_IMASKBIT);
133 evpe(vpflags);
134 /*
135 * There are things we only want to do once per tick
136 * in an "MP" system. One TC of each VPE will take
137 * the actual timer interrupt. The others will get
138 * timer broadcast IPIs. We use whoever it is that takes
139 * the tick on VPE 0 to run the full timer_interrupt().
140 */
141 if (cpu_data[cpu].vpe_id == 0) {
142 timer_interrupt(irq, NULL, regs);
143 smtc_timer_broadcast(cpu_data[cpu].vpe_id);
144 scroll_display_message();
145 } else {
146 write_c0_compare(read_c0_count() +
147 (mips_hpt_frequency/HZ));
148 local_timer_interrupt(irq, dev_id, regs);
149 smtc_timer_broadcast(cpu_data[cpu].vpe_id);
150 }
151 }
133#else /* CONFIG_MIPS_MT_SMTC */ 152#else /* CONFIG_MIPS_MT_SMTC */
153 int r2 = cpu_has_mips_r2;
154
134 if (cpu == 0) { 155 if (cpu == 0) {
135 /* 156 /*
136 * CPU 0 handles the global timer interrupt job and process 157 * CPU 0 handles the global timer interrupt job and process
@@ -161,9 +182,8 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
161 */ 182 */
162 local_timer_interrupt(irq, dev_id, regs); 183 local_timer_interrupt(irq, dev_id, regs);
163 } 184 }
164#endif /* CONFIG_MIPS_MT_SMTC */
165
166out: 185out:
186#endif /* CONFIG_MIPS_MT_SMTC */
167 return IRQ_HANDLED; 187 return IRQ_HANDLED;
168} 188}
169 189
diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c
index bb041a22f20a..e1f35ef81145 100644
--- a/arch/mips/mm/c-r3k.c
+++ b/arch/mips/mm/c-r3k.c
@@ -335,7 +335,7 @@ void __init r3k_cache_init(void)
335 flush_cache_mm = r3k_flush_cache_mm; 335 flush_cache_mm = r3k_flush_cache_mm;
336 flush_cache_range = r3k_flush_cache_range; 336 flush_cache_range = r3k_flush_cache_range;
337 flush_cache_page = r3k_flush_cache_page; 337 flush_cache_page = r3k_flush_cache_page;
338 flush_icache_page = r3k_flush_icache_page; 338 __flush_icache_page = r3k_flush_icache_page;
339 flush_icache_range = r3k_flush_icache_range; 339 flush_icache_range = r3k_flush_icache_range;
340 340
341 flush_cache_sigtramp = r3k_flush_cache_sigtramp; 341 flush_cache_sigtramp = r3k_flush_cache_sigtramp;
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 069803f58f3b..0b2da53750bd 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -89,7 +89,7 @@ static inline void r4k_blast_dcache_page_dc32(unsigned long addr)
89 blast_dcache32_page(addr); 89 blast_dcache32_page(addr);
90} 90}
91 91
92static inline void r4k_blast_dcache_page_setup(void) 92static void __init r4k_blast_dcache_page_setup(void)
93{ 93{
94 unsigned long dc_lsize = cpu_dcache_line_size(); 94 unsigned long dc_lsize = cpu_dcache_line_size();
95 95
@@ -103,7 +103,7 @@ static inline void r4k_blast_dcache_page_setup(void)
103 103
104static void (* r4k_blast_dcache_page_indexed)(unsigned long addr); 104static void (* r4k_blast_dcache_page_indexed)(unsigned long addr);
105 105
106static inline void r4k_blast_dcache_page_indexed_setup(void) 106static void __init r4k_blast_dcache_page_indexed_setup(void)
107{ 107{
108 unsigned long dc_lsize = cpu_dcache_line_size(); 108 unsigned long dc_lsize = cpu_dcache_line_size();
109 109
@@ -117,7 +117,7 @@ static inline void r4k_blast_dcache_page_indexed_setup(void)
117 117
118static void (* r4k_blast_dcache)(void); 118static void (* r4k_blast_dcache)(void);
119 119
120static inline void r4k_blast_dcache_setup(void) 120static void __init r4k_blast_dcache_setup(void)
121{ 121{
122 unsigned long dc_lsize = cpu_dcache_line_size(); 122 unsigned long dc_lsize = cpu_dcache_line_size();
123 123
@@ -202,7 +202,7 @@ static inline void tx49_blast_icache32_page_indexed(unsigned long page)
202 202
203static void (* r4k_blast_icache_page)(unsigned long addr); 203static void (* r4k_blast_icache_page)(unsigned long addr);
204 204
205static inline void r4k_blast_icache_page_setup(void) 205static void __init r4k_blast_icache_page_setup(void)
206{ 206{
207 unsigned long ic_lsize = cpu_icache_line_size(); 207 unsigned long ic_lsize = cpu_icache_line_size();
208 208
@@ -219,7 +219,7 @@ static inline void r4k_blast_icache_page_setup(void)
219 219
220static void (* r4k_blast_icache_page_indexed)(unsigned long addr); 220static void (* r4k_blast_icache_page_indexed)(unsigned long addr);
221 221
222static inline void r4k_blast_icache_page_indexed_setup(void) 222static void __init r4k_blast_icache_page_indexed_setup(void)
223{ 223{
224 unsigned long ic_lsize = cpu_icache_line_size(); 224 unsigned long ic_lsize = cpu_icache_line_size();
225 225
@@ -243,7 +243,7 @@ static inline void r4k_blast_icache_page_indexed_setup(void)
243 243
244static void (* r4k_blast_icache)(void); 244static void (* r4k_blast_icache)(void);
245 245
246static inline void r4k_blast_icache_setup(void) 246static void __init r4k_blast_icache_setup(void)
247{ 247{
248 unsigned long ic_lsize = cpu_icache_line_size(); 248 unsigned long ic_lsize = cpu_icache_line_size();
249 249
@@ -264,7 +264,7 @@ static inline void r4k_blast_icache_setup(void)
264 264
265static void (* r4k_blast_scache_page)(unsigned long addr); 265static void (* r4k_blast_scache_page)(unsigned long addr);
266 266
267static inline void r4k_blast_scache_page_setup(void) 267static void __init r4k_blast_scache_page_setup(void)
268{ 268{
269 unsigned long sc_lsize = cpu_scache_line_size(); 269 unsigned long sc_lsize = cpu_scache_line_size();
270 270
@@ -282,7 +282,7 @@ static inline void r4k_blast_scache_page_setup(void)
282 282
283static void (* r4k_blast_scache_page_indexed)(unsigned long addr); 283static void (* r4k_blast_scache_page_indexed)(unsigned long addr);
284 284
285static inline void r4k_blast_scache_page_indexed_setup(void) 285static void __init r4k_blast_scache_page_indexed_setup(void)
286{ 286{
287 unsigned long sc_lsize = cpu_scache_line_size(); 287 unsigned long sc_lsize = cpu_scache_line_size();
288 288
@@ -300,7 +300,7 @@ static inline void r4k_blast_scache_page_indexed_setup(void)
300 300
301static void (* r4k_blast_scache)(void); 301static void (* r4k_blast_scache)(void);
302 302
303static inline void r4k_blast_scache_setup(void) 303static void __init r4k_blast_scache_setup(void)
304{ 304{
305 unsigned long sc_lsize = cpu_scache_line_size(); 305 unsigned long sc_lsize = cpu_scache_line_size();
306 306
@@ -475,7 +475,7 @@ static inline void local_r4k_flush_cache_page(void *args)
475 } 475 }
476 } 476 }
477 if (exec) { 477 if (exec) {
478 if (cpu_has_vtag_icache) { 478 if (cpu_has_vtag_icache && mm == current->active_mm) {
479 int cpu = smp_processor_id(); 479 int cpu = smp_processor_id();
480 480
481 if (cpu_context(cpu, mm) != 0) 481 if (cpu_context(cpu, mm) != 0)
@@ -599,7 +599,7 @@ static inline void local_r4k_flush_icache_page(void *args)
599 * We're not sure of the virtual address(es) involved here, so 599 * We're not sure of the virtual address(es) involved here, so
600 * we have to flush the entire I-cache. 600 * we have to flush the entire I-cache.
601 */ 601 */
602 if (cpu_has_vtag_icache) { 602 if (cpu_has_vtag_icache && vma->vm_mm == current->active_mm) {
603 int cpu = smp_processor_id(); 603 int cpu = smp_processor_id();
604 604
605 if (cpu_context(cpu, vma->vm_mm) != 0) 605 if (cpu_context(cpu, vma->vm_mm) != 0)
@@ -1221,7 +1221,7 @@ void au1x00_fixup_config_od(void)
1221 } 1221 }
1222} 1222}
1223 1223
1224static inline void coherency_setup(void) 1224static void __init coherency_setup(void)
1225{ 1225{
1226 change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT); 1226 change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT);
1227 1227
@@ -1242,7 +1242,7 @@ static inline void coherency_setup(void)
1242 clear_c0_config(CONF_CU); 1242 clear_c0_config(CONF_CU);
1243 break; 1243 break;
1244 /* 1244 /*
1245 * We need to catch the ealry Alchemy SOCs with 1245 * We need to catch the early Alchemy SOCs with
1246 * the write-only co_config.od bit and set it back to one... 1246 * the write-only co_config.od bit and set it back to one...
1247 */ 1247 */
1248 case CPU_AU1000: /* rev. DA, HA, HB */ 1248 case CPU_AU1000: /* rev. DA, HA, HB */
@@ -1291,7 +1291,7 @@ void __init r4k_cache_init(void)
1291 __flush_cache_all = r4k___flush_cache_all; 1291 __flush_cache_all = r4k___flush_cache_all;
1292 flush_cache_mm = r4k_flush_cache_mm; 1292 flush_cache_mm = r4k_flush_cache_mm;
1293 flush_cache_page = r4k_flush_cache_page; 1293 flush_cache_page = r4k_flush_cache_page;
1294 flush_icache_page = r4k_flush_icache_page; 1294 __flush_icache_page = r4k_flush_icache_page;
1295 flush_cache_range = r4k_flush_cache_range; 1295 flush_cache_range = r4k_flush_cache_range;
1296 1296
1297 flush_cache_sigtramp = r4k_flush_cache_sigtramp; 1297 flush_cache_sigtramp = r4k_flush_cache_sigtramp;
diff --git a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c
index 2d71efb82ac5..16bad7c0a63f 100644
--- a/arch/mips/mm/c-sb1.c
+++ b/arch/mips/mm/c-sb1.c
@@ -155,6 +155,26 @@ static inline void __sb1_flush_icache_all(void)
155} 155}
156 156
157/* 157/*
158 * Invalidate a range of the icache. The addresses are virtual, and
159 * the cache is virtually indexed and tagged. However, we don't
160 * necessarily have the right ASID context, so use index ops instead
161 * of hit ops.
162 */
163static inline void __sb1_flush_icache_range(unsigned long start,
164 unsigned long end)
165{
166 start &= ~(icache_line_size - 1);
167 end = (end + icache_line_size - 1) & ~(icache_line_size - 1);
168
169 while (start != end) {
170 cache_set_op(Index_Invalidate_I, start & icache_index_mask);
171 start += icache_line_size;
172 }
173 mispredict();
174 sync();
175}
176
177/*
158 * Flush the icache for a given physical page. Need to writeback the 178 * Flush the icache for a given physical page. Need to writeback the
159 * dcache first, then invalidate the icache. If the page isn't 179 * dcache first, then invalidate the icache. If the page isn't
160 * executable, nothing is required. 180 * executable, nothing is required.
@@ -173,8 +193,11 @@ static void local_sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long
173 /* 193 /*
174 * Bumping the ASID is probably cheaper than the flush ... 194 * Bumping the ASID is probably cheaper than the flush ...
175 */ 195 */
176 if (cpu_context(cpu, vma->vm_mm) != 0) 196 if (vma->vm_mm == current->active_mm) {
177 drop_mmu_context(vma->vm_mm, cpu); 197 if (cpu_context(cpu, vma->vm_mm) != 0)
198 drop_mmu_context(vma->vm_mm, cpu);
199 } else
200 __sb1_flush_icache_range(addr, addr + PAGE_SIZE);
178} 201}
179 202
180#ifdef CONFIG_SMP 203#ifdef CONFIG_SMP
@@ -210,26 +233,6 @@ void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsign
210 __attribute__((alias("local_sb1_flush_cache_page"))); 233 __attribute__((alias("local_sb1_flush_cache_page")));
211#endif 234#endif
212 235
213/*
214 * Invalidate a range of the icache. The addresses are virtual, and
215 * the cache is virtually indexed and tagged. However, we don't
216 * necessarily have the right ASID context, so use index ops instead
217 * of hit ops.
218 */
219static inline void __sb1_flush_icache_range(unsigned long start,
220 unsigned long end)
221{
222 start &= ~(icache_line_size - 1);
223 end = (end + icache_line_size - 1) & ~(icache_line_size - 1);
224
225 while (start != end) {
226 cache_set_op(Index_Invalidate_I, start & icache_index_mask);
227 start += icache_line_size;
228 }
229 mispredict();
230 sync();
231}
232
233 236
234/* 237/*
235 * Invalidate all caches on this CPU 238 * Invalidate all caches on this CPU
@@ -326,9 +329,12 @@ static void local_sb1_flush_icache_page(struct vm_area_struct *vma,
326 * If there's a context, bump the ASID (cheaper than a flush, 329 * If there's a context, bump the ASID (cheaper than a flush,
327 * since we don't know VAs!) 330 * since we don't know VAs!)
328 */ 331 */
329 if (cpu_context(cpu, vma->vm_mm) != 0) { 332 if (vma->vm_mm == current->active_mm) {
330 drop_mmu_context(vma->vm_mm, cpu); 333 if (cpu_context(cpu, vma->vm_mm) != 0)
331 } 334 drop_mmu_context(vma->vm_mm, cpu);
335 } else
336 __sb1_flush_icache_range(start, start + PAGE_SIZE);
337
332} 338}
333 339
334#ifdef CONFIG_SMP 340#ifdef CONFIG_SMP
@@ -520,7 +526,7 @@ void sb1_cache_init(void)
520 526
521 /* These routines are for Icache coherence with the Dcache */ 527 /* These routines are for Icache coherence with the Dcache */
522 flush_icache_range = sb1_flush_icache_range; 528 flush_icache_range = sb1_flush_icache_range;
523 flush_icache_page = sb1_flush_icache_page; 529 __flush_icache_page = sb1_flush_icache_page;
524 flush_icache_all = __sb1_flush_icache_all; /* local only */ 530 flush_icache_all = __sb1_flush_icache_all; /* local only */
525 531
526 /* This implies an Icache flush too, so can't be nop'ed */ 532 /* This implies an Icache flush too, so can't be nop'ed */
diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index 5dfc9b1901f6..932a09d7ef84 100644
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -382,7 +382,7 @@ void __init tx39_cache_init(void)
382 flush_cache_mm = (void *) tx39h_flush_icache_all; 382 flush_cache_mm = (void *) tx39h_flush_icache_all;
383 flush_cache_range = (void *) tx39h_flush_icache_all; 383 flush_cache_range = (void *) tx39h_flush_icache_all;
384 flush_cache_page = (void *) tx39h_flush_icache_all; 384 flush_cache_page = (void *) tx39h_flush_icache_all;
385 flush_icache_page = (void *) tx39h_flush_icache_all; 385 __flush_icache_page = (void *) tx39h_flush_icache_all;
386 flush_icache_range = (void *) tx39h_flush_icache_all; 386 flush_icache_range = (void *) tx39h_flush_icache_all;
387 387
388 flush_cache_sigtramp = (void *) tx39h_flush_icache_all; 388 flush_cache_sigtramp = (void *) tx39h_flush_icache_all;
@@ -408,7 +408,7 @@ void __init tx39_cache_init(void)
408 flush_cache_mm = tx39_flush_cache_mm; 408 flush_cache_mm = tx39_flush_cache_mm;
409 flush_cache_range = tx39_flush_cache_range; 409 flush_cache_range = tx39_flush_cache_range;
410 flush_cache_page = tx39_flush_cache_page; 410 flush_cache_page = tx39_flush_cache_page;
411 flush_icache_page = tx39_flush_icache_page; 411 __flush_icache_page = tx39_flush_icache_page;
412 flush_icache_range = tx39_flush_icache_range; 412 flush_icache_range = tx39_flush_icache_range;
413 413
414 flush_cache_sigtramp = tx39_flush_cache_sigtramp; 414 flush_cache_sigtramp = tx39_flush_cache_sigtramp;
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index ddd3a2de1d73..40c8b0235183 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -25,7 +25,7 @@ void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
25void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, 25void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
26 unsigned long pfn); 26 unsigned long pfn);
27void (*flush_icache_range)(unsigned long start, unsigned long end); 27void (*flush_icache_range)(unsigned long start, unsigned long end);
28void (*flush_icache_page)(struct vm_area_struct *vma, struct page *page); 28void (*__flush_icache_page)(struct vm_area_struct *vma, struct page *page);
29 29
30/* MIPS specific cache operations */ 30/* MIPS specific cache operations */
31void (*flush_cache_sigtramp)(unsigned long addr); 31void (*flush_cache_sigtramp)(unsigned long addr);
@@ -70,6 +70,8 @@ void __flush_dcache_page(struct page *page)
70 struct address_space *mapping = page_mapping(page); 70 struct address_space *mapping = page_mapping(page);
71 unsigned long addr; 71 unsigned long addr;
72 72
73 if (PageHighMem(page))
74 return;
73 if (mapping && !mapping_mapped(mapping)) { 75 if (mapping && !mapping_mapped(mapping)) {
74 SetPageDcacheDirty(page); 76 SetPageDcacheDirty(page);
75 return; 77 return;
@@ -91,16 +93,16 @@ void __update_cache(struct vm_area_struct *vma, unsigned long address,
91{ 93{
92 struct page *page; 94 struct page *page;
93 unsigned long pfn, addr; 95 unsigned long pfn, addr;
96 int exec = (vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc;
94 97
95 pfn = pte_pfn(pte); 98 pfn = pte_pfn(pte);
96 if (pfn_valid(pfn) && (page = pfn_to_page(pfn), page_mapping(page)) && 99 if (unlikely(!pfn_valid(pfn)))
97 Page_dcache_dirty(page)) { 100 return;
98 if (pages_do_alias((unsigned long)page_address(page), 101 page = pfn_to_page(pfn);
99 address & PAGE_MASK)) { 102 if (page_mapping(page) && Page_dcache_dirty(page)) {
100 addr = (unsigned long) page_address(page); 103 addr = (unsigned long) page_address(page);
104 if (exec || pages_do_alias(addr, address & PAGE_MASK))
101 flush_data_cache_page(addr); 105 flush_data_cache_page(addr);
102 }
103
104 ClearPageDcacheDirty(page); 106 ClearPageDcacheDirty(page);
105 } 107 }
106} 108}
diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
index e3a617224868..a4f8c45c4e8e 100644
--- a/arch/mips/mm/fault.c
+++ b/arch/mips/mm/fault.c
@@ -89,7 +89,7 @@ good_area:
89 if (!(vma->vm_flags & VM_WRITE)) 89 if (!(vma->vm_flags & VM_WRITE))
90 goto bad_area; 90 goto bad_area;
91 } else { 91 } else {
92 if (!(vma->vm_flags & (VM_READ | VM_EXEC))) 92 if (!(vma->vm_flags & (VM_READ | VM_WRITE | VM_EXEC)))
93 goto bad_area; 93 goto bad_area;
94 } 94 }
95 95
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index c52497bb102a..5b06349af2d5 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -163,10 +163,10 @@ static int __init page_is_ram(unsigned long pagenr)
163 163
164void __init paging_init(void) 164void __init paging_init(void)
165{ 165{
166 unsigned long zones_size[] = { [0 ... MAX_NR_ZONES - 1] = 0 }; 166 unsigned long zones_size[] = { 0, };
167 unsigned long max_dma, high, low; 167 unsigned long max_dma, high, low;
168#ifndef CONFIG_FLATMEM 168#ifndef CONFIG_FLATMEM
169 unsigned long zholes_size[] = { [0 ... MAX_NR_ZONES - 1] = 0 }; 169 unsigned long zholes_size[] = { 0, };
170 unsigned long i, j, pfn; 170 unsigned long i, j, pfn;
171#endif 171#endif
172 172
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 2cde1b772443..2e0e21ef433e 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -26,11 +26,6 @@ extern void build_tlb_refill_handler(void);
26 */ 26 */
27#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1))) 27#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1)))
28 28
29/* CP0 hazard avoidance. */
30#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \
31 "nop; nop; nop; nop; nop; nop;\n\t" \
32 ".set reorder\n\t")
33
34/* Atomicity and interruptability */ 29/* Atomicity and interruptability */
35#ifdef CONFIG_MIPS_MT_SMTC 30#ifdef CONFIG_MIPS_MT_SMTC
36 31
@@ -126,7 +121,7 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
126 start += (PAGE_SIZE << 1); 121 start += (PAGE_SIZE << 1);
127 mtc0_tlbw_hazard(); 122 mtc0_tlbw_hazard();
128 tlb_probe(); 123 tlb_probe();
129 BARRIER; 124 tlb_probe_hazard();
130 idx = read_c0_index(); 125 idx = read_c0_index();
131 write_c0_entrylo0(0); 126 write_c0_entrylo0(0);
132 write_c0_entrylo1(0); 127 write_c0_entrylo1(0);
@@ -168,7 +163,7 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
168 start += (PAGE_SIZE << 1); 163 start += (PAGE_SIZE << 1);
169 mtc0_tlbw_hazard(); 164 mtc0_tlbw_hazard();
170 tlb_probe(); 165 tlb_probe();
171 BARRIER; 166 tlb_probe_hazard();
172 idx = read_c0_index(); 167 idx = read_c0_index();
173 write_c0_entrylo0(0); 168 write_c0_entrylo0(0);
174 write_c0_entrylo1(0); 169 write_c0_entrylo1(0);
@@ -202,7 +197,7 @@ void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
202 write_c0_entryhi(page | newpid); 197 write_c0_entryhi(page | newpid);
203 mtc0_tlbw_hazard(); 198 mtc0_tlbw_hazard();
204 tlb_probe(); 199 tlb_probe();
205 BARRIER; 200 tlb_probe_hazard();
206 idx = read_c0_index(); 201 idx = read_c0_index();
207 write_c0_entrylo0(0); 202 write_c0_entrylo0(0);
208 write_c0_entrylo1(0); 203 write_c0_entrylo1(0);
@@ -235,7 +230,7 @@ void local_flush_tlb_one(unsigned long page)
235 write_c0_entryhi(page); 230 write_c0_entryhi(page);
236 mtc0_tlbw_hazard(); 231 mtc0_tlbw_hazard();
237 tlb_probe(); 232 tlb_probe();
238 BARRIER; 233 tlb_probe_hazard();
239 idx = read_c0_index(); 234 idx = read_c0_index();
240 write_c0_entrylo0(0); 235 write_c0_entrylo0(0);
241 write_c0_entrylo1(0); 236 write_c0_entrylo1(0);
@@ -279,7 +274,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
279 pgdp = pgd_offset(vma->vm_mm, address); 274 pgdp = pgd_offset(vma->vm_mm, address);
280 mtc0_tlbw_hazard(); 275 mtc0_tlbw_hazard();
281 tlb_probe(); 276 tlb_probe();
282 BARRIER; 277 tlb_probe_hazard();
283 pudp = pud_offset(pgdp, address); 278 pudp = pud_offset(pgdp, address);
284 pmdp = pmd_offset(pudp, address); 279 pmdp = pmd_offset(pudp, address);
285 idx = read_c0_index(); 280 idx = read_c0_index();
@@ -320,7 +315,7 @@ static void r4k_update_mmu_cache_hwbug(struct vm_area_struct * vma,
320 pgdp = pgd_offset(vma->vm_mm, address); 315 pgdp = pgd_offset(vma->vm_mm, address);
321 mtc0_tlbw_hazard(); 316 mtc0_tlbw_hazard();
322 tlb_probe(); 317 tlb_probe();
323 BARRIER; 318 tlb_probe_hazard();
324 pmdp = pmd_offset(pgdp, address); 319 pmdp = pmd_offset(pgdp, address);
325 idx = read_c0_index(); 320 idx = read_c0_index();
326 ptep = pte_offset_map(pmdp, address); 321 ptep = pte_offset_map(pmdp, address);
@@ -351,7 +346,7 @@ void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
351 wired = read_c0_wired(); 346 wired = read_c0_wired();
352 write_c0_wired(wired + 1); 347 write_c0_wired(wired + 1);
353 write_c0_index(wired); 348 write_c0_index(wired);
354 BARRIER; 349 tlbw_use_hazard(); /* What is the hazard here? */
355 write_c0_pagemask(pagemask); 350 write_c0_pagemask(pagemask);
356 write_c0_entryhi(entryhi); 351 write_c0_entryhi(entryhi);
357 write_c0_entrylo0(entrylo0); 352 write_c0_entrylo0(entrylo0);
@@ -361,7 +356,7 @@ void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
361 tlbw_use_hazard(); 356 tlbw_use_hazard();
362 357
363 write_c0_entryhi(old_ctx); 358 write_c0_entryhi(old_ctx);
364 BARRIER; 359 tlbw_use_hazard(); /* What is the hazard here? */
365 write_c0_pagemask(old_pagemask); 360 write_c0_pagemask(old_pagemask);
366 local_flush_tlb_all(); 361 local_flush_tlb_all();
367 EXIT_CRITICAL(flags); 362 EXIT_CRITICAL(flags);
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 35d5927706ea..edefa97b2330 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -11,7 +11,6 @@ obj-$(CONFIG_ITE_BOARD_GEN) += ops-it8172.o
11obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o 11obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
12obj-$(CONFIG_MIPS_GT64111) += ops-gt64111.o 12obj-$(CONFIG_MIPS_GT64111) += ops-gt64111.o
13obj-$(CONFIG_MIPS_GT64120) += ops-gt64120.o 13obj-$(CONFIG_MIPS_GT64120) += ops-gt64120.o
14obj-$(CONFIG_MIPS_GT96100) += ops-gt96100.o
15obj-$(CONFIG_PCI_MARVELL) += ops-marvell.o 14obj-$(CONFIG_PCI_MARVELL) += ops-marvell.o
16obj-$(CONFIG_MIPS_MSC) += ops-msc.o 15obj-$(CONFIG_MIPS_MSC) += ops-msc.o
17obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o 16obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
@@ -28,8 +27,7 @@ obj-$(CONFIG_DDB5477) += fixup-ddb5477.o pci-ddb5477.o ops-ddb5477.o
28obj-$(CONFIG_LASAT) += pci-lasat.o 27obj-$(CONFIG_LASAT) += pci-lasat.o
29obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o 28obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
30obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o 29obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
31obj-$(CONFIG_MIPS_EV96100) += fixup-ev64120.o 30obj-$(CONFIG_MIPS_EV64120) += fixup-ev64120.o
32obj-$(CONFIG_MIPS_EV96100) += fixup-ev96100.o pci-ev96100.o
33obj-$(CONFIG_MIPS_ITE8172) += fixup-ite8172g.o 31obj-$(CONFIG_MIPS_ITE8172) += fixup-ite8172g.o
34obj-$(CONFIG_MIPS_IVR) += fixup-ivr.o 32obj-$(CONFIG_MIPS_IVR) += fixup-ivr.o
35obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o 33obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o
diff --git a/arch/mips/pci/fixup-atlas.c b/arch/mips/pci/fixup-atlas.c
index 439510af3037..c6cd6e9cdfbc 100644
--- a/arch/mips/pci/fixup-atlas.c
+++ b/arch/mips/pci/fixup-atlas.c
@@ -21,16 +21,16 @@
21 21
22#include <asm/mips-boards/atlasint.h> 22#include <asm/mips-boards/atlasint.h>
23 23
24#define PCIA ATLASINT_PCIA 24#define PCIA ATLAS_INT_PCIA
25#define PCIB ATLASINT_PCIB 25#define PCIB ATLAS_INT_PCIB
26#define PCIC ATLASINT_PCIC 26#define PCIC ATLAS_INT_PCIC
27#define PCID ATLASINT_PCID 27#define PCID ATLAS_INT_PCID
28#define INTA ATLASINT_INTA 28#define INTA ATLAS_INT_INTA
29#define INTB ATLASINT_INTB 29#define INTB ATLAS_INT_INTB
30#define ETH ATLASINT_ETH 30#define ETH ATLAS_INT_ETH
31#define INTC ATLASINT_INTC 31#define INTC ATLAS_INT_INTC
32#define SCSI ATLASINT_SCSI 32#define SCSI ATLAS_INT_SCSI
33#define INTD ATLASINT_INTD 33#define INTD ATLAS_INT_INTD
34 34
35static char irq_tab[][5] __initdata = { 35static char irq_tab[][5] __initdata = {
36 /* INTA INTB INTC INTD */ 36 /* INTA INTB INTC INTD */
diff --git a/arch/mips/pci/fixup-ev96100.c b/arch/mips/pci/fixup-ev96100.c
deleted file mode 100644
index e2bc977b6d58..000000000000
--- a/arch/mips/pci/fixup-ev96100.c
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * EV96100 Board specific pci fixups.
5 *
6 * Copyright 2001 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * ppopov@mvista.com or source@mvista.com
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30#include <linux/init.h>
31#include <linux/types.h>
32#include <linux/pci.h>
33
34static char irq_tab_ev96100[][5] __initdata = {
35 [8] = { 0, 5, 5, 5, 5 },
36 [9] = { 0, 2, 2, 2, 2 }
37};
38
39int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
40{
41 return irq_tab_ev96100[slot][pin];
42}
43
44/* Do platform specific device initialization at pci_enable_device() time */
45int pcibios_plat_dev_init(struct pci_dev *dev)
46{
47 return 0;
48}
diff --git a/arch/mips/pci/ops-au1000.c b/arch/mips/pci/ops-au1000.c
index 0c0c1e6519f9..8ae46481fcb7 100644
--- a/arch/mips/pci/ops-au1000.c
+++ b/arch/mips/pci/ops-au1000.c
@@ -110,7 +110,7 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
110 if (first_cfg) { 110 if (first_cfg) {
111 /* reserve a wired entry for pci config accesses */ 111 /* reserve a wired entry for pci config accesses */
112 first_cfg = 0; 112 first_cfg = 0;
113 pci_cfg_vm = get_vm_area(0x2000, 0); 113 pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP);
114 if (!pci_cfg_vm) 114 if (!pci_cfg_vm)
115 panic (KERN_ERR "PCI unable to get vm area\n"); 115 panic (KERN_ERR "PCI unable to get vm area\n");
116 pci_cfg_wired_entry = read_c0_wired(); 116 pci_cfg_wired_entry = read_c0_wired();
diff --git a/arch/mips/pci/ops-gt96100.c b/arch/mips/pci/ops-gt96100.c
deleted file mode 100644
index 9e4ea6627e21..000000000000
--- a/arch/mips/pci/ops-gt96100.c
+++ /dev/null
@@ -1,169 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Galileo EV96100 board specific pci support.
5 *
6 * Copyright 2000 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * ppopov@mvista.com or source@mvista.com
9 *
10 * This file was derived from Carsten Langgaard's
11 * arch/mips/mips-boards/generic/pci.c
12 *
13 * Carsten Langgaard, carstenl@mips.com
14 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
15 *
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the
18 * Free Software Foundation; either version 2 of the License, or (at your
19 * option) any later version.
20 *
21 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
22 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
24 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
28 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * You should have received a copy of the GNU General Public License along
33 * with this program; if not, write to the Free Software Foundation, Inc.,
34 * 675 Mass Ave, Cambridge, MA 02139, USA.
35 */
36#include <linux/types.h>
37#include <linux/pci.h>
38#include <linux/kernel.h>
39#include <linux/init.h>
40
41#include <asm/delay.h>
42#include <asm/gt64120.h>
43#include <asm/galileo-boards/ev96100.h>
44
45#define PCI_ACCESS_READ 0
46#define PCI_ACCESS_WRITE 1
47
48static int static gt96100_config_access(unsigned char access_type,
49 struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
50{
51 unsigned char bus = bus->number;
52 u32 intr;
53
54 /*
55 * Because of a bug in the galileo (for slot 31).
56 */
57 if (bus == 0 && devfn >= PCI_DEVFN(31, 0))
58 return PCIBIOS_DEVICE_NOT_FOUND;
59
60 /* Clear cause register bits */
61 GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
62 GT_INTRCAUSE_TARABORT0_BIT));
63
64 /* Setup address */
65 GT_WRITE(GT_PCI0_CFGADDR_OFS,
66 (bus << GT_PCI0_CFGADDR_BUSNUM_SHF) |
67 (devfn << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
68 ((where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
69 GT_PCI0_CFGADDR_CONFIGEN_BIT);
70 udelay(2);
71
72
73 if (access_type == PCI_ACCESS_WRITE) {
74 if (devfn != 0)
75 *data = le32_to_cpu(*data);
76 GT_WRITE(GT_PCI0_CFGDATA_OFS, *data);
77 } else {
78 *data = GT_READ(GT_PCI0_CFGDATA_OFS);
79 if (devfn != 0)
80 *data = le32_to_cpu(*data);
81 }
82
83 udelay(2);
84
85 /* Check for master or target abort */
86 intr = GT_READ(GT_INTRCAUSE_OFS);
87
88 if (intr & (GT_INTRCAUSE_MASABORT0_BIT | GT_INTRCAUSE_TARABORT0_BIT)) {
89 /* Error occured */
90
91 /* Clear bits */
92 GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
93 GT_INTRCAUSE_TARABORT0_BIT));
94 return -1;
95 }
96 return 0;
97}
98
99/*
100 * We can't address 8 and 16 bit words directly. Instead we have to
101 * read/write a 32bit word and mask/modify the data we actually want.
102 */
103static int gt96100_pcibios_read(struct pci_bus *bus, unsigned int devfn,
104 int where, int size, u32 * val)
105{
106 u32 data = 0;
107
108 if (gt96100_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
109 return PCIBIOS_DEVICE_NOT_FOUND;
110
111 switch (size) {
112 case 1:
113 *val = (data >> ((where & 3) << 3)) & 0xff;
114 break;
115
116 case 2:
117 *val = (data >> ((where & 3) << 3)) & 0xffff;
118 break;
119
120 case 4:
121 *val = data;
122 break;
123 }
124 return PCIBIOS_SUCCESSFUL;
125}
126
127static int gt96100_pcibios_write(struct pci_bus *bus, unsigned int devfn,
128 int where, int size, u32 val)
129{
130 u32 data = 0;
131
132 switch (size) {
133 case 1:
134 if (gt96100_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
135 return -1;
136
137 data = (data & ~(0xff << ((where & 3) << 3))) |
138 (val << ((where & 3) << 3));
139
140 if (gt96100_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
141 return -1;
142
143 return PCIBIOS_SUCCESSFUL;
144
145 case 2:
146 if (gt96100_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
147 return -1;
148
149 data = (data & ~(0xffff << ((where & 3) << 3))) |
150 (val << ((where & 3) << 3));
151
152 if (gt96100_config_access(PCI_ACCESS_WRITE, dev, where, &data))
153 return -1;
154
155
156 return PCIBIOS_SUCCESSFUL;
157
158 case 4:
159 if (gt96100_config_access(PCI_ACCESS_WRITE, dev, where, &val))
160 return -1;
161
162 return PCIBIOS_SUCCESSFUL;
163 }
164}
165
166struct pci_ops gt96100_pci_ops = {
167 .read = gt96100_pcibios_read,
168 .write = gt96100_pcibios_write
169};
diff --git a/arch/mips/pci/pci-ev96100.c b/arch/mips/pci/pci-ev96100.c
deleted file mode 100644
index f9457ea00def..000000000000
--- a/arch/mips/pci/pci-ev96100.c
+++ /dev/null
@@ -1,63 +0,0 @@
1/*
2 * Copyright 2000 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc.
4 * ppopov@mvista.com or source@mvista.com
5 *
6 * Carsten Langgaard, carstenl@mips.com
7 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
8 *
9 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
19 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
22 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
23 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 * You should have received a copy of the GNU General Public License along
28 * with this program; if not, write to the Free Software Foundation, Inc.,
29 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 */
31#include <linux/types.h>
32#include <linux/pci.h>
33#include <linux/kernel.h>
34#include <linux/init.h>
35
36static struct resource pci_io_resource = {
37 .name = "io pci IO space",
38 .start = 0x10000000,
39 .end = 0x11ffffff,
40 .flags = IORESOURCE_IO
41};
42
43static struct resource pci_mem_resource = {
44 .name = "ext pci memory space",
45 .start = 0x12000000,
46 .end = 0x13ffffff,
47 .flags = IORESOURCE_MEM
48};
49
50extern struct pci_ops gt96100_pci_ops;
51
52struct pci_controller ev96100_controller = {
53 .pci_ops = &gt96100_pci_ops,
54 .io_resource = &pci_io_resource,
55 .mem_resource = &pci_mem_resource,
56};
57
58static void ev96100_pci_init(void)
59{
60 register_pci_controller(&ev96100_controller);
61}
62
63arch_initcall(ev96100_pci_init);
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index 80eb9af9ecdf..405ce0152739 100644
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -16,8 +16,6 @@
16#include <asm/sn/intr.h> 16#include <asm/sn/intr.h>
17#include <asm/sn/sn0/hub.h> 17#include <asm/sn/sn0/hub.h>
18 18
19extern unsigned int allocate_irqno(void);
20
21/* 19/*
22 * Max #PCI busses we can handle; ie, max #PCI bridges. 20 * Max #PCI busses we can handle; ie, max #PCI bridges.
23 */ 21 */
diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c
index efe6971fc800..16e5682b01f1 100644
--- a/arch/mips/sgi-ip27/ip27-memory.c
+++ b/arch/mips/sgi-ip27/ip27-memory.c
@@ -19,6 +19,7 @@
19#include <linux/swap.h> 19#include <linux/swap.h>
20#include <linux/bootmem.h> 20#include <linux/bootmem.h>
21#include <linux/pfn.h> 21#include <linux/pfn.h>
22#include <linux/highmem.h>
22#include <asm/page.h> 23#include <asm/page.h>
23#include <asm/sections.h> 24#include <asm/sections.h>
24 25
@@ -508,7 +509,7 @@ extern unsigned long setup_zero_pages(void);
508 509
509void __init paging_init(void) 510void __init paging_init(void)
510{ 511{
511 unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0}; 512 unsigned long zones_size[MAX_NR_ZONES] = {0, };
512 unsigned node; 513 unsigned node;
513 514
514 pagetable_init(); 515 pagetable_init();
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index ed325f0ab28a..a0222fa4416c 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -469,21 +469,6 @@ void bcm1480_kgdb_interrupt(struct pt_regs *regs)
469 469
470#endif /* CONFIG_KGDB */ 470#endif /* CONFIG_KGDB */
471 471
472static inline int dclz(unsigned long long x)
473{
474 int lz;
475
476 __asm__ (
477 " .set push \n"
478 " .set mips64 \n"
479 " dclz %0, %1 \n"
480 " .set pop \n"
481 : "=r" (lz)
482 : "r" (x));
483
484 return lz;
485}
486
487extern void bcm1480_timer_interrupt(struct pt_regs *regs); 472extern void bcm1480_timer_interrupt(struct pt_regs *regs);
488extern void bcm1480_mailbox_interrupt(struct pt_regs *regs); 473extern void bcm1480_mailbox_interrupt(struct pt_regs *regs);
489extern void bcm1480_kgdb_interrupt(struct pt_regs *regs); 474extern void bcm1480_kgdb_interrupt(struct pt_regs *regs);
@@ -536,9 +521,9 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
536 521
537 if (mask_h) { 522 if (mask_h) {
538 if (mask_h ^ 1) 523 if (mask_h ^ 1)
539 do_IRQ(63 - dclz(mask_h), regs); 524 do_IRQ(fls64(mask_h) - 1, regs);
540 else 525 else
541 do_IRQ(127 - dclz(mask_l), regs); 526 do_IRQ(63 + fls64(mask_l), regs);
542 } 527 }
543 } 528 }
544} 529}
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index 1de71adec6c6..a451b4c7732d 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -419,21 +419,6 @@ static void sb1250_kgdb_interrupt(struct pt_regs *regs)
419 419
420#endif /* CONFIG_KGDB */ 420#endif /* CONFIG_KGDB */
421 421
422static inline int dclz(unsigned long long x)
423{
424 int lz;
425
426 __asm__ (
427 " .set push \n"
428 " .set mips64 \n"
429 " dclz %0, %1 \n"
430 " .set pop \n"
431 : "=r" (lz)
432 : "r" (x));
433
434 return lz;
435}
436
437extern void sb1250_timer_interrupt(struct pt_regs *regs); 422extern void sb1250_timer_interrupt(struct pt_regs *regs);
438extern void sb1250_mailbox_interrupt(struct pt_regs *regs); 423extern void sb1250_mailbox_interrupt(struct pt_regs *regs);
439extern void sb1250_kgdb_interrupt(struct pt_regs *regs); 424extern void sb1250_kgdb_interrupt(struct pt_regs *regs);
@@ -490,6 +475,6 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
490 mask = __raw_readq(IOADDR(A_IMR_REGISTER(smp_processor_id(), 475 mask = __raw_readq(IOADDR(A_IMR_REGISTER(smp_processor_id(),
491 R_IMR_INTERRUPT_STATUS_BASE))); 476 R_IMR_INTERRUPT_STATUS_BASE)));
492 if (mask) 477 if (mask)
493 do_IRQ(63 - dclz(mask), regs); 478 do_IRQ(fls64(mask) - 1, regs);
494 } 479 }
495} 480}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-21 23:21:44 -0500