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-rw-r--r--arch/mips/include/asm/mach-loongson/loongson.h14
-rw-r--r--arch/mips/loongson/Kconfig5
-rw-r--r--arch/mips/loongson/common/Makefile5
-rw-r--r--arch/mips/loongson/common/init.c2
-rw-r--r--arch/mips/loongson/common/serial.c10
-rw-r--r--arch/mips/loongson/common/uart_base.c41
6 files changed, 51 insertions, 26 deletions
diff --git a/arch/mips/include/asm/mach-loongson/loongson.h b/arch/mips/include/asm/mach-loongson/loongson.h
index 06c28f387116..ee8bc8376972 100644
--- a/arch/mips/include/asm/mach-loongson/loongson.h
+++ b/arch/mips/include/asm/mach-loongson/loongson.h
@@ -31,9 +31,17 @@ extern void __init prom_init_memory(void);
31extern void __init prom_init_cmdline(void); 31extern void __init prom_init_cmdline(void);
32extern void __init prom_init_machtype(void); 32extern void __init prom_init_machtype(void);
33extern void __init prom_init_env(void); 33extern void __init prom_init_env(void);
34extern unsigned long _loongson_uart_base; 34#ifdef CONFIG_LOONGSON_UART_BASE
35extern unsigned long uart8250_base[]; 35extern unsigned long _loongson_uart_base, loongson_uart_base;
36extern void prom_init_uart_base(void); 36extern void prom_init_loongson_uart_base(void);
37#endif
38
39static inline void prom_init_uart_base(void)
40{
41#ifdef CONFIG_LOONGSON_UART_BASE
42 prom_init_loongson_uart_base();
43#endif
44}
37 45
38/* irq operation functions */ 46/* irq operation functions */
39extern void bonito_irqdispatch(void); 47extern void bonito_irqdispatch(void);
diff --git a/arch/mips/loongson/Kconfig b/arch/mips/loongson/Kconfig
index 7a86987b478f..3df1967dea08 100644
--- a/arch/mips/loongson/Kconfig
+++ b/arch/mips/loongson/Kconfig
@@ -78,3 +78,8 @@ config LOONGSON_SUSPEND
78 bool 78 bool
79 default y 79 default y
80 depends on CPU_SUPPORTS_CPUFREQ && SUSPEND 80 depends on CPU_SUPPORTS_CPUFREQ && SUSPEND
81
82config LOONGSON_UART_BASE
83 bool
84 default y
85 depends on EARLY_PRINTK || SERIAL_8250
diff --git a/arch/mips/loongson/common/Makefile b/arch/mips/loongson/common/Makefile
index 8d71892413df..7668c4de1151 100644
--- a/arch/mips/loongson/common/Makefile
+++ b/arch/mips/loongson/common/Makefile
@@ -3,13 +3,14 @@
3# 3#
4 4
5obj-y += setup.o init.o cmdline.o env.o time.o reset.o irq.o \ 5obj-y += setup.o init.o cmdline.o env.o time.o reset.o irq.o \
6 pci.o bonito-irq.o mem.o machtype.o platform.o uart_base.o 6 pci.o bonito-irq.o mem.o machtype.o platform.o
7 7
8# 8#
9# Early printk support 9# Serial port support
10# 10#
11obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 11obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
12obj-$(CONFIG_SERIAL_8250) += serial.o 12obj-$(CONFIG_SERIAL_8250) += serial.o
13obj-$(CONFIG_LOONGSON_UART_BASE) += uart_base.o
13 14
14# 15#
15# Enable CS5536 Virtual Support Module(VSM) to virtulize the PCI configure 16# Enable CS5536 Virtual Support Module(VSM) to virtulize the PCI configure
diff --git a/arch/mips/loongson/common/init.c b/arch/mips/loongson/common/init.c
index 2b92a23d29dd..a2abd9355737 100644
--- a/arch/mips/loongson/common/init.c
+++ b/arch/mips/loongson/common/init.c
@@ -31,9 +31,7 @@ void __init prom_init(void)
31 prom_init_memory(); 31 prom_init_memory();
32 32
33 /*init the uart base address */ 33 /*init the uart base address */
34#if defined(CONFIG_EARLY_PRINTK) || defined(CONFIG_SERIAL_8250)
35 prom_init_uart_base(); 34 prom_init_uart_base();
36#endif
37} 35}
38 36
39void __init prom_free_prom_memory(void) 37void __init prom_free_prom_memory(void)
diff --git a/arch/mips/loongson/common/serial.c b/arch/mips/loongson/common/serial.c
index ea29db099aee..23b66a5f88cb 100644
--- a/arch/mips/loongson/common/serial.c
+++ b/arch/mips/loongson/common/serial.c
@@ -57,12 +57,16 @@ static struct platform_device uart8250_device = {
57 57
58static int __init serial_init(void) 58static int __init serial_init(void)
59{ 59{
60 if (uart8250_data[mips_machtype][0].iotype == UPIO_MEM) 60 unsigned char iotype;
61
62 iotype = uart8250_data[mips_machtype][0].iotype;
63
64 if (UPIO_MEM == iotype)
61 uart8250_data[mips_machtype][0].membase = 65 uart8250_data[mips_machtype][0].membase =
62 (void __iomem *)_loongson_uart_base; 66 (void __iomem *)_loongson_uart_base;
63 else if (uart8250_data[mips_machtype][0].iotype == UPIO_PORT) 67 else if (UPIO_PORT == iotype)
64 uart8250_data[mips_machtype][0].iobase = 68 uart8250_data[mips_machtype][0].iobase =
65 uart8250_base[mips_machtype] - LOONGSON_PCIIO_BASE; 69 loongson_uart_base - LOONGSON_PCIIO_BASE;
66 70
67 uart8250_device.dev.platform_data = uart8250_data[mips_machtype]; 71 uart8250_device.dev.platform_data = uart8250_data[mips_machtype];
68 72
diff --git a/arch/mips/loongson/common/uart_base.c b/arch/mips/loongson/common/uart_base.c
index 1d636f4f7505..78ff66ae749e 100644
--- a/arch/mips/loongson/common/uart_base.c
+++ b/arch/mips/loongson/common/uart_base.c
@@ -13,24 +13,33 @@
13 13
14#include <loongson.h> 14#include <loongson.h>
15 15
16unsigned long __maybe_unused _loongson_uart_base; 16/* ioremapped */
17unsigned long _loongson_uart_base;
17EXPORT_SYMBOL(_loongson_uart_base); 18EXPORT_SYMBOL(_loongson_uart_base);
19/* raw */
20unsigned long loongson_uart_base;
21EXPORT_SYMBOL(loongson_uart_base);
18 22
19unsigned long __maybe_unused uart8250_base[] = { 23void prom_init_loongson_uart_base(void)
20 [MACH_LOONGSON_UNKNOWN] 0,
21 [MACH_LEMOTE_FL2E] (LOONGSON_PCIIO_BASE + 0x3f8),
22 [MACH_LEMOTE_FL2F] (LOONGSON_PCIIO_BASE + 0x2f8),
23 [MACH_LEMOTE_ML2F7] (LOONGSON_LIO1_BASE + 0x3f8),
24 [MACH_LEMOTE_YL2F89] (LOONGSON_LIO1_BASE + 0x3f8),
25 [MACH_DEXXON_GDIUM2F10] (LOONGSON_LIO1_BASE + 0x3f8),
26 [MACH_LEMOTE_NAS] (LOONGSON_LIO1_BASE + 0x3f8),
27 [MACH_LEMOTE_LL2F] (LOONGSON_PCIIO_BASE + 0x2f8),
28 [MACH_LOONGSON_END] 0,
29};
30EXPORT_SYMBOL(uart8250_base);
31
32void __maybe_unused prom_init_uart_base(void)
33{ 24{
25 switch (mips_machtype) {
26 case MACH_LEMOTE_FL2E:
27 loongson_uart_base = LOONGSON_PCIIO_BASE + 0x3f8;
28 break;
29 case MACH_LEMOTE_FL2F:
30 case MACH_LEMOTE_LL2F:
31 loongson_uart_base = LOONGSON_PCIIO_BASE + 0x2f8;
32 break;
33 case MACH_LEMOTE_ML2F7:
34 case MACH_LEMOTE_YL2F89:
35 case MACH_DEXXON_GDIUM2F10:
36 case MACH_LEMOTE_NAS:
37 default:
38 /* The CPU provided serial port */
39 loongson_uart_base = LOONGSON_LIO1_BASE + 0x3f8;
40 break;
41 }
42
34 _loongson_uart_base = 43 _loongson_uart_base =
35 (unsigned long)ioremap_nocache(uart8250_base[mips_machtype], 8); 44 (unsigned long)ioremap_nocache(loongson_uart_base, 8);
36} 45}