aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/alchemy/common/platform.c183
-rw-r--r--arch/mips/include/asm/mach-au1x00/au1000.h55
2 files changed, 75 insertions, 163 deletions
diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c
index 15d9b2f14262..910a3bde9a52 100644
--- a/arch/mips/alchemy/common/platform.c
+++ b/arch/mips/alchemy/common/platform.c
@@ -111,34 +111,84 @@ static void __init alchemy_setup_uarts(int ctype)
111 printk(KERN_INFO "Alchemy: failed to register UARTs\n"); 111 printk(KERN_INFO "Alchemy: failed to register UARTs\n");
112} 112}
113 113
114/* OHCI (USB full speed host controller) */
115static struct resource au1xxx_usb_ohci_resources[] = {
116 [0] = {
117 .start = USB_OHCI_BASE,
118 .end = USB_OHCI_BASE + USB_OHCI_LEN - 1,
119 .flags = IORESOURCE_MEM,
120 },
121 [1] = {
122 .start = FOR_PLATFORM_C_USB_HOST_INT,
123 .end = FOR_PLATFORM_C_USB_HOST_INT,
124 .flags = IORESOURCE_IRQ,
125 },
126};
127 114
128/* The dmamask must be set for OHCI to work */ 115/* The dmamask must be set for OHCI/EHCI to work */
129static u64 ohci_dmamask = DMA_BIT_MASK(32); 116static u64 alchemy_ohci_dmamask = DMA_BIT_MASK(32);
117static u64 __maybe_unused alchemy_ehci_dmamask = DMA_BIT_MASK(32);
130 118
131static struct platform_device au1xxx_usb_ohci_device = { 119static unsigned long alchemy_ohci_data[][2] __initdata = {
132 .name = "au1xxx-ohci", 120 [ALCHEMY_CPU_AU1000] = { AU1000_USB_OHCI_PHYS_ADDR, AU1000_USB_HOST_INT },
133 .id = 0, 121 [ALCHEMY_CPU_AU1500] = { AU1000_USB_OHCI_PHYS_ADDR, AU1500_USB_HOST_INT },
134 .dev = { 122 [ALCHEMY_CPU_AU1100] = { AU1000_USB_OHCI_PHYS_ADDR, AU1100_USB_HOST_INT },
135 .dma_mask = &ohci_dmamask, 123 [ALCHEMY_CPU_AU1550] = { AU1550_USB_OHCI_PHYS_ADDR, AU1550_USB_HOST_INT },
136 .coherent_dma_mask = DMA_BIT_MASK(32), 124 [ALCHEMY_CPU_AU1200] = { AU1200_USB_OHCI_PHYS_ADDR, AU1200_USB_INT },
137 }, 125};
138 .num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources), 126
139 .resource = au1xxx_usb_ohci_resources, 127static unsigned long alchemy_ehci_data[][2] __initdata = {
128 [ALCHEMY_CPU_AU1200] = { AU1200_USB_EHCI_PHYS_ADDR, AU1200_USB_INT },
140}; 129};
141 130
131static int __init _new_usbres(struct resource **r, struct platform_device **d)
132{
133 *r = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
134 if (!*r)
135 return -ENOMEM;
136 *d = kzalloc(sizeof(struct platform_device), GFP_KERNEL);
137 if (!*d) {
138 kfree(*r);
139 return -ENOMEM;
140 }
141
142 (*d)->dev.coherent_dma_mask = DMA_BIT_MASK(32);
143 (*d)->num_resources = 2;
144 (*d)->resource = *r;
145
146 return 0;
147}
148
149static void __init alchemy_setup_usb(int ctype)
150{
151 struct resource *res;
152 struct platform_device *pdev;
153
154 /* setup OHCI0. Every variant has one */
155 if (_new_usbres(&res, &pdev))
156 return;
157
158 res[0].start = alchemy_ohci_data[ctype][0];
159 res[0].end = res[0].start + 0x100 - 1;
160 res[0].flags = IORESOURCE_MEM;
161 res[1].start = alchemy_ohci_data[ctype][1];
162 res[1].end = res[1].start;
163 res[1].flags = IORESOURCE_IRQ;
164 pdev->name = "au1xxx-ohci";
165 pdev->id = 0;
166 pdev->dev.dma_mask = &alchemy_ohci_dmamask;
167
168 if (platform_device_register(pdev))
169 printk(KERN_INFO "Alchemy USB: cannot add OHCI0\n");
170
171
172 /* setup EHCI0: Au1200 */
173 if (ctype == ALCHEMY_CPU_AU1200) {
174 if (_new_usbres(&res, &pdev))
175 return;
176
177 res[0].start = alchemy_ehci_data[ctype][0];
178 res[0].end = res[0].start + 0x100 - 1;
179 res[0].flags = IORESOURCE_MEM;
180 res[1].start = alchemy_ehci_data[ctype][1];
181 res[1].end = res[1].start;
182 res[1].flags = IORESOURCE_IRQ;
183 pdev->name = "au1xxx-ehci";
184 pdev->id = 0;
185 pdev->dev.dma_mask = &alchemy_ehci_dmamask;
186
187 if (platform_device_register(pdev))
188 printk(KERN_INFO "Alchemy USB: cannot add EHCI0\n");
189 }
190}
191
142/*** AU1100 LCD controller ***/ 192/*** AU1100 LCD controller ***/
143 193
144#ifdef CONFIG_FB_AU1100 194#ifdef CONFIG_FB_AU1100
@@ -170,86 +220,6 @@ static struct platform_device au1100_lcd_device = {
170#endif 220#endif
171 221
172#ifdef CONFIG_SOC_AU1200 222#ifdef CONFIG_SOC_AU1200
173/* EHCI (USB high speed host controller) */
174static struct resource au1xxx_usb_ehci_resources[] = {
175 [0] = {
176 .start = USB_EHCI_BASE,
177 .end = USB_EHCI_BASE + USB_EHCI_LEN - 1,
178 .flags = IORESOURCE_MEM,
179 },
180 [1] = {
181 .start = AU1200_USB_INT,
182 .end = AU1200_USB_INT,
183 .flags = IORESOURCE_IRQ,
184 },
185};
186
187static u64 ehci_dmamask = DMA_BIT_MASK(32);
188
189static struct platform_device au1xxx_usb_ehci_device = {
190 .name = "au1xxx-ehci",
191 .id = 0,
192 .dev = {
193 .dma_mask = &ehci_dmamask,
194 .coherent_dma_mask = DMA_BIT_MASK(32),
195 },
196 .num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
197 .resource = au1xxx_usb_ehci_resources,
198};
199
200/* Au1200 UDC (USB gadget controller) */
201static struct resource au1xxx_usb_gdt_resources[] = {
202 [0] = {
203 .start = USB_UDC_BASE,
204 .end = USB_UDC_BASE + USB_UDC_LEN - 1,
205 .flags = IORESOURCE_MEM,
206 },
207 [1] = {
208 .start = AU1200_USB_INT,
209 .end = AU1200_USB_INT,
210 .flags = IORESOURCE_IRQ,
211 },
212};
213
214static u64 udc_dmamask = DMA_BIT_MASK(32);
215
216static struct platform_device au1xxx_usb_gdt_device = {
217 .name = "au1xxx-udc",
218 .id = 0,
219 .dev = {
220 .dma_mask = &udc_dmamask,
221 .coherent_dma_mask = DMA_BIT_MASK(32),
222 },
223 .num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
224 .resource = au1xxx_usb_gdt_resources,
225};
226
227/* Au1200 UOC (USB OTG controller) */
228static struct resource au1xxx_usb_otg_resources[] = {
229 [0] = {
230 .start = USB_UOC_BASE,
231 .end = USB_UOC_BASE + USB_UOC_LEN - 1,
232 .flags = IORESOURCE_MEM,
233 },
234 [1] = {
235 .start = AU1200_USB_INT,
236 .end = AU1200_USB_INT,
237 .flags = IORESOURCE_IRQ,
238 },
239};
240
241static u64 uoc_dmamask = DMA_BIT_MASK(32);
242
243static struct platform_device au1xxx_usb_otg_device = {
244 .name = "au1xxx-uoc",
245 .id = 0,
246 .dev = {
247 .dma_mask = &uoc_dmamask,
248 .coherent_dma_mask = DMA_BIT_MASK(32),
249 },
250 .num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
251 .resource = au1xxx_usb_otg_resources,
252};
253 223
254static struct resource au1200_lcd_resources[] = { 224static struct resource au1200_lcd_resources[] = {
255 [0] = { 225 [0] = {
@@ -534,14 +504,10 @@ static void __init alchemy_setup_macs(int ctype)
534} 504}
535 505
536static struct platform_device *au1xxx_platform_devices[] __initdata = { 506static struct platform_device *au1xxx_platform_devices[] __initdata = {
537 &au1xxx_usb_ohci_device,
538#ifdef CONFIG_FB_AU1100 507#ifdef CONFIG_FB_AU1100
539 &au1100_lcd_device, 508 &au1100_lcd_device,
540#endif 509#endif
541#ifdef CONFIG_SOC_AU1200 510#ifdef CONFIG_SOC_AU1200
542 &au1xxx_usb_ehci_device,
543 &au1xxx_usb_gdt_device,
544 &au1xxx_usb_otg_device,
545 &au1200_lcd_device, 511 &au1200_lcd_device,
546 &au1200_mmc0_device, 512 &au1200_mmc0_device,
547#ifndef CONFIG_MIPS_DB1200 513#ifndef CONFIG_MIPS_DB1200
@@ -559,6 +525,7 @@ static int __init au1xxx_platform_init(void)
559 525
560 alchemy_setup_uarts(ctype); 526 alchemy_setup_uarts(ctype);
561 alchemy_setup_macs(ctype); 527 alchemy_setup_macs(ctype);
528 alchemy_setup_usb(ctype);
562 529
563 err = platform_add_devices(au1xxx_platform_devices, 530 err = platform_add_devices(au1xxx_platform_devices,
564 ARRAY_SIZE(au1xxx_platform_devices)); 531 ARRAY_SIZE(au1xxx_platform_devices));
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h
index 3b0a1e774dc9..7f610b370382 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -833,56 +833,6 @@ enum soc_au1200_ints {
833#endif 833#endif
834 834
835 835
836
837
838/* Au1000 */
839#ifdef CONFIG_SOC_AU1000
840
841#define USB_OHCI_BASE 0x10100000 /* phys addr for ioremap */
842#define USB_HOST_CONFIG 0xB017FFFC
843#define FOR_PLATFORM_C_USB_HOST_INT AU1000_USB_HOST_INT
844#endif /* CONFIG_SOC_AU1000 */
845
846/* Au1500 */
847#ifdef CONFIG_SOC_AU1500
848
849#define USB_OHCI_BASE 0x10100000 /* phys addr for ioremap */
850#define USB_HOST_CONFIG 0xB017fffc
851#define FOR_PLATFORM_C_USB_HOST_INT AU1500_USB_HOST_INT
852#endif /* CONFIG_SOC_AU1500 */
853
854/* Au1100 */
855#ifdef CONFIG_SOC_AU1100
856
857#define USB_OHCI_BASE 0x10100000 /* phys addr for ioremap */
858#define USB_HOST_CONFIG 0xB017FFFC
859#define FOR_PLATFORM_C_USB_HOST_INT AU1100_USB_HOST_INT
860#endif /* CONFIG_SOC_AU1100 */
861
862#ifdef CONFIG_SOC_AU1550
863
864#define USB_OHCI_BASE 0x14020000 /* phys addr for ioremap */
865#define USB_OHCI_LEN 0x00060000
866#define USB_HOST_CONFIG 0xB4027ffc
867#define FOR_PLATFORM_C_USB_HOST_INT AU1550_USB_HOST_INT
868#endif /* CONFIG_SOC_AU1550 */
869
870
871#ifdef CONFIG_SOC_AU1200
872
873#define USB_UOC_BASE 0x14020020
874#define USB_UOC_LEN 0x20
875#define USB_OHCI_BASE 0x14020100
876#define USB_OHCI_LEN 0x100
877#define USB_EHCI_BASE 0x14020200
878#define USB_EHCI_LEN 0x100
879#define USB_UDC_BASE 0x14022000
880#define USB_UDC_LEN 0x2000
881
882#define FOR_PLATFORM_C_USB_HOST_INT AU1200_USB_INT
883
884#endif /* CONFIG_SOC_AU1200 */
885
886/* Programmable Counters 0 and 1 */ 836/* Programmable Counters 0 and 1 */
887#define SYS_BASE 0xB1900000 837#define SYS_BASE 0xB1900000
888#define SYS_COUNTER_CNTRL (SYS_BASE + 0x14) 838#define SYS_COUNTER_CNTRL (SYS_BASE + 0x14)
@@ -953,11 +903,6 @@ enum soc_au1200_ints {
953# define I2S_CONTROL_D (1 << 1) 903# define I2S_CONTROL_D (1 << 1)
954# define I2S_CONTROL_CE (1 << 0) 904# define I2S_CONTROL_CE (1 << 0)
955 905
956/* USB Host Controller */
957#ifndef USB_OHCI_LEN
958#define USB_OHCI_LEN 0x00100000
959#endif
960
961 906
962/* Ethernet Controllers */ 907/* Ethernet Controllers */
963 908