4 files changed, 71 insertions, 1 deletions

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 77e3d2402454..2e4ac657a4c3 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -82,6 +82,7 @@ config MACH_DECSTATION
         bool "DECstations"
         select BOOT_ELF32
         select CEVT_R4K
+        select CSRC_IOASIC
         select CSRC_R4K
         select CPU_DADDI_WORKAROUNDS if 64BIT
         select CPU_R4000_WORKAROUNDS if 64BIT
@@ -784,6 +785,9 @@ config CEVT_TXX9
 config CSRC_BCM1480
         bool
 
+config CSRC_IOASIC
+        bool
+
 config CSRC_R4K
         bool
 
diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c
index 60349062595a..0cbab8d0052b 100644
--- a/arch/mips/dec/time.c
+++ b/arch/mips/dec/time.c
@@ -165,7 +165,7 @@ void __init plat_time_init(void)
 
         if (!cpu_has_counter && IOASIC)
                 /* For pre-R4k systems we use the I/O ASIC's counter.  */
-                clocksource_mips.read = dec_ioasic_hpt_read;
+                dec_ioasic_clocksource_init();
 
         /* Set up the rate of periodic DS1287 interrupts.  */
         CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A);
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 87067e8fee9e..00ac35e501b3 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_CEVT_GT641XX)	+= cevt-gt641xx.o
 obj-$(CONFIG_CEVT_SB1250)       += cevt-sb1250.o
 obj-$(CONFIG_CEVT_TXX9)         += cevt-txx9.o
 obj-$(CONFIG_CSRC_BCM1480)      += csrc-bcm1480.o
+obj-$(CONFIG_CSRC_IOASIC)       += csrc-ioasic.o
 obj-$(CONFIG_CSRC_R4K)          += csrc-r4k.o
 obj-$(CONFIG_CSRC_SB1250)       += csrc-sb1250.o
 obj-$(CONFIG_SYNC_R4K)          += sync-r4k.o
diff --git a/arch/mips/kernel/csrc-ioasic.c b/arch/mips/kernel/csrc-ioasic.c
new file mode 100644
index 000000000000..1d5f63cf8997
--- /dev/null
+++ b/arch/mips/kernel/csrc-ioasic.c
@@ -0,0 +1,65 @@
+/*
+ *  DEC I/O ASIC's counter clocksource
+ *
+ *  Copyright (C) 2008  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/clocksource.h>
+#include <linux/init.h>
+
+#include <asm/ds1287.h>
+#include <asm/time.h>
+#include <asm/dec/ioasic.h>
+#include <asm/dec/ioasic_addrs.h>
+
+static cycle_t dec_ioasic_hpt_read(void)
+{
+        return ioasic_read(IO_REG_FCTR);
+}
+
+static struct clocksource clocksource_dec = {
+        .name           = "dec-ioasic",
+        .read           = dec_ioasic_hpt_read,
+        .mask           = CLOCKSOURCE_MASK(32),
+        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+void __init dec_ioasic_clocksource_init(void)
+{
+        unsigned int freq;
+        u32 start, end;
+        int i = HZ / 10;
+
+
+        while (!ds1287_timer_state())
+                ;
+
+        start = dec_ioasic_hpt_read();
+
+        while (i--)
+                while (!ds1287_timer_state())
+                        ;
+
+        end = dec_ioasic_hpt_read();
+
+        freq = (end - start) * 10;
+        printk(KERN_INFO "I/O ASIC clock frequency %dHz\n", freq);
+
+        clocksource_dec.rating = 200 + freq / 10000000;
+        clocksource_set_clock(&clocksource_dec, freq);
+
+        clocksource_register(&clocksource_dec);
+}