diff options
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/au1000/pb1500/Makefile | 6 | ||||
-rw-r--r-- | arch/mips/au1000/pb1500/board_setup.c | 46 | ||||
-rw-r--r-- | arch/mips/au1000/pb1500/init.c | 20 | ||||
-rw-r--r-- | arch/mips/au1000/pb1500/irqmap.c | 6 |
4 files changed, 36 insertions, 42 deletions
diff --git a/arch/mips/au1000/pb1500/Makefile b/arch/mips/au1000/pb1500/Makefile index 97a730813cd3..602f38df20bb 100644 --- a/arch/mips/au1000/pb1500/Makefile +++ b/arch/mips/au1000/pb1500/Makefile | |||
@@ -1,8 +1,8 @@ | |||
1 | # | 1 | # |
2 | # Copyright 2000,2001 MontaVista Software Inc. | 2 | # Copyright 2000, 2001, 2008 MontaVista Software Inc. |
3 | # Author: MontaVista Software, Inc. | 3 | # Author: MontaVista Software, Inc. <source@mvista.com> |
4 | # ppopov@mvista.com or source@mvista.com | ||
5 | # | 4 | # |
6 | # Makefile for the Alchemy Semiconductor Pb1500 board. | 5 | # Makefile for the Alchemy Semiconductor Pb1500 board. |
6 | # | ||
7 | 7 | ||
8 | lib-y := init.o board_setup.o irqmap.o | 8 | lib-y := init.o board_setup.o irqmap.o |
diff --git a/arch/mips/au1000/pb1500/board_setup.c b/arch/mips/au1000/pb1500/board_setup.c index 24c652e8ec4b..035771c6e5b8 100644 --- a/arch/mips/au1000/pb1500/board_setup.c +++ b/arch/mips/au1000/pb1500/board_setup.c | |||
@@ -1,7 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright 2000 MontaVista Software Inc. | 2 | * Copyright 2000, 2008 MontaVista Software Inc. |
3 | * Author: MontaVista Software, Inc. | 3 | * Author: MontaVista Software, Inc. <source@mvista.com> |
4 | * ppopov@mvista.com or source@mvista.com | ||
5 | * | 4 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms of the GNU General Public License as published by the | 6 | * under the terms of the GNU General Public License as published by the |
@@ -32,8 +31,8 @@ | |||
32 | 31 | ||
33 | void board_reset(void) | 32 | void board_reset(void) |
34 | { | 33 | { |
35 | /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ | 34 | /* Hit BCSR.RST_VDDI[SOFT_RESET] */ |
36 | au_writel(0x00000000, 0xAE00001C); | 35 | au_writel(0x00000000, PB1500_RST_VDDI); |
37 | } | 36 | } |
38 | 37 | ||
39 | void __init board_setup(void) | 38 | void __init board_setup(void) |
@@ -42,7 +41,7 @@ void __init board_setup(void) | |||
42 | u32 sys_freqctrl, sys_clksrc; | 41 | u32 sys_freqctrl, sys_clksrc; |
43 | 42 | ||
44 | sys_clksrc = sys_freqctrl = pin_func = 0; | 43 | sys_clksrc = sys_freqctrl = pin_func = 0; |
45 | // set AUX clock to 12MHz * 8 = 96 MHz | 44 | /* Set AUX clock to 12 MHz * 8 = 96 MHz */ |
46 | au_writel(8, SYS_AUXPLL); | 45 | au_writel(8, SYS_AUXPLL); |
47 | au_writel(0, SYS_PINSTATERD); | 46 | au_writel(0, SYS_PINSTATERD); |
48 | udelay(100); | 47 | udelay(100); |
@@ -51,51 +50,48 @@ void __init board_setup(void) | |||
51 | 50 | ||
52 | /* GPIO201 is input for PCMCIA card detect */ | 51 | /* GPIO201 is input for PCMCIA card detect */ |
53 | /* GPIO203 is input for PCMCIA interrupt request */ | 52 | /* GPIO203 is input for PCMCIA interrupt request */ |
54 | au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR); | 53 | au_writel(au_readl(GPIO2_DIR) & ~((1 << 1) | (1 << 3)), GPIO2_DIR); |
55 | 54 | ||
56 | /* zero and disable FREQ2 */ | 55 | /* Zero and disable FREQ2 */ |
57 | sys_freqctrl = au_readl(SYS_FREQCTRL0); | 56 | sys_freqctrl = au_readl(SYS_FREQCTRL0); |
58 | sys_freqctrl &= ~0xFFF00000; | 57 | sys_freqctrl &= ~0xFFF00000; |
59 | au_writel(sys_freqctrl, SYS_FREQCTRL0); | 58 | au_writel(sys_freqctrl, SYS_FREQCTRL0); |
60 | 59 | ||
61 | /* zero and disable USBH/USBD clocks */ | 60 | /* zero and disable USBH/USBD clocks */ |
62 | sys_clksrc = au_readl(SYS_CLKSRC); | 61 | sys_clksrc = au_readl(SYS_CLKSRC); |
63 | sys_clksrc &= ~0x00007FE0; | 62 | sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK | |
63 | SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK); | ||
64 | au_writel(sys_clksrc, SYS_CLKSRC); | 64 | au_writel(sys_clksrc, SYS_CLKSRC); |
65 | 65 | ||
66 | sys_freqctrl = au_readl(SYS_FREQCTRL0); | 66 | sys_freqctrl = au_readl(SYS_FREQCTRL0); |
67 | sys_freqctrl &= ~0xFFF00000; | 67 | sys_freqctrl &= ~0xFFF00000; |
68 | 68 | ||
69 | sys_clksrc = au_readl(SYS_CLKSRC); | 69 | sys_clksrc = au_readl(SYS_CLKSRC); |
70 | sys_clksrc &= ~0x00007FE0; | 70 | sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK | |
71 | SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK); | ||
71 | 72 | ||
72 | // FREQ2 = aux/2 = 48 MHz | 73 | /* FREQ2 = aux/2 = 48 MHz */ |
73 | sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); | 74 | sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) | SYS_FC_FE2 | SYS_FC_FS2; |
74 | au_writel(sys_freqctrl, SYS_FREQCTRL0); | 75 | au_writel(sys_freqctrl, SYS_FREQCTRL0); |
75 | 76 | ||
76 | /* | 77 | /* |
77 | * Route 48MHz FREQ2 into USB Host and/or Device | 78 | * Route 48MHz FREQ2 into USB Host and/or Device |
78 | */ | 79 | */ |
79 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | 80 | sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MUH_BIT; |
80 | sys_clksrc |= ((4<<12) | (0<<11) | (0<<10)); | ||
81 | #endif | ||
82 | au_writel(sys_clksrc, SYS_CLKSRC); | 81 | au_writel(sys_clksrc, SYS_CLKSRC); |
83 | 82 | ||
84 | 83 | pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB; | |
85 | pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); | 84 | /* 2nd USB port is USB host */ |
86 | // 2nd USB port is USB host | 85 | pin_func |= SYS_PF_USB; |
87 | pin_func |= 0x8000; | ||
88 | au_writel(pin_func, SYS_PINFUNC); | 86 | au_writel(pin_func, SYS_PINFUNC); |
89 | #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ | 87 | #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ |
90 | 88 | ||
91 | |||
92 | |||
93 | #ifdef CONFIG_PCI | 89 | #ifdef CONFIG_PCI |
94 | // Setup PCI bus controller | 90 | /* Setup PCI bus controller */ |
95 | au_writel(0, Au1500_PCI_CMEM); | 91 | au_writel(0, Au1500_PCI_CMEM); |
96 | au_writel(0x00003fff, Au1500_CFG_BASE); | 92 | au_writel(0x00003fff, Au1500_CFG_BASE); |
97 | #if defined(__MIPSEB__) | 93 | #if defined(__MIPSEB__) |
98 | au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG); | 94 | au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG); |
99 | #else | 95 | #else |
100 | au_writel(0xf, Au1500_PCI_CFG); | 96 | au_writel(0xf, Au1500_PCI_CFG); |
101 | #endif | 97 | #endif |
@@ -112,11 +108,11 @@ void __init board_setup(void) | |||
112 | 108 | ||
113 | /* Enable the RTC if not already enabled */ | 109 | /* Enable the RTC if not already enabled */ |
114 | if (!(au_readl(0xac000028) & 0x20)) { | 110 | if (!(au_readl(0xac000028) & 0x20)) { |
115 | printk("enabling clock ...\n"); | 111 | printk(KERN_INFO "enabling clock ...\n"); |
116 | au_writel((au_readl(0xac000028) | 0x20), 0xac000028); | 112 | au_writel((au_readl(0xac000028) | 0x20), 0xac000028); |
117 | } | 113 | } |
118 | /* Put the clock in BCD mode */ | 114 | /* Put the clock in BCD mode */ |
119 | if (au_readl(0xac00002C) & 0x4) { /* reg B */ | 115 | if (au_readl(0xac00002c) & 0x4) { /* reg B */ |
120 | au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c); | 116 | au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c); |
121 | au_sync(); | 117 | au_sync(); |
122 | } | 118 | } |
diff --git a/arch/mips/au1000/pb1500/init.c b/arch/mips/au1000/pb1500/init.c index 488507c07db9..49f51e165863 100644 --- a/arch/mips/au1000/pb1500/init.c +++ b/arch/mips/au1000/pb1500/init.c | |||
@@ -1,11 +1,10 @@ | |||
1 | /* | 1 | /* |
2 | * | 2 | * |
3 | * BRIEF MODULE DESCRIPTION | 3 | * BRIEF MODULE DESCRIPTION |
4 | * PB1500 board setup | 4 | * Pb1500 board setup |
5 | * | 5 | * |
6 | * Copyright 2001 MontaVista Software Inc. | 6 | * Copyright 2001, 2008 MontaVista Software Inc. |
7 | * Author: MontaVista Software, Inc. | 7 | * Author: MontaVista Software, Inc. <source@mvista.com> |
8 | * ppopov@mvista.com or source@mvista.com | ||
9 | * | 8 | * |
10 | * This program is free software; you can redistribute it and/or modify it | 9 | * This program is free software; you can redistribute it and/or modify it |
11 | * under the terms of the GNU General Public License as published by the | 10 | * under the terms of the GNU General Public License as published by the |
@@ -45,16 +44,15 @@ void __init prom_init(void) | |||
45 | unsigned char *memsize_str; | 44 | unsigned char *memsize_str; |
46 | unsigned long memsize; | 45 | unsigned long memsize; |
47 | 46 | ||
48 | prom_argc = (int) fw_arg0; | 47 | prom_argc = (int)fw_arg0; |
49 | prom_argv = (char **) fw_arg1; | 48 | prom_argv = (char **)fw_arg1; |
50 | prom_envp = (char **) fw_arg2; | 49 | prom_envp = (char **)fw_arg2; |
51 | 50 | ||
52 | prom_init_cmdline(); | 51 | prom_init_cmdline(); |
53 | memsize_str = prom_getenv("memsize"); | 52 | memsize_str = prom_getenv("memsize"); |
54 | if (!memsize_str) { | 53 | if (!memsize_str) |
55 | memsize = 0x04000000; | 54 | memsize = 0x04000000; |
56 | } else { | 55 | else |
57 | memsize = simple_strtol(memsize_str, NULL, 0); | 56 | memsize = strict_strtol(memsize_str, 0, NULL); |
58 | } | ||
59 | add_memory_region(0, memsize, BOOT_MEM_RAM); | 57 | add_memory_region(0, memsize, BOOT_MEM_RAM); |
60 | } | 58 | } |
diff --git a/arch/mips/au1000/pb1500/irqmap.c b/arch/mips/au1000/pb1500/irqmap.c index 4817ab44d07f..39c4682766a8 100644 --- a/arch/mips/au1000/pb1500/irqmap.c +++ b/arch/mips/au1000/pb1500/irqmap.c | |||
@@ -31,12 +31,12 @@ | |||
31 | #include <asm/mach-au1x00/au1000.h> | 31 | #include <asm/mach-au1x00/au1000.h> |
32 | 32 | ||
33 | char irq_tab_alchemy[][5] __initdata = { | 33 | char irq_tab_alchemy[][5] __initdata = { |
34 | [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - HPT370 */ | 34 | [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - HPT370 */ |
35 | [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */ | 35 | [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */ |
36 | }; | 36 | }; |
37 | 37 | ||
38 | struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { | 38 | struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { |
39 | { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, | 39 | { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0 }, |
40 | { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, | 40 | { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, |
41 | { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, | 41 | { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, |
42 | { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, | 42 | { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, |