diff options
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/Kconfig | 14 | ||||
-rw-r--r-- | arch/mips/Makefile | 2 | ||||
-rw-r--r-- | arch/mips/dec/prom/memory.c | 2 | ||||
-rw-r--r-- | arch/mips/kernel/smtc.c | 64 | ||||
-rw-r--r-- | arch/mips/kernel/vpe.c | 9 | ||||
-rw-r--r-- | arch/mips/mips-boards/malta/Makefile | 3 | ||||
-rw-r--r-- | arch/mips/mips-boards/sim/sim_setup.c | 2 | ||||
-rw-r--r-- | arch/mips/mm/init.c | 3 | ||||
-rw-r--r-- | arch/mips/momentum/ocelot_g/prom.c | 4 | ||||
-rw-r--r-- | arch/mips/momentum/ocelot_g/setup.c | 4 | ||||
-rw-r--r-- | arch/mips/vr41xx/common/irq.c | 12 |
11 files changed, 80 insertions, 39 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index fd2ff0698a85..bbd386f572d9 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -1568,6 +1568,20 @@ config MIPS_MT_FPAFF | |||
1568 | depends on MIPS_MT | 1568 | depends on MIPS_MT |
1569 | default y | 1569 | default y |
1570 | 1570 | ||
1571 | config MIPS_MT_SMTC_INSTANT_REPLAY | ||
1572 | bool "Low-latency Dispatch of Deferred SMTC IPIs" | ||
1573 | depends on MIPS_MT_SMTC | ||
1574 | default y | ||
1575 | help | ||
1576 | SMTC pseudo-interrupts between TCs are deferred and queued | ||
1577 | if the target TC is interrupt-inhibited (IXMT). In the first | ||
1578 | SMTC prototypes, these queued IPIs were serviced on return | ||
1579 | to user mode, or on entry into the kernel idle loop. The | ||
1580 | INSTANT_REPLAY option dispatches them as part of local_irq_restore() | ||
1581 | processing, which adds runtime overhead (hence the option to turn | ||
1582 | it off), but ensures that IPIs are handled promptly even under | ||
1583 | heavy I/O interrupt load. | ||
1584 | |||
1571 | config MIPS_VPE_LOADER_TOM | 1585 | config MIPS_VPE_LOADER_TOM |
1572 | bool "Load VPE program into memory hidden from linux" | 1586 | bool "Load VPE program into memory hidden from linux" |
1573 | depends on MIPS_VPE_LOADER | 1587 | depends on MIPS_VPE_LOADER |
diff --git a/arch/mips/Makefile b/arch/mips/Makefile index d1b026a0337d..c68b5d3e5d18 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile | |||
@@ -623,7 +623,7 @@ LDFLAGS += -m $(ld-emul) | |||
623 | 623 | ||
624 | ifdef CONFIG_MIPS | 624 | ifdef CONFIG_MIPS |
625 | CHECKFLAGS += $(shell $(CC) $(CFLAGS) -dM -E -xc /dev/null | \ | 625 | CHECKFLAGS += $(shell $(CC) $(CFLAGS) -dM -E -xc /dev/null | \ |
626 | egrep -vw '__GNUC_(MAJOR|MINOR|PATCHLEVEL)__' | \ | 626 | egrep -vw '__GNUC_(|MINOR_|PATCHLEVEL_)_' | \ |
627 | sed -e 's/^\#define /-D/' -e "s/ /='/" -e "s/$$/'/") | 627 | sed -e 's/^\#define /-D/' -e "s/ /='/" -e "s/$$/'/") |
628 | ifdef CONFIG_64BIT | 628 | ifdef CONFIG_64BIT |
629 | CHECKFLAGS += -m64 | 629 | CHECKFLAGS += -m64 |
diff --git a/arch/mips/dec/prom/memory.c b/arch/mips/dec/prom/memory.c index 3027ce782797..3aa01d268f2d 100644 --- a/arch/mips/dec/prom/memory.c +++ b/arch/mips/dec/prom/memory.c | |||
@@ -122,7 +122,7 @@ unsigned long __init prom_free_prom_memory(void) | |||
122 | addr += PAGE_SIZE; | 122 | addr += PAGE_SIZE; |
123 | } | 123 | } |
124 | 124 | ||
125 | printk("Freeing unused PROM memory: %ldk freed\n", | 125 | printk("Freeing unused PROM memory: %ldkb freed\n", |
126 | (end - PAGE_SIZE) >> 10); | 126 | (end - PAGE_SIZE) >> 10); |
127 | 127 | ||
128 | return end - PAGE_SIZE; | 128 | return end - PAGE_SIZE; |
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index a8b387197d5b..6a857bf030b0 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c | |||
@@ -4,6 +4,7 @@ | |||
4 | #include <linux/sched.h> | 4 | #include <linux/sched.h> |
5 | #include <linux/cpumask.h> | 5 | #include <linux/cpumask.h> |
6 | #include <linux/interrupt.h> | 6 | #include <linux/interrupt.h> |
7 | #include <linux/module.h> | ||
7 | 8 | ||
8 | #include <asm/cpu.h> | 9 | #include <asm/cpu.h> |
9 | #include <asm/processor.h> | 10 | #include <asm/processor.h> |
@@ -270,9 +271,12 @@ void smtc_configure_tlb(void) | |||
270 | * of their initialization in smtc_cpu_setup(). | 271 | * of their initialization in smtc_cpu_setup(). |
271 | */ | 272 | */ |
272 | 273 | ||
273 | tlbsiz = tlbsiz & 0x3f; /* MIPS32 limits TLB indices to 64 */ | 274 | /* MIPS32 limits TLB indices to 64 */ |
274 | cpu_data[0].tlbsize = tlbsiz; | 275 | if (tlbsiz > 64) |
276 | tlbsiz = 64; | ||
277 | cpu_data[0].tlbsize = current_cpu_data.tlbsize = tlbsiz; | ||
275 | smtc_status |= SMTC_TLB_SHARED; | 278 | smtc_status |= SMTC_TLB_SHARED; |
279 | local_flush_tlb_all(); | ||
276 | 280 | ||
277 | printk("TLB of %d entry pairs shared by %d VPEs\n", | 281 | printk("TLB of %d entry pairs shared by %d VPEs\n", |
278 | tlbsiz, vpes); | 282 | tlbsiz, vpes); |
@@ -1017,6 +1021,35 @@ void setup_cross_vpe_interrupts(void) | |||
1017 | * SMTC-specific hacks invoked from elsewhere in the kernel. | 1021 | * SMTC-specific hacks invoked from elsewhere in the kernel. |
1018 | */ | 1022 | */ |
1019 | 1023 | ||
1024 | void smtc_ipi_replay(void) | ||
1025 | { | ||
1026 | /* | ||
1027 | * To the extent that we've ever turned interrupts off, | ||
1028 | * we may have accumulated deferred IPIs. This is subtle. | ||
1029 | * If we use the smtc_ipi_qdepth() macro, we'll get an | ||
1030 | * exact number - but we'll also disable interrupts | ||
1031 | * and create a window of failure where a new IPI gets | ||
1032 | * queued after we test the depth but before we re-enable | ||
1033 | * interrupts. So long as IXMT never gets set, however, | ||
1034 | * we should be OK: If we pick up something and dispatch | ||
1035 | * it here, that's great. If we see nothing, but concurrent | ||
1036 | * with this operation, another TC sends us an IPI, IXMT | ||
1037 | * is clear, and we'll handle it as a real pseudo-interrupt | ||
1038 | * and not a pseudo-pseudo interrupt. | ||
1039 | */ | ||
1040 | if (IPIQ[smp_processor_id()].depth > 0) { | ||
1041 | struct smtc_ipi *pipi; | ||
1042 | extern void self_ipi(struct smtc_ipi *); | ||
1043 | |||
1044 | while ((pipi = smtc_ipi_dq(&IPIQ[smp_processor_id()]))) { | ||
1045 | self_ipi(pipi); | ||
1046 | smtc_cpu_stats[smp_processor_id()].selfipis++; | ||
1047 | } | ||
1048 | } | ||
1049 | } | ||
1050 | |||
1051 | EXPORT_SYMBOL(smtc_ipi_replay); | ||
1052 | |||
1020 | void smtc_idle_loop_hook(void) | 1053 | void smtc_idle_loop_hook(void) |
1021 | { | 1054 | { |
1022 | #ifdef SMTC_IDLE_HOOK_DEBUG | 1055 | #ifdef SMTC_IDLE_HOOK_DEBUG |
@@ -1113,29 +1146,14 @@ void smtc_idle_loop_hook(void) | |||
1113 | if (pdb_msg != &id_ho_db_msg[0]) | 1146 | if (pdb_msg != &id_ho_db_msg[0]) |
1114 | printk("CPU%d: %s", smp_processor_id(), id_ho_db_msg); | 1147 | printk("CPU%d: %s", smp_processor_id(), id_ho_db_msg); |
1115 | #endif /* SMTC_IDLE_HOOK_DEBUG */ | 1148 | #endif /* SMTC_IDLE_HOOK_DEBUG */ |
1149 | |||
1116 | /* | 1150 | /* |
1117 | * To the extent that we've ever turned interrupts off, | 1151 | * Replay any accumulated deferred IPIs. If "Instant Replay" |
1118 | * we may have accumulated deferred IPIs. This is subtle. | 1152 | * is in use, there should never be any. |
1119 | * If we use the smtc_ipi_qdepth() macro, we'll get an | ||
1120 | * exact number - but we'll also disable interrupts | ||
1121 | * and create a window of failure where a new IPI gets | ||
1122 | * queued after we test the depth but before we re-enable | ||
1123 | * interrupts. So long as IXMT never gets set, however, | ||
1124 | * we should be OK: If we pick up something and dispatch | ||
1125 | * it here, that's great. If we see nothing, but concurrent | ||
1126 | * with this operation, another TC sends us an IPI, IXMT | ||
1127 | * is clear, and we'll handle it as a real pseudo-interrupt | ||
1128 | * and not a pseudo-pseudo interrupt. | ||
1129 | */ | 1153 | */ |
1130 | if (IPIQ[smp_processor_id()].depth > 0) { | 1154 | #ifndef CONFIG_MIPS_MT_SMTC_INSTANT_REPLAY |
1131 | struct smtc_ipi *pipi; | 1155 | smtc_ipi_replay(); |
1132 | extern void self_ipi(struct smtc_ipi *); | 1156 | #endif /* CONFIG_MIPS_MT_SMTC_INSTANT_REPLAY */ |
1133 | |||
1134 | if ((pipi = smtc_ipi_dq(&IPIQ[smp_processor_id()])) != NULL) { | ||
1135 | self_ipi(pipi); | ||
1136 | smtc_cpu_stats[smp_processor_id()].selfipis++; | ||
1137 | } | ||
1138 | } | ||
1139 | } | 1157 | } |
1140 | 1158 | ||
1141 | void smtc_soft_dump(void) | 1159 | void smtc_soft_dump(void) |
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 666bef484dcb..458fccf87c54 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c | |||
@@ -139,13 +139,16 @@ struct tc { | |||
139 | struct list_head list; | 139 | struct list_head list; |
140 | }; | 140 | }; |
141 | 141 | ||
142 | struct vpecontrol_ { | 142 | struct { |
143 | /* Virtual processing elements */ | 143 | /* Virtual processing elements */ |
144 | struct list_head vpe_list; | 144 | struct list_head vpe_list; |
145 | 145 | ||
146 | /* Thread contexts */ | 146 | /* Thread contexts */ |
147 | struct list_head tc_list; | 147 | struct list_head tc_list; |
148 | } vpecontrol; | 148 | } vpecontrol = { |
149 | .vpe_list = LIST_HEAD_INIT(vpecontrol.vpe_list), | ||
150 | .tc_list = LIST_HEAD_INIT(vpecontrol.tc_list) | ||
151 | }; | ||
149 | 152 | ||
150 | static void release_progmem(void *ptr); | 153 | static void release_progmem(void *ptr); |
151 | /* static __attribute_used__ void dump_vpe(struct vpe * v); */ | 154 | /* static __attribute_used__ void dump_vpe(struct vpe * v); */ |
@@ -1388,8 +1391,6 @@ static int __init vpe_module_init(void) | |||
1388 | 1391 | ||
1389 | /* dump_mtregs(); */ | 1392 | /* dump_mtregs(); */ |
1390 | 1393 | ||
1391 | INIT_LIST_HEAD(&vpecontrol.vpe_list); | ||
1392 | INIT_LIST_HEAD(&vpecontrol.tc_list); | ||
1393 | 1394 | ||
1394 | val = read_c0_mvpconf0(); | 1395 | val = read_c0_mvpconf0(); |
1395 | for (i = 0; i < ((val & MVPCONF0_PTC) + 1); i++) { | 1396 | for (i = 0; i < ((val & MVPCONF0_PTC) + 1); i++) { |
diff --git a/arch/mips/mips-boards/malta/Makefile b/arch/mips/mips-boards/malta/Makefile index b662c75fb28e..cb7f349b0514 100644 --- a/arch/mips/mips-boards/malta/Makefile +++ b/arch/mips/mips-boards/malta/Makefile | |||
@@ -19,5 +19,6 @@ | |||
19 | # under Linux. | 19 | # under Linux. |
20 | # | 20 | # |
21 | 21 | ||
22 | obj-y := malta_int.o malta_mtd.o malta_setup.o | 22 | obj-y := malta_int.o malta_setup.o |
23 | obj-$(CONFIG_MTD) += malta_mtd.o | ||
23 | obj-$(CONFIG_SMP) += malta_smp.o | 24 | obj-$(CONFIG_SMP) += malta_smp.o |
diff --git a/arch/mips/mips-boards/sim/sim_setup.c b/arch/mips/mips-boards/sim/sim_setup.c index 2659c1c3b78d..ea2066c3a1f7 100644 --- a/arch/mips/mips-boards/sim/sim_setup.c +++ b/arch/mips/mips-boards/sim/sim_setup.c | |||
@@ -57,7 +57,7 @@ void __init plat_mem_setup(void) | |||
57 | board_time_init = sim_time_init; | 57 | board_time_init = sim_time_init; |
58 | prom_printf("Linux started...\n"); | 58 | prom_printf("Linux started...\n"); |
59 | 59 | ||
60 | #ifdef CONFIG_MT_SMP | 60 | #ifdef CONFIG_MIPS_MT_SMP |
61 | sanitize_tlb_entries(); | 61 | sanitize_tlb_entries(); |
62 | #endif | 62 | #endif |
63 | } | 63 | } |
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 30245c09d025..49065c133ebf 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c | |||
@@ -501,7 +501,8 @@ void free_initmem(void) | |||
501 | 501 | ||
502 | freed = prom_free_prom_memory(); | 502 | freed = prom_free_prom_memory(); |
503 | if (freed) | 503 | if (freed) |
504 | printk(KERN_INFO "Freeing firmware memory: %ldk freed\n",freed); | 504 | printk(KERN_INFO "Freeing firmware memory: %ldkb freed\n", |
505 | freed >> 10); | ||
505 | 506 | ||
506 | free_init_pages("unused kernel memory", | 507 | free_init_pages("unused kernel memory", |
507 | __pa_symbol(&__init_begin), | 508 | __pa_symbol(&__init_begin), |
diff --git a/arch/mips/momentum/ocelot_g/prom.c b/arch/mips/momentum/ocelot_g/prom.c index 6509a9c9863c..2f75c6b91ec5 100644 --- a/arch/mips/momentum/ocelot_g/prom.c +++ b/arch/mips/momentum/ocelot_g/prom.c | |||
@@ -28,7 +28,7 @@ struct callvectors* debug_vectors; | |||
28 | extern unsigned long marvell_base; | 28 | extern unsigned long marvell_base; |
29 | extern unsigned long bus_clock; | 29 | extern unsigned long bus_clock; |
30 | 30 | ||
31 | #ifdef CONFIG_GALILLEO_GT64240_ETH | 31 | #ifdef CONFIG_GALILEO_GT64240_ETH |
32 | extern unsigned char prom_mac_addr_base[6]; | 32 | extern unsigned char prom_mac_addr_base[6]; |
33 | #endif | 33 | #endif |
34 | 34 | ||
@@ -61,7 +61,7 @@ void __init prom_init(void) | |||
61 | mips_machgroup = MACH_GROUP_MOMENCO; | 61 | mips_machgroup = MACH_GROUP_MOMENCO; |
62 | mips_machtype = MACH_MOMENCO_OCELOT_G; | 62 | mips_machtype = MACH_MOMENCO_OCELOT_G; |
63 | 63 | ||
64 | #ifdef CONFIG_GALILLEO_GT64240_ETH | 64 | #ifdef CONFIG_GALILEO_GT64240_ETH |
65 | /* get the base MAC address for on-board ethernet ports */ | 65 | /* get the base MAC address for on-board ethernet ports */ |
66 | memcpy(prom_mac_addr_base, (void*)0xfc807cf2, 6); | 66 | memcpy(prom_mac_addr_base, (void*)0xfc807cf2, 6); |
67 | #endif | 67 | #endif |
diff --git a/arch/mips/momentum/ocelot_g/setup.c b/arch/mips/momentum/ocelot_g/setup.c index d288f7b01842..9db638a7982c 100644 --- a/arch/mips/momentum/ocelot_g/setup.c +++ b/arch/mips/momentum/ocelot_g/setup.c | |||
@@ -64,7 +64,7 @@ | |||
64 | 64 | ||
65 | #include "ocelot_pld.h" | 65 | #include "ocelot_pld.h" |
66 | 66 | ||
67 | #ifdef CONFIG_GALILLEO_GT64240_ETH | 67 | #ifdef CONFIG_GALILEO_GT64240_ETH |
68 | extern unsigned char prom_mac_addr_base[6]; | 68 | extern unsigned char prom_mac_addr_base[6]; |
69 | #endif | 69 | #endif |
70 | 70 | ||
@@ -185,7 +185,7 @@ void __init plat_mem_setup(void) | |||
185 | /* do handoff reconfiguration */ | 185 | /* do handoff reconfiguration */ |
186 | PMON_v2_setup(); | 186 | PMON_v2_setup(); |
187 | 187 | ||
188 | #ifdef CONFIG_GALILLEO_GT64240_ETH | 188 | #ifdef CONFIG_GALILEO_GT64240_ETH |
189 | /* get the mac addr */ | 189 | /* get the mac addr */ |
190 | memcpy(prom_mac_addr_base, (void*)0xfc807cf2, 6); | 190 | memcpy(prom_mac_addr_base, (void*)0xfc807cf2, 6); |
191 | #endif | 191 | #endif |
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 397ba94cd7ec..16decf4ac2f4 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Interrupt handing routines for NEC VR4100 series. | 2 | * Interrupt handing routines for NEC VR4100 series. |
3 | * | 3 | * |
4 | * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2005-2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
@@ -73,13 +73,19 @@ static void irq_dispatch(unsigned int irq) | |||
73 | if (cascade->get_irq != NULL) { | 73 | if (cascade->get_irq != NULL) { |
74 | unsigned int source_irq = irq; | 74 | unsigned int source_irq = irq; |
75 | desc = irq_desc + source_irq; | 75 | desc = irq_desc + source_irq; |
76 | desc->chip->ack(source_irq); | 76 | if (desc->chip->mask_ack) |
77 | desc->chip->mask_ack(source_irq); | ||
78 | else { | ||
79 | desc->chip->mask(source_irq); | ||
80 | desc->chip->ack(source_irq); | ||
81 | } | ||
77 | irq = cascade->get_irq(irq); | 82 | irq = cascade->get_irq(irq); |
78 | if (irq < 0) | 83 | if (irq < 0) |
79 | atomic_inc(&irq_err_count); | 84 | atomic_inc(&irq_err_count); |
80 | else | 85 | else |
81 | irq_dispatch(irq); | 86 | irq_dispatch(irq); |
82 | desc->chip->end(source_irq); | 87 | if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) |
88 | desc->chip->unmask(source_irq); | ||
83 | } else | 89 | } else |
84 | do_IRQ(irq); | 90 | do_IRQ(irq); |
85 | } | 91 | } |