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-rw-r--r--arch/mips/Kconfig4
-rw-r--r--arch/mips/Makefile1
-rw-r--r--arch/mips/arc/arc_con.c2
-rw-r--r--arch/mips/kernel/irq-mv6434x.c8
-rw-r--r--arch/mips/kernel/linux32.c54
-rw-r--r--arch/mips/kernel/scall64-n32.S2
-rw-r--r--arch/mips/kernel/scall64-o32.S4
-rw-r--r--arch/mips/kernel/setup.c3
-rw-r--r--arch/mips/kernel/smp.c2
-rw-r--r--arch/mips/kernel/smp_mt.c13
-rw-r--r--arch/mips/kernel/time.c5
-rw-r--r--arch/mips/kernel/vmlinux.lds.S4
-rw-r--r--arch/mips/lib/iomap.c2
-rw-r--r--arch/mips/mm/c-r4k.c16
-rw-r--r--arch/mips/mm/tlbex.c34
-rw-r--r--arch/mips/momentum/jaguar_atx/prom.c2
-rw-r--r--arch/mips/momentum/jaguar_atx/setup.c5
-rw-r--r--arch/mips/momentum/ocelot_c/irq.c2
-rw-r--r--arch/mips/momentum/ocelot_c/prom.c2
-rw-r--r--arch/mips/momentum/ocelot_c/setup.c27
-rw-r--r--arch/mips/pci/pci-ocelot-c.c6
-rw-r--r--arch/mips/pmc-sierra/yosemite/smp.c24
-rw-r--r--arch/mips/sgi-ip27/ip27-smp.c7
-rw-r--r--arch/mips/sibyte/cfe/smp.c10
24 files changed, 103 insertions, 136 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 767de847b4ab..3a0f89d2c8dc 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1053,6 +1053,7 @@ config CPU_MIPS32_R1
1053 depends on SYS_HAS_CPU_MIPS32_R1 1053 depends on SYS_HAS_CPU_MIPS32_R1
1054 select CPU_HAS_PREFETCH 1054 select CPU_HAS_PREFETCH
1055 select CPU_SUPPORTS_32BIT_KERNEL 1055 select CPU_SUPPORTS_32BIT_KERNEL
1056 select CPU_SUPPORTS_HIGHMEM
1056 help 1057 help
1057 Choose this option to build a kernel for release 1 or later of the 1058 Choose this option to build a kernel for release 1 or later of the
1058 MIPS32 architecture. Most modern embedded systems with a 32-bit 1059 MIPS32 architecture. Most modern embedded systems with a 32-bit
@@ -1069,6 +1070,7 @@ config CPU_MIPS32_R2
1069 depends on SYS_HAS_CPU_MIPS32_R2 1070 depends on SYS_HAS_CPU_MIPS32_R2
1070 select CPU_HAS_PREFETCH 1071 select CPU_HAS_PREFETCH
1071 select CPU_SUPPORTS_32BIT_KERNEL 1072 select CPU_SUPPORTS_32BIT_KERNEL
1073 select CPU_SUPPORTS_HIGHMEM
1072 help 1074 help
1073 Choose this option to build a kernel for release 2 or later of the 1075 Choose this option to build a kernel for release 2 or later of the
1074 MIPS32 architecture. Most modern embedded systems with a 32-bit 1076 MIPS32 architecture. Most modern embedded systems with a 32-bit
@@ -1082,6 +1084,7 @@ config CPU_MIPS64_R1
1082 select CPU_HAS_PREFETCH 1084 select CPU_HAS_PREFETCH
1083 select CPU_SUPPORTS_32BIT_KERNEL 1085 select CPU_SUPPORTS_32BIT_KERNEL
1084 select CPU_SUPPORTS_64BIT_KERNEL 1086 select CPU_SUPPORTS_64BIT_KERNEL
1087 select CPU_SUPPORTS_HIGHMEM
1085 help 1088 help
1086 Choose this option to build a kernel for release 1 or later of the 1089 Choose this option to build a kernel for release 1 or later of the
1087 MIPS64 architecture. Many modern embedded systems with a 64-bit 1090 MIPS64 architecture. Many modern embedded systems with a 64-bit
@@ -1099,6 +1102,7 @@ config CPU_MIPS64_R2
1099 select CPU_HAS_PREFETCH 1102 select CPU_HAS_PREFETCH
1100 select CPU_SUPPORTS_32BIT_KERNEL 1103 select CPU_SUPPORTS_32BIT_KERNEL
1101 select CPU_SUPPORTS_64BIT_KERNEL 1104 select CPU_SUPPORTS_64BIT_KERNEL
1105 select CPU_SUPPORTS_HIGHMEM
1102 help 1106 help
1103 Choose this option to build a kernel for release 2 or later of the 1107 Choose this option to build a kernel for release 2 or later of the
1104 MIPS64 architecture. Many modern embedded systems with a 64-bit 1108 MIPS64 architecture. Many modern embedded systems with a 64-bit
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 38c0f3360d51..fe9da16f3a40 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -95,6 +95,7 @@ endif
95# crossformat linking we rely on the elf2ecoff tool for format conversion. 95# crossformat linking we rely on the elf2ecoff tool for format conversion.
96# 96#
97cflags-y += -G 0 -mno-abicalls -fno-pic -pipe 97cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
98cflags-y += -msoft-float
98LDFLAGS_vmlinux += -G 0 -static -n -nostdlib 99LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
99MODFLAGS += -mlong-calls 100MODFLAGS += -mlong-calls
100 101
diff --git a/arch/mips/arc/arc_con.c b/arch/mips/arc/arc_con.c
index 51785a6a7328..bc32fe64f42a 100644
--- a/arch/mips/arc/arc_con.c
+++ b/arch/mips/arc/arc_con.c
@@ -24,7 +24,7 @@ static void prom_console_write(struct console *co, const char *s,
24 } 24 }
25} 25}
26 26
27static int __init prom_console_setup(struct console *co, char *options) 27static int prom_console_setup(struct console *co, char *options)
28{ 28{
29 return !(prom_flags & PROM_FLAG_USE_AS_CONSOLE); 29 return !(prom_flags & PROM_FLAG_USE_AS_CONSOLE);
30} 30}
diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c
index 0ac067f45cf5..0613f1f36b1b 100644
--- a/arch/mips/kernel/irq-mv6434x.c
+++ b/arch/mips/kernel/irq-mv6434x.c
@@ -11,12 +11,14 @@
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <asm/ptrace.h>
15#include <linux/sched.h>
16#include <linux/kernel_stat.h> 14#include <linux/kernel_stat.h>
15#include <linux/mv643xx.h>
16#include <linux/sched.h>
17
18#include <asm/ptrace.h>
17#include <asm/io.h> 19#include <asm/io.h>
18#include <asm/irq.h> 20#include <asm/irq.h>
19#include <linux/mv643xx.h> 21#include <asm/marvell.h>
20 22
21static unsigned int irq_base; 23static unsigned int irq_base;
22 24
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 5f68b220c26d..e00e5f6e7fdd 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -161,60 +161,6 @@ out:
161 return error; 161 return error;
162} 162}
163 163
164struct dirent32 {
165 unsigned int d_ino;
166 unsigned int d_off;
167 unsigned short d_reclen;
168 char d_name[NAME_MAX + 1];
169};
170
171static void
172xlate_dirent(void *dirent64, void *dirent32, long n)
173{
174 long off;
175 struct dirent *dirp;
176 struct dirent32 *dirp32;
177
178 off = 0;
179 while (off < n) {
180 dirp = (struct dirent *)(dirent64 + off);
181 dirp32 = (struct dirent32 *)(dirent32 + off);
182 off += dirp->d_reclen;
183 dirp32->d_ino = dirp->d_ino;
184 dirp32->d_off = (unsigned int)dirp->d_off;
185 dirp32->d_reclen = dirp->d_reclen;
186 strncpy(dirp32->d_name, dirp->d_name, dirp->d_reclen - ((3 * 4) + 2));
187 }
188 return;
189}
190
191asmlinkage long
192sys32_getdents(unsigned int fd, void * dirent32, unsigned int count)
193{
194 long n;
195 void *dirent64;
196
197 dirent64 = (void *)((unsigned long)(dirent32 + (sizeof(long) - 1)) & ~(sizeof(long) - 1));
198 if ((n = sys_getdents(fd, dirent64, count - (dirent64 - dirent32))) < 0)
199 return(n);
200 xlate_dirent(dirent64, dirent32, n);
201 return(n);
202}
203
204asmlinkage int old_readdir(unsigned int fd, void * dirent, unsigned int count);
205
206asmlinkage int
207sys32_readdir(unsigned int fd, void * dirent32, unsigned int count)
208{
209 int n;
210 struct dirent dirent64;
211
212 if ((n = old_readdir(fd, &dirent64, count)) < 0)
213 return(n);
214 xlate_dirent(&dirent64, dirent32, dirent64.d_reclen);
215 return(n);
216}
217
218asmlinkage int 164asmlinkage int
219sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr, int options) 165sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr, int options)
220{ 166{
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index d87b5446fa13..02c8267e45e7 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -195,7 +195,7 @@ EXPORT(sysn32_call_table)
195 PTR sys_fdatasync 195 PTR sys_fdatasync
196 PTR sys_truncate 196 PTR sys_truncate
197 PTR sys_ftruncate /* 6075 */ 197 PTR sys_ftruncate /* 6075 */
198 PTR sys32_getdents 198 PTR compat_sys_getdents
199 PTR sys_getcwd 199 PTR sys_getcwd
200 PTR sys_chdir 200 PTR sys_chdir
201 PTR sys_fchdir 201 PTR sys_fchdir
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 5b0414018c9a..797e0d874889 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -293,7 +293,7 @@ sys_call_table:
293 PTR sys_uselib 293 PTR sys_uselib
294 PTR sys_swapon 294 PTR sys_swapon
295 PTR sys_reboot 295 PTR sys_reboot
296 PTR sys32_readdir 296 PTR compat_sys_old_readdir
297 PTR old_mmap /* 4090 */ 297 PTR old_mmap /* 4090 */
298 PTR sys_munmap 298 PTR sys_munmap
299 PTR sys_truncate 299 PTR sys_truncate
@@ -345,7 +345,7 @@ sys_call_table:
345 PTR sys_setfsuid 345 PTR sys_setfsuid
346 PTR sys_setfsgid 346 PTR sys_setfsgid
347 PTR sys32_llseek /* 4140 */ 347 PTR sys32_llseek /* 4140 */
348 PTR sys32_getdents 348 PTR compat_sys_getdents
349 PTR compat_sys_select 349 PTR compat_sys_select
350 PTR sys_flock 350 PTR sys_flock
351 PTR sys_msync 351 PTR sys_msync
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index d86affa21278..d9293c558e41 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -540,6 +540,9 @@ void __init setup_arch(char **cmdline_p)
540 sparse_init(); 540 sparse_init();
541 paging_init(); 541 paging_init();
542 resource_init(); 542 resource_init();
543#ifdef CONFIG_SMP
544 plat_smp_setup();
545#endif
543} 546}
544 547
545int __init fpu_disable(char *s) 548int __init fpu_disable(char *s)
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 5e189862e523..06ed90752424 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -236,7 +236,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
236 init_new_context(current, &init_mm); 236 init_new_context(current, &init_mm);
237 current_thread_info()->cpu = 0; 237 current_thread_info()->cpu = 0;
238 smp_tune_scheduling(); 238 smp_tune_scheduling();
239 prom_prepare_cpus(max_cpus); 239 plat_prepare_cpus(max_cpus);
240} 240}
241 241
242/* preload SMP state for boot cpu */ 242/* preload SMP state for boot cpu */
diff --git a/arch/mips/kernel/smp_mt.c b/arch/mips/kernel/smp_mt.c
index c930364830d0..993b8bf56aaf 100644
--- a/arch/mips/kernel/smp_mt.c
+++ b/arch/mips/kernel/smp_mt.c
@@ -143,7 +143,7 @@ static struct irqaction irq_call = {
143 * Make sure all CPU's are in a sensible state before we boot any of the 143 * Make sure all CPU's are in a sensible state before we boot any of the
144 * secondarys 144 * secondarys
145 */ 145 */
146void prom_prepare_cpus(unsigned int max_cpus) 146void plat_smp_setup(void)
147{ 147{
148 unsigned long val; 148 unsigned long val;
149 int i, num; 149 int i, num;
@@ -179,11 +179,9 @@ void prom_prepare_cpus(unsigned int max_cpus)
179 write_vpe_c0_vpeconf0(tmp); 179 write_vpe_c0_vpeconf0(tmp);
180 180
181 /* Record this as available CPU */ 181 /* Record this as available CPU */
182 if (i < max_cpus) { 182 cpu_set(i, phys_cpu_present_map);
183 cpu_set(i, phys_cpu_present_map); 183 __cpu_number_map[i] = ++num;
184 __cpu_number_map[i] = ++num; 184 __cpu_logical_map[num] = i;
185 __cpu_logical_map[num] = i;
186 }
187 } 185 }
188 186
189 /* disable multi-threading with TC's */ 187 /* disable multi-threading with TC's */
@@ -241,7 +239,10 @@ void prom_prepare_cpus(unsigned int max_cpus)
241 set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch); 239 set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch);
242 set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); 240 set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch);
243 } 241 }
242}
244 243
244void __init plat_prepare_cpus(unsigned int max_cpus)
245{
245 cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ; 246 cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ;
246 cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ; 247 cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ;
247 248
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 7050b4ffffcd..42c94c771afb 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -163,7 +163,7 @@ void do_gettimeofday(struct timeval *tv)
163 unsigned long seq; 163 unsigned long seq;
164 unsigned long lost; 164 unsigned long lost;
165 unsigned long usec, sec; 165 unsigned long usec, sec;
166 unsigned long max_ntp_tick = tick_usec - tickadj; 166 unsigned long max_ntp_tick;
167 167
168 do { 168 do {
169 seq = read_seqbegin(&xtime_lock); 169 seq = read_seqbegin(&xtime_lock);
@@ -178,12 +178,13 @@ void do_gettimeofday(struct timeval *tv)
178 * Better to lose some accuracy than have time go backwards.. 178 * Better to lose some accuracy than have time go backwards..
179 */ 179 */
180 if (unlikely(time_adjust < 0)) { 180 if (unlikely(time_adjust < 0)) {
181 max_ntp_tick = (USEC_PER_SEC / HZ) - tickadj;
181 usec = min(usec, max_ntp_tick); 182 usec = min(usec, max_ntp_tick);
182 183
183 if (lost) 184 if (lost)
184 usec += lost * max_ntp_tick; 185 usec += lost * max_ntp_tick;
185 } else if (unlikely(lost)) 186 } else if (unlikely(lost))
186 usec += lost * tick_usec; 187 usec += lost * (USEC_PER_SEC / HZ);
187 188
188 sec = xtime.tv_sec; 189 sec = xtime.tv_sec;
189 usec += (xtime.tv_nsec / 1000); 190 usec += (xtime.tv_nsec / 1000);
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index ff699dbb99f7..2ad0cedf29fe 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -106,6 +106,9 @@ SECTIONS
106 .con_initcall.init : { *(.con_initcall.init) } 106 .con_initcall.init : { *(.con_initcall.init) }
107 __con_initcall_end = .; 107 __con_initcall_end = .;
108 SECURITY_INIT 108 SECURITY_INIT
109 /* .exit.text is discarded at runtime, not link time, to deal with
110 references from .rodata */
111 .exit.text : { *(.exit.text) }
109 . = ALIGN(_PAGE_SIZE); 112 . = ALIGN(_PAGE_SIZE);
110 __initramfs_start = .; 113 __initramfs_start = .;
111 .init.ramfs : { *(.init.ramfs) } 114 .init.ramfs : { *(.init.ramfs) }
@@ -133,7 +136,6 @@ SECTIONS
133 136
134 /* Sections to be discarded */ 137 /* Sections to be discarded */
135 /DISCARD/ : { 138 /DISCARD/ : {
136 *(.exit.text)
137 *(.exit.data) 139 *(.exit.data)
138 *(.exitcall.exit) 140 *(.exitcall.exit)
139 141
diff --git a/arch/mips/lib/iomap.c b/arch/mips/lib/iomap.c
index 7e2ced715cfb..f4ac5bbcd81f 100644
--- a/arch/mips/lib/iomap.c
+++ b/arch/mips/lib/iomap.c
@@ -63,7 +63,7 @@ void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
63 return ioport_map(start, len); 63 return ioport_map(start, len);
64 if (flags & IORESOURCE_MEM) { 64 if (flags & IORESOURCE_MEM) {
65 if (flags & IORESOURCE_CACHEABLE) 65 if (flags & IORESOURCE_CACHEABLE)
66 return ioremap_cacheable_cow(start, len); 66 return ioremap_cachable(start, len);
67 return ioremap_nocache(start, len); 67 return ioremap_nocache(start, len);
68 } 68 }
69 69
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 1b71d91e8268..0668e9bfce41 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -235,7 +235,9 @@ static inline void r4k_blast_scache_page_setup(void)
235{ 235{
236 unsigned long sc_lsize = cpu_scache_line_size(); 236 unsigned long sc_lsize = cpu_scache_line_size();
237 237
238 if (sc_lsize == 16) 238 if (scache_size == 0)
239 r4k_blast_scache_page = (void *)no_sc_noop;
240 else if (sc_lsize == 16)
239 r4k_blast_scache_page = blast_scache16_page; 241 r4k_blast_scache_page = blast_scache16_page;
240 else if (sc_lsize == 32) 242 else if (sc_lsize == 32)
241 r4k_blast_scache_page = blast_scache32_page; 243 r4k_blast_scache_page = blast_scache32_page;
@@ -251,7 +253,9 @@ static inline void r4k_blast_scache_page_indexed_setup(void)
251{ 253{
252 unsigned long sc_lsize = cpu_scache_line_size(); 254 unsigned long sc_lsize = cpu_scache_line_size();
253 255
254 if (sc_lsize == 16) 256 if (scache_size == 0)
257 r4k_blast_scache_page_indexed = (void *)no_sc_noop;
258 else if (sc_lsize == 16)
255 r4k_blast_scache_page_indexed = blast_scache16_page_indexed; 259 r4k_blast_scache_page_indexed = blast_scache16_page_indexed;
256 else if (sc_lsize == 32) 260 else if (sc_lsize == 32)
257 r4k_blast_scache_page_indexed = blast_scache32_page_indexed; 261 r4k_blast_scache_page_indexed = blast_scache32_page_indexed;
@@ -267,7 +271,9 @@ static inline void r4k_blast_scache_setup(void)
267{ 271{
268 unsigned long sc_lsize = cpu_scache_line_size(); 272 unsigned long sc_lsize = cpu_scache_line_size();
269 273
270 if (sc_lsize == 16) 274 if (scache_size == 0)
275 r4k_blast_scache = (void *)no_sc_noop;
276 else if (sc_lsize == 16)
271 r4k_blast_scache = blast_scache16; 277 r4k_blast_scache = blast_scache16;
272 else if (sc_lsize == 32) 278 else if (sc_lsize == 32)
273 r4k_blast_scache = blast_scache32; 279 r4k_blast_scache = blast_scache32;
@@ -482,7 +488,7 @@ static inline void local_r4k_flush_icache_range(void *args)
482 protected_blast_dcache_range(start, end); 488 protected_blast_dcache_range(start, end);
483 } 489 }
484 490
485 if (!cpu_icache_snoops_remote_store) { 491 if (!cpu_icache_snoops_remote_store && scache_size) {
486 if (end - start > scache_size) 492 if (end - start > scache_size)
487 r4k_blast_scache(); 493 r4k_blast_scache();
488 else 494 else
@@ -651,7 +657,7 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
651 657
652 R4600_HIT_CACHEOP_WAR_IMPL; 658 R4600_HIT_CACHEOP_WAR_IMPL;
653 protected_writeback_dcache_line(addr & ~(dc_lsize - 1)); 659 protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
654 if (!cpu_icache_snoops_remote_store) 660 if (!cpu_icache_snoops_remote_store && scache_size)
655 protected_writeback_scache_line(addr & ~(sc_lsize - 1)); 661 protected_writeback_scache_line(addr & ~(sc_lsize - 1));
656 protected_flush_icache_line(addr & ~(ic_lsize - 1)); 662 protected_flush_icache_line(addr & ~(ic_lsize - 1));
657 if (MIPS4K_ICACHE_REFILL_WAR) { 663 if (MIPS4K_ICACHE_REFILL_WAR) {
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 0f9485806bac..ac4f4bfaae50 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -280,69 +280,69 @@ static void __init build_insn(u32 **buf, enum opcode opc, ...)
280} 280}
281 281
282#define I_u1u2u3(op) \ 282#define I_u1u2u3(op) \
283 static inline void i##op(u32 **buf, unsigned int a, \ 283 static inline void __init i##op(u32 **buf, unsigned int a, \
284 unsigned int b, unsigned int c) \ 284 unsigned int b, unsigned int c) \
285 { \ 285 { \
286 build_insn(buf, insn##op, a, b, c); \ 286 build_insn(buf, insn##op, a, b, c); \
287 } 287 }
288 288
289#define I_u2u1u3(op) \ 289#define I_u2u1u3(op) \
290 static inline void i##op(u32 **buf, unsigned int a, \ 290 static inline void __init i##op(u32 **buf, unsigned int a, \
291 unsigned int b, unsigned int c) \ 291 unsigned int b, unsigned int c) \
292 { \ 292 { \
293 build_insn(buf, insn##op, b, a, c); \ 293 build_insn(buf, insn##op, b, a, c); \
294 } 294 }
295 295
296#define I_u3u1u2(op) \ 296#define I_u3u1u2(op) \
297 static inline void i##op(u32 **buf, unsigned int a, \ 297 static inline void __init i##op(u32 **buf, unsigned int a, \
298 unsigned int b, unsigned int c) \ 298 unsigned int b, unsigned int c) \
299 { \ 299 { \
300 build_insn(buf, insn##op, b, c, a); \ 300 build_insn(buf, insn##op, b, c, a); \
301 } 301 }
302 302
303#define I_u1u2s3(op) \ 303#define I_u1u2s3(op) \
304 static inline void i##op(u32 **buf, unsigned int a, \ 304 static inline void __init i##op(u32 **buf, unsigned int a, \
305 unsigned int b, signed int c) \ 305 unsigned int b, signed int c) \
306 { \ 306 { \
307 build_insn(buf, insn##op, a, b, c); \ 307 build_insn(buf, insn##op, a, b, c); \
308 } 308 }
309 309
310#define I_u2s3u1(op) \ 310#define I_u2s3u1(op) \
311 static inline void i##op(u32 **buf, unsigned int a, \ 311 static inline void __init i##op(u32 **buf, unsigned int a, \
312 signed int b, unsigned int c) \ 312 signed int b, unsigned int c) \
313 { \ 313 { \
314 build_insn(buf, insn##op, c, a, b); \ 314 build_insn(buf, insn##op, c, a, b); \
315 } 315 }
316 316
317#define I_u2u1s3(op) \ 317#define I_u2u1s3(op) \
318 static inline void i##op(u32 **buf, unsigned int a, \ 318 static inline void __init i##op(u32 **buf, unsigned int a, \
319 unsigned int b, signed int c) \ 319 unsigned int b, signed int c) \
320 { \ 320 { \
321 build_insn(buf, insn##op, b, a, c); \ 321 build_insn(buf, insn##op, b, a, c); \
322 } 322 }
323 323
324#define I_u1u2(op) \ 324#define I_u1u2(op) \
325 static inline void i##op(u32 **buf, unsigned int a, \ 325 static inline void __init i##op(u32 **buf, unsigned int a, \
326 unsigned int b) \ 326 unsigned int b) \
327 { \ 327 { \
328 build_insn(buf, insn##op, a, b); \ 328 build_insn(buf, insn##op, a, b); \
329 } 329 }
330 330
331#define I_u1s2(op) \ 331#define I_u1s2(op) \
332 static inline void i##op(u32 **buf, unsigned int a, \ 332 static inline void __init i##op(u32 **buf, unsigned int a, \
333 signed int b) \ 333 signed int b) \
334 { \ 334 { \
335 build_insn(buf, insn##op, a, b); \ 335 build_insn(buf, insn##op, a, b); \
336 } 336 }
337 337
338#define I_u1(op) \ 338#define I_u1(op) \
339 static inline void i##op(u32 **buf, unsigned int a) \ 339 static inline void __init i##op(u32 **buf, unsigned int a) \
340 { \ 340 { \
341 build_insn(buf, insn##op, a); \ 341 build_insn(buf, insn##op, a); \
342 } 342 }
343 343
344#define I_0(op) \ 344#define I_0(op) \
345 static inline void i##op(u32 **buf) \ 345 static inline void __init i##op(u32 **buf) \
346 { \ 346 { \
347 build_insn(buf, insn##op); \ 347 build_insn(buf, insn##op); \
348 } 348 }
@@ -623,42 +623,42 @@ static __init int __attribute__((unused)) insn_has_bdelay(struct reloc *rel,
623} 623}
624 624
625/* convenience functions for labeled branches */ 625/* convenience functions for labeled branches */
626static void __attribute__((unused)) il_bltz(u32 **p, struct reloc **r, 626static void __init __attribute__((unused))
627 unsigned int reg, enum label_id l) 627 il_bltz(u32 **p, struct reloc **r, unsigned int reg, enum label_id l)
628{ 628{
629 r_mips_pc16(r, *p, l); 629 r_mips_pc16(r, *p, l);
630 i_bltz(p, reg, 0); 630 i_bltz(p, reg, 0);
631} 631}
632 632
633static void __attribute__((unused)) il_b(u32 **p, struct reloc **r, 633static void __init __attribute__((unused)) il_b(u32 **p, struct reloc **r,
634 enum label_id l) 634 enum label_id l)
635{ 635{
636 r_mips_pc16(r, *p, l); 636 r_mips_pc16(r, *p, l);
637 i_b(p, 0); 637 i_b(p, 0);
638} 638}
639 639
640static void il_beqz(u32 **p, struct reloc **r, unsigned int reg, 640static void __init il_beqz(u32 **p, struct reloc **r, unsigned int reg,
641 enum label_id l) 641 enum label_id l)
642{ 642{
643 r_mips_pc16(r, *p, l); 643 r_mips_pc16(r, *p, l);
644 i_beqz(p, reg, 0); 644 i_beqz(p, reg, 0);
645} 645}
646 646
647static void __attribute__((unused)) 647static void __init __attribute__((unused))
648il_beqzl(u32 **p, struct reloc **r, unsigned int reg, enum label_id l) 648il_beqzl(u32 **p, struct reloc **r, unsigned int reg, enum label_id l)
649{ 649{
650 r_mips_pc16(r, *p, l); 650 r_mips_pc16(r, *p, l);
651 i_beqzl(p, reg, 0); 651 i_beqzl(p, reg, 0);
652} 652}
653 653
654static void il_bnez(u32 **p, struct reloc **r, unsigned int reg, 654static void __init il_bnez(u32 **p, struct reloc **r, unsigned int reg,
655 enum label_id l) 655 enum label_id l)
656{ 656{
657 r_mips_pc16(r, *p, l); 657 r_mips_pc16(r, *p, l);
658 i_bnez(p, reg, 0); 658 i_bnez(p, reg, 0);
659} 659}
660 660
661static void il_bgezl(u32 **p, struct reloc **r, unsigned int reg, 661static void __init il_bgezl(u32 **p, struct reloc **r, unsigned int reg,
662 enum label_id l) 662 enum label_id l)
663{ 663{
664 r_mips_pc16(r, *p, l); 664 r_mips_pc16(r, *p, l);
diff --git a/arch/mips/momentum/jaguar_atx/prom.c b/arch/mips/momentum/jaguar_atx/prom.c
index aae7a802767a..1cadaa92946a 100644
--- a/arch/mips/momentum/jaguar_atx/prom.c
+++ b/arch/mips/momentum/jaguar_atx/prom.c
@@ -21,10 +21,10 @@
21#include <linux/mm.h> 21#include <linux/mm.h>
22#include <linux/sched.h> 22#include <linux/sched.h>
23#include <linux/bootmem.h> 23#include <linux/bootmem.h>
24#include <linux/mv643xx.h>
24 25
25#include <asm/addrspace.h> 26#include <asm/addrspace.h>
26#include <asm/bootinfo.h> 27#include <asm/bootinfo.h>
27#include <asm/mv64340.h>
28#include <asm/pmon.h> 28#include <asm/pmon.h>
29 29
30#include "jaguar_atx_fpga.h" 30#include "jaguar_atx_fpga.h"
diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c
index 301d67226d72..2699917b640a 100644
--- a/arch/mips/momentum/jaguar_atx/setup.c
+++ b/arch/mips/momentum/jaguar_atx/setup.c
@@ -2,7 +2,7 @@
2 * BRIEF MODULE DESCRIPTION 2 * BRIEF MODULE DESCRIPTION
3 * Momentum Computer Jaguar-ATX board dependent boot routines 3 * Momentum Computer Jaguar-ATX board dependent boot routines
4 * 4 *
5 * Copyright (C) 1996, 1997, 2001, 2004 Ralf Baechle (ralf@linux-mips.org) 5 * Copyright (C) 1996, 1997, 2001, 04, 06 Ralf Baechle (ralf@linux-mips.org)
6 * Copyright (C) 2000 RidgeRun, Inc. 6 * Copyright (C) 2000 RidgeRun, Inc.
7 * Copyright (C) 2001 Red Hat, Inc. 7 * Copyright (C) 2001 Red Hat, Inc.
8 * Copyright (C) 2002 Momentum Computer 8 * Copyright (C) 2002 Momentum Computer
@@ -55,6 +55,8 @@
55#include <linux/interrupt.h> 55#include <linux/interrupt.h>
56#include <linux/timex.h> 56#include <linux/timex.h>
57#include <linux/vmalloc.h> 57#include <linux/vmalloc.h>
58#include <linux/mv643xx.h>
59
58#include <asm/time.h> 60#include <asm/time.h>
59#include <asm/bootinfo.h> 61#include <asm/bootinfo.h>
60#include <asm/page.h> 62#include <asm/page.h>
@@ -64,7 +66,6 @@
64#include <asm/ptrace.h> 66#include <asm/ptrace.h>
65#include <asm/reboot.h> 67#include <asm/reboot.h>
66#include <asm/tlbflush.h> 68#include <asm/tlbflush.h>
67#include <asm/mv64340.h>
68 69
69#include "jaguar_atx_fpga.h" 70#include "jaguar_atx_fpga.h"
70 71
diff --git a/arch/mips/momentum/ocelot_c/irq.c b/arch/mips/momentum/ocelot_c/irq.c
index 300fe8e4fbe8..a5764bc20e36 100644
--- a/arch/mips/momentum/ocelot_c/irq.c
+++ b/arch/mips/momentum/ocelot_c/irq.c
@@ -41,11 +41,11 @@
41#include <linux/slab.h> 41#include <linux/slab.h>
42#include <linux/random.h> 42#include <linux/random.h>
43#include <linux/bitops.h> 43#include <linux/bitops.h>
44#include <linux/mv643xx.h>
44#include <asm/bootinfo.h> 45#include <asm/bootinfo.h>
45#include <asm/io.h> 46#include <asm/io.h>
46#include <asm/irq_cpu.h> 47#include <asm/irq_cpu.h>
47#include <asm/mipsregs.h> 48#include <asm/mipsregs.h>
48#include <asm/mv64340.h>
49#include <asm/system.h> 49#include <asm/system.h>
50 50
51extern asmlinkage void ocelot_handle_int(void); 51extern asmlinkage void ocelot_handle_int(void);
diff --git a/arch/mips/momentum/ocelot_c/prom.c b/arch/mips/momentum/ocelot_c/prom.c
index 5b6809724b15..e92364482c7b 100644
--- a/arch/mips/momentum/ocelot_c/prom.c
+++ b/arch/mips/momentum/ocelot_c/prom.c
@@ -19,10 +19,10 @@
19#include <linux/mm.h> 19#include <linux/mm.h>
20#include <linux/sched.h> 20#include <linux/sched.h>
21#include <linux/bootmem.h> 21#include <linux/bootmem.h>
22#include <linux/mv643xx.h>
22 23
23#include <asm/addrspace.h> 24#include <asm/addrspace.h>
24#include <asm/bootinfo.h> 25#include <asm/bootinfo.h>
25#include <asm/mv64340.h>
26#include <asm/pmon.h> 26#include <asm/pmon.h>
27 27
28#include "ocelot_c_fpga.h" 28#include "ocelot_c_fpga.h"
diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c
index 15998d8a9341..bd02e60d037a 100644
--- a/arch/mips/momentum/ocelot_c/setup.c
+++ b/arch/mips/momentum/ocelot_c/setup.c
@@ -54,6 +54,7 @@
54#include <linux/pm.h> 54#include <linux/pm.h>
55#include <linux/timex.h> 55#include <linux/timex.h>
56#include <linux/vmalloc.h> 56#include <linux/vmalloc.h>
57#include <linux/mv643xx.h>
57 58
58#include <asm/time.h> 59#include <asm/time.h>
59#include <asm/bootinfo.h> 60#include <asm/bootinfo.h>
@@ -64,9 +65,9 @@
64#include <asm/processor.h> 65#include <asm/processor.h>
65#include <asm/ptrace.h> 66#include <asm/ptrace.h>
66#include <asm/reboot.h> 67#include <asm/reboot.h>
68#include <asm/marvell.h>
67#include <linux/bootmem.h> 69#include <linux/bootmem.h>
68#include <linux/blkdev.h> 70#include <linux/blkdev.h>
69#include <asm/mv64340.h>
70#include "ocelot_c_fpga.h" 71#include "ocelot_c_fpga.h"
71 72
72unsigned long marvell_base; 73unsigned long marvell_base;
@@ -252,22 +253,22 @@ void __init plat_setup(void)
252 /* shut down ethernet ports, just to be sure our memory doesn't get 253 /* shut down ethernet ports, just to be sure our memory doesn't get
253 * corrupted by random ethernet traffic. 254 * corrupted by random ethernet traffic.
254 */ 255 */
255 MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8); 256 MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8);
256 MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8); 257 MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8);
257 MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8); 258 MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8);
258 MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8); 259 MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8);
259 do {} 260 do {}
260 while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff); 261 while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff);
261 do {} 262 do {}
262 while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff); 263 while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff);
263 do {} 264 do {}
264 while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff); 265 while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff);
265 do {} 266 do {}
266 while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff); 267 while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff);
267 MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0), 268 MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0),
268 MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1); 269 MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1);
269 MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1), 270 MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1),
270 MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1); 271 MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1);
271 272
272 /* Turn off the Bit-Error LED */ 273 /* Turn off the Bit-Error LED */
273 OCELOT_FPGA_WRITE(0x80, CLR); 274 OCELOT_FPGA_WRITE(0x80, CLR);
diff --git a/arch/mips/pci/pci-ocelot-c.c b/arch/mips/pci/pci-ocelot-c.c
index 1d84d36e034d..027759f7c904 100644
--- a/arch/mips/pci/pci-ocelot-c.c
+++ b/arch/mips/pci/pci-ocelot-c.c
@@ -3,15 +3,17 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) 6 * Copyright (C) 2004, 06 by Ralf Baechle (ralf@linux-mips.org)
7 */ 7 */
8 8
9#include <linux/types.h> 9#include <linux/types.h>
10#include <linux/pci.h> 10#include <linux/pci.h>
11#include <asm/mv64340.h> 11#include <linux/mv643xx.h>
12 12
13#include <linux/init.h> 13#include <linux/init.h>
14 14
15#include <asm/marvell.h>
16
15/* 17/*
16 * We assume the address ranges have already been setup appropriately by 18 * We assume the address ranges have already been setup appropriately by
17 * the firmware. PMON in case of the Ocelot C does that. 19 * the firmware. PMON in case of the Ocelot C does that.
diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c
index 7f8fda962190..c197311e15d3 100644
--- a/arch/mips/pmc-sierra/yosemite/smp.c
+++ b/arch/mips/pmc-sierra/yosemite/smp.c
@@ -50,37 +50,25 @@ void __init prom_grab_secondary(void)
50 * We don't want to start the secondary CPU yet nor do we have a nice probing 50 * We don't want to start the secondary CPU yet nor do we have a nice probing
51 * feature in PMON so we just assume presence of the secondary core. 51 * feature in PMON so we just assume presence of the secondary core.
52 */ 52 */
53static char maxcpus_string[] __initdata = 53void __init plat_smp_setup(void)
54 KERN_WARNING "max_cpus set to 0; using 1 instead\n";
55
56void __init prom_prepare_cpus(unsigned int max_cpus)
57{ 54{
58 int enabled = 0, i; 55 int i;
59
60 if (max_cpus == 0) {
61 printk(maxcpus_string);
62 max_cpus = 1;
63 }
64 56
65 cpus_clear(phys_cpu_present_map); 57 cpus_clear(phys_cpu_present_map);
66 58
67 for (i = 0; i < 2; i++) { 59 for (i = 0; i < 2; i++) {
68 if (i == max_cpus)
69 break;
70
71 /*
72 * The boot CPU
73 */
74 cpu_set(i, phys_cpu_present_map); 60 cpu_set(i, phys_cpu_present_map);
75 __cpu_number_map[i] = i; 61 __cpu_number_map[i] = i;
76 __cpu_logical_map[i] = i; 62 __cpu_logical_map[i] = i;
77 enabled++;
78 } 63 }
64}
79 65
66void __init plat_prepare_cpus(unsigned int max_cpus)
67{
80 /* 68 /*
81 * Be paranoid. Enable the IPI only if we're really about to go SMP. 69 * Be paranoid. Enable the IPI only if we're really about to go SMP.
82 */ 70 */
83 if (enabled > 1) 71 if (cpus_weight(cpu_possible_map))
84 set_c0_status(STATUSF_IP5); 72 set_c0_status(STATUSF_IP5);
85} 73}
86 74
diff --git a/arch/mips/sgi-ip27/ip27-smp.c b/arch/mips/sgi-ip27/ip27-smp.c
index dbef3f6b5650..09fa7f5216f0 100644
--- a/arch/mips/sgi-ip27/ip27-smp.c
+++ b/arch/mips/sgi-ip27/ip27-smp.c
@@ -140,7 +140,7 @@ static __init void intr_clear_all(nasid_t nasid)
140 REMOTE_HUB_CLR_INTR(nasid, i); 140 REMOTE_HUB_CLR_INTR(nasid, i);
141} 141}
142 142
143void __init prom_prepare_cpus(unsigned int max_cpus) 143void __init plat_smp_setup(void)
144{ 144{
145 cnodeid_t cnode; 145 cnodeid_t cnode;
146 146
@@ -161,6 +161,11 @@ void __init prom_prepare_cpus(unsigned int max_cpus)
161 alloc_cpupda(0, 0); 161 alloc_cpupda(0, 0);
162} 162}
163 163
164void __init plat_prepare_cpus(unsigned int max_cpus)
165{
166 /* We already did everything necessary earlier */
167}
168
164/* 169/*
165 * Launch a slave into smp_bootstrap(). It doesn't take an argument, and we 170 * Launch a slave into smp_bootstrap(). It doesn't take an argument, and we
166 * set sp to the kernel stack of the newly created idle process, gp to the proc 171 * set sp to the kernel stack of the newly created idle process, gp to the proc
diff --git a/arch/mips/sibyte/cfe/smp.c b/arch/mips/sibyte/cfe/smp.c
index 4477af3d8074..eab20e2db323 100644
--- a/arch/mips/sibyte/cfe/smp.c
+++ b/arch/mips/sibyte/cfe/smp.c
@@ -31,7 +31,7 @@
31 * 31 *
32 * Common setup before any secondaries are started 32 * Common setup before any secondaries are started
33 */ 33 */
34void __init prom_prepare_cpus(unsigned int max_cpus) 34void __init plat_smp_setup(void)
35{ 35{
36 int i, num; 36 int i, num;
37 37
@@ -40,14 +40,18 @@ void __init prom_prepare_cpus(unsigned int max_cpus)
40 __cpu_number_map[0] = 0; 40 __cpu_number_map[0] = 0;
41 __cpu_logical_map[0] = 0; 41 __cpu_logical_map[0] = 0;
42 42
43 for (i=1, num=0; i<NR_CPUS; i++) { 43 for (i = 1, num = 0; i < NR_CPUS; i++) {
44 if (cfe_cpu_stop(i) == 0) { 44 if (cfe_cpu_stop(i) == 0) {
45 cpu_set(i, phys_cpu_present_map); 45 cpu_set(i, phys_cpu_present_map);
46 __cpu_number_map[i] = ++num; 46 __cpu_number_map[i] = ++num;
47 __cpu_logical_map[num] = i; 47 __cpu_logical_map[num] = i;
48 } 48 }
49 } 49 }
50 printk("Detected %i available secondary CPU(s)\n", num); 50 printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num);
51}
52
53void __init plat_prepare_cpus(unsigned int max_cpus)
54{
51} 55}
52 56
53/* 57/*